Changeset 54339 in vbox

Timestamp:

Feb 20, 2015 6:10:12 PM (10 years ago)

Author:

vboxsync

Message:

SUPDrv,VMM: Added SUPR0TscDeltaMeasureBySetIndex to SUPDrv (bumping version req) so that VMMR0.cpp can, if necessary, trigger a delta measurement prior to doing RC and HM stuff. Also, made the context hook set the return-to-ring3 force flag if we're rescheduled on a CPU with an TSC delta needing measuring. This is probably code that will almost never get called...

Location:

trunk

Files:

• include/VBox/sup.h (modified) (1 diff)
• include/VBox/vmm/cpum.h (modified) (1 diff)
• src/VBox/HostDrivers/Support/SUPDrv.cpp (modified) (1 diff)
• src/VBox/HostDrivers/Support/SUPDrvGip.cpp (modified) (3 diffs)
• src/VBox/HostDrivers/Support/SUPDrvIOC.h (modified) (1 diff)
• src/VBox/HostDrivers/Support/SUPLib.cpp (modified) (1 diff)
• src/VBox/HostDrivers/linux/load.sh (modified) (1 diff)
• src/VBox/VMM/VMMR0/CPUMR0.cpp (modified) (1 diff)
• src/VBox/VMM/VMMR0/VMMR0.cpp (modified) (4 diffs)

trunk/include/VBox/sup.h

@@ -1806 +1806 @@
 SUPR0DECL(bool) SUPR0SuspendVTxOnCpu(void);
 SUPR0DECL(void) SUPR0ResumeVTxOnCpu(bool fSuspended);
+#define SUP_TSCDELTA_MEASURE_F_FORCE        RT_BIT_32(0)
+#define SUP_TSCDELTA_MEASURE_F_ASYNC        RT_BIT_32(1)
+#define SUP_TSCDELTA_MEASURE_F_VALID_MASK   UINT32_C(0x00000003)
+SUPR0DECL(int) SUPR0TscDeltaMeasureBySetIndex(PSUPDRVSESSION pSession, uint32_t iCpuSet, uint32_t fFlags,
+                                              RTMSINTERVAL cMsWaitRetry, RTMSINTERVAL cMsWaitThread, uint32_t cTries);
 
 /** @name Absolute symbols

trunk/include/VBox/vmm/cpum.h

@@ -1336 +1336 @@
 VMMR0_INT_DECL(void)    CPUMR0LoadHyperDebugState(PVMCPU pVCpu, bool fDr6);
 #ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
-VMMR0_INT_DECL(void)    CPUMR0SetLApic(PVMCPU pVCpu, RTCPUID idHostCpu);
+VMMR0_INT_DECL(void)    CPUMR0SetLApic(PVMCPU pVCpu, uint32_t iHostCpuSet);
 #endif
 

trunk/src/VBox/HostDrivers/Support/SUPDrv.cpp

@@ -180 +180 @@
     { "SUPR0PageFree",                          (void *)SUPR0PageFree },
     { "SUPR0Printf",                            (void *)SUPR0Printf },
+    { "SUPR0TscDeltaMeasureBySetIndex",         (void *)SUPR0TscDeltaMeasureBySetIndex },
     { "SUPR0TracerDeregisterDrv",               (void *)SUPR0TracerDeregisterDrv },
     { "SUPR0TracerDeregisterImpl",              (void *)SUPR0TracerDeregisterImpl },

trunk/src/VBox/HostDrivers/Support/SUPDrvGip.cpp

@@ -2793 +2793 @@
  *
  * @returns VBox status code.
+ * @retval  VERR_SUPDRV_TSC_DELTA_MEASUREMENT_FAILED on pure measurement
+ *          failure.
  * @param   pDevExt         Pointer to the device instance data.
  * @param   idxWorker       The index of the worker CPU from the GIP's array of
@@ -3403 +3405 @@
 }
 
-
 #endif /* SUPDRV_USE_TSC_DELTA_THREAD */
+
+/**
+ * Measure the TSC delta for the CPU given by its CPU set index.
+ *
+ * @returns VBox status code.
+ * @retval  VERR_INTERRUPTED if interrupted while waiting.
+ * @retval  VERR_SUPDRV_TSC_DELTA_MEASUREMENT_FAILED if we were unable to get a
+ *          measurment.
+ * @retval  VERR_CPU_OFFLINE if the specified CPU is offline.
+ * @retval  VERR_CPU_OFFLINE if the specified CPU is offline.
+ *
+ * @param   pSession        The caller's session.  GIP must've been mapped.
+ * @param   iCpuSet         The CPU set index of the CPU to measure.
+ * @param   fFlags          Flags, SUP_TSCDELTA_MEASURE_F_XXX.
+ * @param   cMsWaitRetry    Number of milliseconds to wait between each retry.
+ * @param   cMsWaitThread   Number of milliseconds to wait for the thread to get
+ *                          ready.
+ * @param   cTries          Number of times to try, pass 0 for the default.
+ */
+SUPR0DECL(int) SUPR0TscDeltaMeasureBySetIndex(PSUPDRVSESSION pSession, uint32_t iCpuSet, uint32_t fFlags,
+                                              RTMSINTERVAL cMsWaitRetry, RTMSINTERVAL cMsWaitThread, uint32_t cTries)
+{
+    PSUPDRVDEVEXT       pDevExt;
+    PSUPGLOBALINFOPAGE  pGip;
+    uint16_t            iGipCpu;
+    int                 rc;
+#ifdef SUPDRV_USE_TSC_DELTA_THREAD
+    uint64_t            msTsStartWait;
+    uint32_t            iWaitLoop;
+#endif
+
+    /*
+     * Validate and adjust the input.
+     */
+    AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
+    if (!pSession->fGipReferenced)
+        return VERR_WRONG_ORDER;
+
+    pDevExt = pSession->pDevExt;
+    AssertReturn(SUP_IS_DEVEXT_VALID(pDevExt), VERR_INVALID_PARAMETER);
+
+    pGip = pDevExt->pGip;
+    AssertPtrReturn(pGip, VERR_INTERNAL_ERROR_2);
+
+    AssertReturn(iCpuSet < RTCPUSET_MAX_CPUS, VERR_INVALID_CPU_INDEX);
+    AssertReturn(iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx), VERR_INVALID_CPU_INDEX);
+    iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
+    AssertReturn(iGipCpu < pGip->cCpus, VERR_INVALID_CPU_INDEX);
+
+    if (fFlags & ~SUP_TSCDELTA_MEASURE_F_VALID_MASK)
+        return VERR_INVALID_FLAGS;
+
+    if (cTries == 0)
+        cTries = 12;
+    else if (cTries > 256)
+        cTries = 256;
+
+    if (cMsWaitRetry > 1000)
+        cMsWaitRetry = 1000;
+
+    /*
+     * The request is a noop if the TSC delta isn't being used.
+     */
+    if (pGip->enmUseTscDelta <= SUPGIPUSETSCDELTA_ZERO_CLAIMED)
+        return VINF_SUCCESS;
+
+#ifdef SUPDRV_USE_TSC_DELTA_THREAD
+    /*
+     * Has the TSC already been measured and we're not forced to redo it?
+     */
+    if (   pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX
+        && !(fFlags & SUP_TSCDELTA_MEASURE_F_FORCE))
+        return VINF_SUCCESS;
+
+    /*
+     * Asynchronous request? Forward it to the thread, no waiting.
+     */
+    if (fFlags & SUP_TSCDELTA_MEASURE_F_ASYNC)
+    {
+        /** @todo Async. doesn't implement options like retries, waiting. We'll need
+         *        to pass those options to the thread somehow and implement it in the
+         *        thread. Check if anyone uses/needs fAsync before implementing this. */
+        RTSpinlockAcquire(pDevExt->hTscDeltaSpinlock);
+        RTCpuSetAddByIndex(&pDevExt->TscDeltaCpuSet, iCpuSet);
+        if (   pDevExt->enmTscDeltaThreadState == kTscDeltaThreadState_Listening
+            || pDevExt->enmTscDeltaThreadState == kTscDeltaThreadState_Measuring)
+        {
+            pDevExt->enmTscDeltaThreadState = kTscDeltaThreadState_WaitAndMeasure;
+            rc = VINF_SUCCESS;
+        }
+        else
+            rc = VERR_THREAD_IS_DEAD;
+        RTSpinlockRelease(pDevExt->hTscDeltaSpinlock);
+        RTThreadUserSignal(pDevExt->hTscDeltaThread);
+        return VINF_SUCCESS;
+    }
+
+    /*
+     * If a TSC-delta measurement request is already being serviced by the thread,
+     * wait 'cTries' times if a retry-timeout is provided, otherwise bail as busy.
+     */
+    msTsStartWait = RTTimeSystemMilliTS();
+    for (iWaitLoop = 0;; iWaitLoop++)
+    {
+        uint64_t cMsElapsed;
+        SUPDRVTSCDELTATHREADSTATE enmState;
+        RTSpinlockAcquire(pDevExt->hTscDeltaSpinlock);
+        enmState = pDevExt->enmTscDeltaThreadState;
+        RTSpinlockRelease(pDevExt->hTscDeltaSpinlock);
+
+        if (enmState == kTscDeltaThreadState_Measuring)
+        { /* Must wait, the thread is busy. */ }
+        else if (enmState == kTscDeltaThreadState_WaitAndMeasure)
+        { /* Must wait, this state only says what will happen next. */ }
+        else if (enmState == kTscDeltaThreadState_Terminating)
+        { /* Must wait, this state only says what should happen next. */ }
+        else
+            break; /* All other states, the thread is either idly listening or dead. */
+
+        /* Wait or fail. */
+        if (cMsWaitThread == 0)
+            return VERR_SUPDRV_TSC_DELTA_MEASUREMENT_BUSY;
+        cMsElapsed = RTTimeSystemMilliTS() - msTsStartWait;
+        if (cMsElapsed >= cMsWaitThread)
+            return VERR_SUPDRV_TSC_DELTA_MEASUREMENT_BUSY;
+
+        rc = RTThreadSleep(RT_MIN(cMsWaitThread - cMsElapsed, RT_MIN(iWaitLoop + 1, 10)));
+        if (rc == VERR_INTERRUPTED)
+            return rc;
+    }
+#endif /* SUPDRV_USE_TSC_DELTA_THREAD */
+
+    /*
+     * Try measure the TSC delta the given number of times.
+     */
+    for (;;)
+    {
+        /* Unless we're forced to measure the delta, check whether it's done already. */
+        if (   !(fFlags & SUP_TSCDELTA_MEASURE_F_FORCE)
+            && pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX)
+        {
+            rc = VINF_SUCCESS;
+            break;
+        }
+
+        /* Measure it. */
+        rc = supdrvMeasureTscDeltaOne(pDevExt, iGipCpu);
+        if (rc != VERR_SUPDRV_TSC_DELTA_MEASUREMENT_FAILED)
+        {
+            Assert(pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX || RT_FAILURE_NP(rc));
+            break;
+        }
+
+        /* Retry? */
+        if (cTries <= 1)
+            break;
+        cTries--;
+
+        if (cMsWaitRetry)
+        {
+            rc = RTThreadSleep(cMsWaitRetry);
+            if (rc == VERR_INTERRUPTED)
+                break;
+        }
+    }
+
+    return rc;
+}
 
 
@@ -3417 +3586 @@
 int VBOXCALL supdrvIOCtl_TscDeltaMeasure(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPTSCDELTAMEASURE pReq)
 {
-    PSUPGLOBALINFOPAGE pGip;
-    RTCPUID            idCpuWorker;
-    int                rc;
-    int16_t            cTries;
-    RTMSINTERVAL       cMsWaitRetry;
-    uint16_t           iCpu;
-
-    /*
-     * Validate.
+    uint32_t        cTries;
+    uint32_t        iCpuSet;
+    uint32_t        fFlags;
+    RTMSINTERVAL    cMsWaitRetry;
+
+    /*
+     * Validate and adjust/resolve the input so they can be passed onto SUPR0TscDeltaMeasureBySetIndex.
      */
     AssertPtr(pDevExt); AssertPtr(pSession); AssertPtr(pReq); /* paranoia^2 */
-    if (pSession->GipMapObjR3 == NIL_RTR0MEMOBJ)
-        return VERR_WRONG_ORDER;
-    pGip = pDevExt->pGip;
-    AssertReturn(pGip, VERR_INTERNAL_ERROR_2);
-
-    idCpuWorker = pReq->u.In.idCpu;
-    if (idCpuWorker == NIL_RTCPUID)
+
+    if (pReq->u.In.idCpu == NIL_RTCPUID)
         return VERR_INVALID_CPU_ID;
-    cTries       = RT_MAX(pReq->u.In.cRetries + 1, 10);
+    iCpuSet = RTMpCpuIdToSetIndex(pReq->u.In.idCpu);
+    if (iCpuSet >= RTCPUSET_MAX_CPUS)
+        return VERR_INVALID_CPU_ID;
+
+    cTries = pReq->u.In.cRetries == 0 ? 0 : (uint32_t)pReq->u.In.cRetries + 1;
+
     cMsWaitRetry = RT_MAX(pReq->u.In.cMsWaitRetry, 5);
 
-    /*
-     * The request is a noop if the TSC delta isn't being used.
-     */
-    pGip = pDevExt->pGip;
-    if (pGip->enmUseTscDelta <= SUPGIPUSETSCDELTA_ZERO_CLAIMED)
-        return VINF_SUCCESS;
-
-    rc = VERR_CPU_NOT_FOUND;
-    for (iCpu = 0; iCpu < pGip->cCpus; iCpu++)
-    {
-        PSUPGIPCPU pGipCpuWorker = &pGip->aCPUs[iCpu];
-        if (pGipCpuWorker->idCpu == idCpuWorker)
-        {
-            if (   pGipCpuWorker->i64TSCDelta != INT64_MAX
-                && !pReq->u.In.fForce)
-                return VINF_SUCCESS;
-
-#ifdef SUPDRV_USE_TSC_DELTA_THREAD
-            if (pReq->u.In.fAsync)
-            {
-                /** @todo Async. doesn't implement options like retries, waiting. We'll need
-                 *        to pass those options to the thread somehow and implement it in the
-                 *        thread. Check if anyone uses/needs fAsync before implementing this. */
-                RTSpinlockAcquire(pDevExt->hTscDeltaSpinlock);
-                RTCpuSetAddByIndex(&pDevExt->TscDeltaCpuSet, pGipCpuWorker->iCpuSet);
-                if (   pDevExt->enmTscDeltaThreadState == kTscDeltaThreadState_Listening
-                    || pDevExt->enmTscDeltaThreadState == kTscDeltaThreadState_Measuring)
-                {
-                    pDevExt->enmTscDeltaThreadState = kTscDeltaThreadState_WaitAndMeasure;
-                }
-                RTSpinlockRelease(pDevExt->hTscDeltaSpinlock);
-                RTThreadUserSignal(pDevExt->hTscDeltaThread);
-                return VINF_SUCCESS;
-            }
-
-            /*
-             * If a TSC-delta measurement request is already being serviced by the thread,
-             * wait 'cTries' times if a retry-timeout is provided, otherwise bail as busy.
-             */
-            while (cTries-- > 0)
-            {
-                SUPDRVTSCDELTATHREADSTATE enmState;
-                RTSpinlockAcquire(pDevExt->hTscDeltaSpinlock);
-                enmState = pDevExt->enmTscDeltaThreadState;
-                RTSpinlockRelease(pDevExt->hTscDeltaSpinlock);
-
-                if (   enmState == kTscDeltaThreadState_Measuring
-                    || enmState == kTscDeltaThreadState_WaitAndMeasure)
-                {
-                    if (   !cTries
-                        || !cMsWaitRetry)
-                        return VERR_SUPDRV_TSC_DELTA_MEASUREMENT_BUSY;
-                    if (cMsWaitRetry)
-                        RTThreadSleep(cMsWaitRetry);
-                }
-            }
-            cTries = RT_MAX(pReq->u.In.cRetries + 1, 10);
-#endif
-
-            while (cTries-- > 0)
-            {
-                rc = supdrvMeasureTscDeltaOne(pDevExt, iCpu);
-                if (RT_SUCCESS(rc))
-                {
-                    Assert(pGipCpuWorker->i64TSCDelta != INT64_MAX);
-                    break;
-                }
-
-                if (cMsWaitRetry)
-                    RTThreadSleep(cMsWaitRetry);
-            }
-
-            break;
-        }
-    }
-    return rc;
+    fFlags = 0;
+    if (pReq->u.In.fAsync)
+        fFlags |= SUP_TSCDELTA_MEASURE_F_ASYNC;
+    if (pReq->u.In.fForce)
+        fFlags |= SUP_TSCDELTA_MEASURE_F_FORCE;
+
+    return SUPR0TscDeltaMeasureBySetIndex(pSession, iCpuSet, fFlags, cMsWaitRetry,
+                                          cTries == 0 ? 5*RT_MS_1SEC : cMsWaitRetry * cTries /*cMsWaitThread*/,
+                                          cTries);
 }
 

trunk/src/VBox/HostDrivers/Support/SUPDrvIOC.h

@@ -213 +213 @@
  *
  * @todo Pending work on next major version change:
- *          - Fix SUPTSCREAD padding (#if 0 -> #if 1).
- */
-#define SUPDRV_IOC_VERSION                              0x001f0001
+ *          - (nothing)
+ */
+#define SUPDRV_IOC_VERSION                              0x001f0002
 
 /** SUP_IOCTL_COOKIE. */

trunk/src/VBox/HostDrivers/Support/SUPLib.cpp

@@ -280 +280 @@
         CookieReq.u.In.u32ReqVersion = SUPDRV_IOC_VERSION;
         const uint32_t uMinVersion = (SUPDRV_IOC_VERSION & 0xffff0000) == 0x001f0000
-                                   ? 0x001f0001
+                                   ? 0x001f0002
                                    : SUPDRV_IOC_VERSION & 0xffff0000;
         CookieReq.u.In.u32MinVersion = uMinVersion;

trunk/src/VBox/HostDrivers/linux/load.sh

@@ -24 +24 @@
 
 set -e
-kmk -C "${MY_DIR}/src/vboxdrv" "$@"
+make -C "${MY_DIR}/src/vboxdrv" "$@"
 sudo make -C "${MY_DIR}/src/" unload
 echo "Installing SUPDrv (aka VBoxDrv/vboxdrv)"

trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp

@@ -998 +998 @@
  * @param   pVCpu       Pointer to the cross context CPU structure of the
  *                      calling EMT.
- * @param   idHostCpu   The ID of the current host CPU.
- */
-VMMR0_INT_DECL(void) CPUMR0SetLApic(PVMCPU pVCpu, RTCPUID idHostCpu)
-{
-    int idxCpu = RTMpCpuIdToSetIndex(idHostCpu);
-    pVCpu->cpum.s.pvApicBase = g_aLApics[idxCpu].pv;
-    pVCpu->cpum.s.fX2Apic    = g_aLApics[idxCpu].fX2Apic;
+ * @param   iHostCpuSet The CPU set index of the current host CPU.
+ */
+VMMR0_INT_DECL(void) CPUMR0SetLApic(PVMCPU pVCpu, uint32_t iHostCpuSet)
+{
+    Assert(iHostCpuSet <= RT_ELEMENTS(g_aLApics));
+    pVCpu->cpum.s.pvApicBase = g_aLApics[iHostCpuSet].pv;
+    pVCpu->cpum.s.fX2Apic    = g_aLApics[iHostCpuSet].fX2Apic;
 //    Log6(("CPUMR0SetLApic: pvApicBase=%p fX2Apic=%d\n", g_aLApics[idxCpu].pv, g_aLApics[idxCpu].fX2Apic));
 }

trunk/src/VBox/VMM/VMMR0/VMMR0.cpp

@@ -566 +566 @@
 
             /* We need to update the VCPU <-> host CPU mapping. */
-            RTCPUID idHostCpu  = RTMpCpuId();
-            pVCpu->iHostCpuSet = RTMpCpuIdToSetIndex(idHostCpu);
+            RTCPUID idHostCpu    = RTMpCpuId();
+            uint32_t iHostCpuSet = RTMpCpuIdToSetIndex(idHostCpu);
+            pVCpu->iHostCpuSet   = iHostCpuSet;
             ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
+
+            /* In the very unlikely event that the GIP delta for the CPU we're
+               rescheduled needs calculating, try force a return to ring-3.
+               We unfortunately cannot do the measurements right here. */
+            if (RT_UNLIKELY(SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
+                VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3);
 
             /* Invoke the HM-specific thread-context callback. */
@@ -862 +869 @@
 #endif
 
-            /* Disable preemption and update the periodic preemption timer. */
+            /*
+             * Disable preemption.
+             */
             RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
             RTThreadPreemptDisable(&PreemptState);
-            RTCPUID idHostCpu = RTMpCpuId();
+
+            /*
+             * Get the host CPU identifiers, make sure they are valid and that
+             * we've got a TSC delta for the CPU.
+             */
+            RTCPUID  idHostCpu   = RTMpCpuId();
+            uint32_t iHostCpuSet = RTMpCpuIdToSetIndex(idHostCpu);
+            if (RT_LIKELY(   iHostCpuSet < RTCPUSET_MAX_CPUS
+                          && SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
+            {
+                /*
+                 * Commit the CPU identifiers and update the periodict preemption timer if it's active.
+                 */
 #ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
-            CPUMR0SetLApic(pVCpu, idHostCpu);
-#endif
-            pVCpu->iHostCpuSet = RTMpCpuIdToSetIndex(idHostCpu);
-            ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
-            if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
-                GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
-
-            /* We might need to disable VT-x if the active switcher turns off paging. */
-            bool fVTxDisabled;
-            int rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
-            if (RT_SUCCESS(rc))
+                CPUMR0SetLApic(pVCpu, iHostCpuSet);
+#endif
+                pVCpu->iHostCpuSet = iHostCpuSet;
+                ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
+
+                if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
+                    GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
+
+                /*
+                 * We might need to disable VT-x if the active switcher turns off paging.
+                  */
+                bool fVTxDisabled;
+                int rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
+                if (RT_SUCCESS(rc))
+                {
+                    /*
+                     * Disable interrupts and run raw-mode code.  The loop is for efficiently
+                     * dispatching tracepoints that fired in raw-mode context.
+                     */
+                    RTCCUINTREG uFlags = ASMIntDisableFlags();
+
+                    for (;;)
+                    {
+                        VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);
+                        TMNotifyStartOfExecution(pVCpu);
+
+                        rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
+                        pVCpu->vmm.s.iLastGZRc = rc;
+
+                        TMNotifyEndOfExecution(pVCpu);
+                        VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
+
+                        if (rc != VINF_VMM_CALL_TRACER)
+                            break;
+                        SUPR0TracerUmodProbeFire(pVM->pSession, &pVCpu->vmm.s.TracerCtx);
+                    }
+
+                    /*
+                     * Re-enable VT-x before we dispatch any pending host interrupts and
+                     * re-enables interrupts.
+                     */
+                    HMR0LeaveSwitcher(pVM, fVTxDisabled);
+
+                    if (    rc == VINF_EM_RAW_INTERRUPT
+                        ||  rc == VINF_EM_RAW_INTERRUPT_HYPER)
+                        TRPMR0DispatchHostInterrupt(pVM);
+
+                    ASMSetFlags(uFlags);
+
+                    /* Fire dtrace probe and collect statistics. */
+                    VBOXVMM_R0_VMM_RETURN_TO_RING3_RC(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
+#ifdef VBOX_WITH_STATISTICS
+                    STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
+                    vmmR0RecordRC(pVM, pVCpu, rc);
+#endif
+                }
+                else
+                    pVCpu->vmm.s.iLastGZRc = rc;
+
+                /*
+                 * Invalidate the host CPU identifiers as we restore preemption.
+                 */
+                pVCpu->iHostCpuSet = UINT32_MAX;
+                ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
+
+                RTThreadPreemptRestore(&PreemptState);
+            }
+            /*
+             * Invalid CPU set index or TSC delta in need of measuring.
+             */
+            else
             {
-                RTCCUINTREG uFlags = ASMIntDisableFlags();
-
-                for (;;)
+                RTThreadPreemptRestore(&PreemptState);
+                if (iHostCpuSet < RTCPUSET_MAX_CPUS)
                 {
-                    VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);
-                    TMNotifyStartOfExecution(pVCpu);
-
-                    rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
-                    pVCpu->vmm.s.iLastGZRc = rc;
-
-                    TMNotifyEndOfExecution(pVCpu);
-                    VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
-
-                    if (rc != VINF_VMM_CALL_TRACER)
-                        break;
-                    SUPR0TracerUmodProbeFire(pVM->pSession, &pVCpu->vmm.s.TracerCtx);
+                    int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /*fFlags*/,
+                                                            2 /*cMsWaitRetry*/, 5*RT_MS_1SEC /*cMsWaitThread*/,
+                                                            0 /*default cTries*/);
+                    if (RT_SUCCESS(rc) || rc == VERR_CPU_OFFLINE)
+                        pVCpu->vmm.s.iLastGZRc = VINF_EM_RAW_TO_R3;
+                    else
+                        pVCpu->vmm.s.iLastGZRc = rc;
                 }
-
-                /* Re-enable VT-x if previously turned off. */
-                HMR0LeaveSwitcher(pVM, fVTxDisabled);
-
-                if (    rc == VINF_EM_RAW_INTERRUPT
-                    ||  rc == VINF_EM_RAW_INTERRUPT_HYPER)
-                    TRPMR0DispatchHostInterrupt(pVM);
-
-                ASMSetFlags(uFlags);
-
-                VBOXVMM_R0_VMM_RETURN_TO_RING3_RC(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
-#ifdef VBOX_WITH_STATISTICS
-                STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
-                vmmR0RecordRC(pVM, pVCpu, rc);
-#endif
+                else
+                    pVCpu->vmm.s.iLastGZRc = VERR_INVALID_CPU_INDEX;
             }
-            else
-                pVCpu->vmm.s.iLastGZRc = rc;
-            pVCpu->iHostCpuSet = UINT32_MAX;
-            ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
-            RTThreadPreemptRestore(&PreemptState);
             break;
         }
@@ -925 +982 @@
         case VMMR0_DO_HM_RUN:
         {
+            /*
+             * Disable preemption.
+             */
             Assert(!VMMR0ThreadCtxHooksAreRegistered(pVCpu));
             RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
             RTThreadPreemptDisable(&PreemptState);
 
-            /* Update the VCPU <-> host CPU mapping before doing anything else. */
-            RTCPUID  idHostCpu = RTMpCpuId();
-            pVCpu->iHostCpuSet = RTMpCpuIdToSetIndex(idHostCpu);
-            ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
-
-            if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
-                GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
+            /*
+             * Get the host CPU identifiers, make sure they are valid and that
+             * we've got a TSC delta for the CPU.
+             */
+            RTCPUID  idHostCpu   = RTMpCpuId();
+            uint32_t iHostCpuSet = RTMpCpuIdToSetIndex(idHostCpu);
+            if (RT_LIKELY(   iHostCpuSet < RTCPUSET_MAX_CPUS
+                          && SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
+            {
+                pVCpu->iHostCpuSet = iHostCpuSet;
+                ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
+
+                /*
+                 * Update the periodict preemption timer if it's active.
+                 */
+                if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
+                    GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
+
 #ifdef LOG_ENABLED
-            if (pVCpu->idCpu > 0)
-            {
-                /* Lazy registration of ring 0 loggers. */
-                PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
-                if (    pR0Logger
-                    &&  !pR0Logger->fRegistered)
+                /*
+                 * Ugly: Lazy registration of ring 0 loggers.
+                 */
+                if (pVCpu->idCpu > 0)
                 {
-                    RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
-                    pR0Logger->fRegistered = true;
+                    PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
+                    if (    pR0Logger
+                        && RT_UNLIKELY(!pR0Logger->fRegistered))
+                    {
+                        RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
+                        pR0Logger->fRegistered = true;
+                    }
                 }
+#endif
+
+                int  rc;
+                bool fPreemptRestored = false;
+                if (!HMR0SuspendPending())
+                {
+                    /*
+                     * Register thread-context hooks if required.
+                     */
+                    if (    VMMR0ThreadCtxHooksAreCreated(pVCpu)
+                        && !VMMR0ThreadCtxHooksAreRegistered(pVCpu))
+                    {
+                        rc = VMMR0ThreadCtxHooksRegister(pVCpu, vmmR0ThreadCtxCallback);
+                        AssertRC(rc);
+                    }
+
+                    /*
+                     * Enter HM context.
+                     */
+                    rc = HMR0Enter(pVM, pVCpu);
+                    if (RT_SUCCESS(rc))
+                    {
+                        VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_HM);
+
+                        /*
+                         * When preemption hooks are in place, enable preemption now that
+                         * we're in HM context.
+                         */
+                        if (VMMR0ThreadCtxHooksAreRegistered(pVCpu))
+                        {
+                            fPreemptRestored = true;
+                            RTThreadPreemptRestore(&PreemptState);
+                        }
+
+                        /*
+                         * Setup the longjmp machinery and execute guest code (calls HMR0RunGuestCode).
+                         */
+                        rc = vmmR0CallRing3SetJmp(&pVCpu->vmm.s.CallRing3JmpBufR0, HMR0RunGuestCode, pVM, pVCpu);
+
+                        /*
+                         * Assert sanity on the way out.  Using manual assertions code here as normal
+                         * assertions are going to panic the host since we're outside the setjmp/longjmp zone.
+                         */
+                        if (RT_UNLIKELY(   VMCPU_GET_STATE(pVCpu) != VMCPUSTATE_STARTED_HM
+                                        && RT_SUCCESS_NP(rc)  && rc !=  VINF_VMM_CALL_HOST ))
+                        {
+                            pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
+                            RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
+                                        "Got VMCPU state %d expected %d.\n", VMCPU_GET_STATE(pVCpu), VMCPUSTATE_STARTED_HM);
+                            rc = VERR_VMM_WRONG_HM_VMCPU_STATE;
+                        }
+                        else if (RT_UNLIKELY(VMMR0ThreadCtxHooksAreRegistered(pVCpu)))
+                        {
+                            pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
+                            RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
+                                        "Thread-context hooks still registered! VCPU=%p Id=%u rc=%d.\n", pVCpu, pVCpu->idCpu, rc);
+                            rc = VERR_INVALID_STATE;
+                        }
+
+                        VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
+                    }
+                    STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
+                }
+                /*
+                 * The system is about to go into suspend mode; go back to ring 3.
+                 */
+                else
+                    rc = VINF_EM_RAW_INTERRUPT;
+
+                pVCpu->vmm.s.iLastGZRc = rc;
+
+                /*
+                 * Invalidate the host CPU identifiers as we restore preemption.
+                 */
+                pVCpu->iHostCpuSet = UINT32_MAX;
+                ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
+
+                if (!fPreemptRestored)
+                    RTThreadPreemptRestore(&PreemptState);
+
+                /* Fire dtrace probe and collect statistics. */
+                VBOXVMM_R0_VMM_RETURN_TO_RING3_HM(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
+#ifdef VBOX_WITH_STATISTICS
+                vmmR0RecordRC(pVM, pVCpu, rc);
+#endif
             }
-#endif
-
-            int  rc;
-            bool fPreemptRestored = false;
-            if (!HMR0SuspendPending())
-            {
-                /* Register thread-context hooks if required. */
-                if (    VMMR0ThreadCtxHooksAreCreated(pVCpu)
-                    && !VMMR0ThreadCtxHooksAreRegistered(pVCpu))
-                {
-                    rc = VMMR0ThreadCtxHooksRegister(pVCpu, vmmR0ThreadCtxCallback);
-                    AssertRC(rc);
-                }
-
-                /* Enter HM context. */
-                rc = HMR0Enter(pVM, pVCpu);
-                if (RT_SUCCESS(rc))
-                {
-                    VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_HM);
-
-                    /* When preemption hooks are in place, enable preemption now that we're in HM context. */
-                    if (VMMR0ThreadCtxHooksAreRegistered(pVCpu))
-                    {
-                        fPreemptRestored = true;
-                        RTThreadPreemptRestore(&PreemptState);
-                    }
-
-                    /* Setup the longjmp machinery and execute guest code. */
-                    rc = vmmR0CallRing3SetJmp(&pVCpu->vmm.s.CallRing3JmpBufR0, HMR0RunGuestCode, pVM, pVCpu);
-
-                    /* Manual assert as normal assertions are going to crash in this case. */
-                    if (RT_UNLIKELY(   VMCPU_GET_STATE(pVCpu) != VMCPUSTATE_STARTED_HM
-                                    && RT_SUCCESS_NP(rc)  && rc !=  VINF_VMM_CALL_HOST ))
-                    {
-                        pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
-                        RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
-                                    "Got VMCPU state %d expected %d.\n", VMCPU_GET_STATE(pVCpu), VMCPUSTATE_STARTED_HM);
-                        rc = VERR_VMM_WRONG_HM_VMCPU_STATE;
-                    }
-                    else if (RT_UNLIKELY(VMMR0ThreadCtxHooksAreRegistered(pVCpu)))
-                    {
-                        pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
-                        RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
-                                    "Thread-context hooks still registered! VCPU=%p Id=%u rc=%d.\n", pVCpu, pVCpu->idCpu, rc);
-                        rc = VERR_INVALID_STATE;
-                    }
-
-                    VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
-                }
-                STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
-            }
+            /*
+             * Invalid CPU set index or TSC delta in need of measuring.
+             */
             else
             {
-                /* System is about to go into suspend mode; go back to ring 3. */
-                rc = VINF_EM_RAW_INTERRUPT;
+                RTThreadPreemptRestore(&PreemptState);
+                if (iHostCpuSet < RTCPUSET_MAX_CPUS)
+                {
+                    int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /*fFlags*/,
+                                                            2 /*cMsWaitRetry*/, 5*RT_MS_1SEC /*cMsWaitThread*/,
+                                                            0 /*default cTries*/);
+                    if (RT_SUCCESS(rc) || rc == VERR_CPU_OFFLINE)
+                        pVCpu->vmm.s.iLastGZRc = VINF_EM_RAW_TO_R3;
+                    else
+                        pVCpu->vmm.s.iLastGZRc = rc;
+                }
+                else
+                    pVCpu->vmm.s.iLastGZRc = VERR_INVALID_CPU_INDEX;
             }
-            pVCpu->vmm.s.iLastGZRc = rc;
-
-            /* Clear the VCPU <-> host CPU mapping as we've left HM context. */
-            pVCpu->iHostCpuSet = UINT32_MAX;
-            ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
-
-            if (!fPreemptRestored)
-                RTThreadPreemptRestore(&PreemptState);
-
-            VBOXVMM_R0_VMM_RETURN_TO_RING3_HM(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
-#ifdef VBOX_WITH_STATISTICS
-            vmmR0RecordRC(pVM, pVCpu, rc);
-#endif
-            /* No special action required for external interrupts, just return. */
             break;
         }
@@ -1197 +1305 @@
         case VMMR0_DO_CALL_HYPERVISOR:
         {
-            int rc;
+            /*
+             * Validate input / context.
+             */
+            if (RT_UNLIKELY(idCpu != 0))
+                return VERR_INVALID_CPU_ID;
+            if (RT_UNLIKELY(pVM->cCpus != 1))
+                return VERR_INVALID_PARAMETER;
+            PVMCPU pVCpu = &pVM->aCpus[idCpu];
+#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
+            if (RT_UNLIKELY(!PGMGetHyperCR3(pVCpu)))
+                return VERR_PGM_NO_CR3_SHADOW_ROOT;
+#endif
+
+            /*
+             * Disable interrupts.
+             */
+            RTCCUINTREG fFlags = ASMIntDisableFlags();
+
+            /*
+             * Get the host CPU identifiers, make sure they are valid and that
+             * we've got a TSC delta for the CPU.
+             */
+            RTCPUID  idHostCpu   = RTMpCpuId();
+            uint32_t iHostCpuSet = RTMpCpuIdToSetIndex(idHostCpu);
+            if (RT_UNLIKELY(iHostCpuSet >= RTCPUSET_MAX_CPUS))
+            {
+                ASMSetFlags(fFlags);
+                return VERR_INVALID_CPU_INDEX;
+            }
+            if (RT_UNLIKELY(!SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
+            {
+                ASMSetFlags(fFlags);
+                int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /*fFlags*/,
+                                                        2 /*cMsWaitRetry*/, 5*RT_MS_1SEC /*cMsWaitThread*/,
+                                                        0 /*default cTries*/);
+                if (RT_FAILURE(rc) && rc != VERR_CPU_OFFLINE)
+                    return rc;
+            }
+
+            /*
+             * Commit the CPU identifiers.
+             */
+#ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
+            CPUMR0SetLApic(pVCpu, iHostCpuSet);
+#endif
+            pVCpu->iHostCpuSet = iHostCpuSet;
+            ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
+
+            /*
+             * We might need to disable VT-x if the active switcher turns off paging.
+             */
             bool fVTxDisabled;
-
-#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-            if (RT_UNLIKELY(!PGMGetHyperCR3(VMMGetCpu0(pVM))))
-                return VERR_PGM_NO_CR3_SHADOW_ROOT;
-#endif
-
-            RTCCUINTREG fFlags = ASMIntDisableFlags();
-
-#ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
-            RTCPUID idHostCpu = RTMpCpuId();
-            CPUMR0SetLApic(&pVM->aCpus[0], idHostCpu);
-#endif
-
-            /* We might need to disable VT-x if the active switcher turns off paging. */
-            rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
-            if (RT_FAILURE(rc))
-                return rc;
-
-            rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
-
-            /* Re-enable VT-x if previously turned off. */
-            HMR0LeaveSwitcher(pVM, fVTxDisabled);
-
-            /** @todo dispatch interrupts? */
+            int rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
+            if (RT_SUCCESS(rc))
+            {
+                /*
+                 * Go through the wormhole...
+                 */
+                rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
+
+                /*
+                 * Re-enable VT-x before we dispatch any pending host interrupts.
+                 */
+                HMR0LeaveSwitcher(pVM, fVTxDisabled);
+
+                if (   rc == VINF_EM_RAW_INTERRUPT
+                    || rc == VINF_EM_RAW_INTERRUPT_HYPER)
+                    TRPMR0DispatchHostInterrupt(pVM);
+            }
+
+            /*
+             * Invalidate the host CPU identifiers as we restore interrupts.
+             */
+            pVCpu->iHostCpuSet = UINT32_MAX;
+            ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
             ASMSetFlags(fFlags);
             return rc;