Changeset 54458 in vbox
- Timestamp:
- Feb 24, 2015 4:15:41 PM (10 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/HostDrivers/Support/SUPDrvGip.cpp
r54456 r54458 766 766 uint64_t nsNow; 767 767 uint64_t uTsc; 768 RTCCUINTREG uFlags;768 RTCCUINTREG fEFlags; 769 769 770 770 /* Paranoia. */ … … 805 805 #endif 806 806 807 uFlags= ASMIntDisableFlags();807 fEFlags = ASMIntDisableFlags(); 808 808 uTsc = ASMReadTSC(); 809 809 nsNow = RTTimeSystemNanoTS(); 810 810 idCpu = RTMpCpuId(); 811 ASMSetFlags( uFlags);811 ASMSetFlags(fEFlags); 812 812 813 813 cNsElapsed = nsNow - pDevExt->nsStartInvarTscRefine; … … 919 919 { 920 920 uint64_t u64NanoTS; 921 RTCCUINTREG uFlags;921 RTCCUINTREG fEFlags; 922 922 int rc; 923 923 … … 938 938 ASMNopPause(); 939 939 940 uFlags = ASMIntDisableFlags();940 fEFlags = ASMIntDisableFlags(); 941 941 pDevExt->uTscStartInvarTscRefine = ASMReadTSC(); 942 942 pDevExt->nsStartInvarTscRefine = RTTimeSystemNanoTS(); 943 943 pDevExt->idCpuInvarTscRefine = RTMpCpuId(); 944 ASMSetFlags( uFlags);944 ASMSetFlags(fEFlags); 945 945 946 946 /** @todo we need a power management callback that disables the timer if the … … 1003 1003 DECLCALLBACK(void) supdrvGipInitReadTscAndNanoTsOnCpu(RTCPUID idCpu, void *pvUser1, void *pvUser2) 1004 1004 { 1005 RTCCUINTREG uFlags= ASMIntDisableFlags();1005 RTCCUINTREG fEFlags = ASMIntDisableFlags(); 1006 1006 uint64_t *puTscStop = (uint64_t *)pvUser1; 1007 1007 uint64_t *pnsStop = (uint64_t *)pvUser2; … … 1010 1010 *pnsStop = RTTimeSystemNanoTS(); 1011 1011 1012 ASMSetFlags( uFlags);1012 ASMSetFlags(fEFlags); 1013 1013 } 1014 1014 … … 1036 1036 while (cTriesLeft-- > 0) 1037 1037 { 1038 RTCCUINTREG uFlags;1038 RTCCUINTREG fEFlags; 1039 1039 uint64_t nsStart; 1040 1040 uint64_t nsStop; … … 1055 1055 * Read the TSC and current time, noting which CPU we're on. 1056 1056 */ 1057 uFlags = ASMIntDisableFlags();1057 fEFlags = ASMIntDisableFlags(); 1058 1058 uTscStart = ASMReadTSC(); 1059 1059 nsStart = RTTimeSystemNanoTS(); 1060 1060 idCpuStart = RTMpCpuId(); 1061 ASMSetFlags( uFlags);1061 ASMSetFlags(fEFlags); 1062 1062 1063 1063 /* … … 1098 1098 * Read the TSC and time again. 1099 1099 */ 1100 uFlags = ASMIntDisableFlags();1100 fEFlags = ASMIntDisableFlags(); 1101 1101 uTscStop = ASMReadTSC(); 1102 1102 nsStop = RTTimeSystemNanoTS(); 1103 1103 idCpuStop = RTMpCpuId(); 1104 ASMSetFlags( uFlags);1104 ASMSetFlags(fEFlags); 1105 1105 1106 1106 /* … … 2828 2828 } 2829 2829 2830 #define TSCDELTA_MASTER_SYNC_BEFORE(a_pMySync, a_pOtherSync) \ 2831 if (true) { \ 2832 if (RT_LIKELY(supdrvTscDeltaSync2_Before(a_pMySync, a_pOtherSync, true /*fMaster*/, &uFlags))) \ 2833 { /*likely*/ } \ 2834 else break; \ 2835 } else do {} while (0) 2836 #define TSCDELTA_OTHER_SYNC_BEFORE(a_pMySync, a_pOtherSync) \ 2837 if (true) { \ 2838 if (RT_LIKELY(supdrvTscDeltaSync2_Before(a_pMySync, a_pOtherSync, false /*fMaster*/, &uFlags))) \ 2839 { /*likely*/ } \ 2840 else break; \ 2841 } else do {} while (0) 2830 #define TSCDELTA_MASTER_SYNC_BEFORE(a_pMySync, a_pOtherSync, a_pfEFlags) \ 2831 if (RT_LIKELY(supdrvTscDeltaSync2_Before(a_pMySync, a_pOtherSync, true /*fMaster*/, a_pfEFlags))) \ 2832 { /*likely*/ } \ 2833 else break 2834 #define TSCDELTA_OTHER_SYNC_BEFORE(a_pMySync, a_pOtherSync, a_pfEFlags) \ 2835 if (RT_LIKELY(supdrvTscDeltaSync2_Before(a_pMySync, a_pOtherSync, false /*fMaster*/, a_pfEFlags))) \ 2836 { /*likely*/ } \ 2837 else break 2842 2838 2843 2839 … … 2867 2863 } 2868 2864 2869 #define TSCDELTA_MASTER_SYNC_AFTER(a_pMySync, a_pOtherSync) \ 2870 if (true) { \ 2871 if (RT_LIKELY(supdrvTscDeltaSync2_After(a_pMySync, a_pOtherSync, uFlags))) \ 2872 { /* likely */ } \ 2873 else break; \ 2874 } else do {} while (0) 2865 #define TSCDELTA_MASTER_SYNC_AFTER(a_pMySync, a_pOtherSync, a_fEFlags) \ 2866 if (RT_LIKELY(supdrvTscDeltaSync2_After(a_pMySync, a_pOtherSync, a_fEFlags))) \ 2867 { /* likely */ } \ 2868 else break 2875 2869 2876 2870 #define TSCDELTA_MASTER_KICK_OTHER_OUT_OF_AFTER(a_pMySync, a_pOtherSync) \ 2877 if (true) { \ 2878 /* \ 2879 * Tell the worker that we're done processing the data and ready for the next round. \ 2880 */ \ 2881 if (RT_LIKELY(ASMAtomicCmpXchgU32(&(a_pOtherSync)->uSyncVar, GIP_TSC_DELTA_SYNC2_READY, GIP_TSC_DELTA_SYNC2_GO))) \ 2882 { /* likely */ } \ 2883 else break; \ 2884 } else do {} while (0) 2885 2886 #define TSCDELTA_OTHER_SYNC_AFTER(a_pMySync, a_pOtherSync) \ 2871 /* \ 2872 * Tell the worker that we're done processing the data and ready for the next round. \ 2873 */ \ 2874 if (RT_LIKELY(ASMAtomicCmpXchgU32(&(a_pOtherSync)->uSyncVar, GIP_TSC_DELTA_SYNC2_READY, GIP_TSC_DELTA_SYNC2_GO))) \ 2875 { /* likely */ } \ 2876 else break 2877 2878 #define TSCDELTA_OTHER_SYNC_AFTER(a_pMySync, a_pOtherSync, a_fEFlags) \ 2887 2879 if (true) { \ 2888 2880 /* \ … … 2893 2885 else \ 2894 2886 { \ 2895 ASMSetFlags( uFlags); \2887 ASMSetFlags(a_fEFlags); \ 2896 2888 break; \ 2897 2889 } \ 2898 if (RT_LIKELY(supdrvTscDeltaSync2_After(a_pMySync, a_pOtherSync, uFlags))) \2890 if (RT_LIKELY(supdrvTscDeltaSync2_After(a_pMySync, a_pOtherSync, a_fEFlags))) \ 2899 2891 { /* likely */ } \ 2900 2892 else break; \ … … 2947 2939 for (iLoop = 0; iLoop < GIP_TSC_DELTA_LOOPS; iLoop++) 2948 2940 { 2949 RTCCUINTREG uFlags;2941 RTCCUINTREG fEFlags; 2950 2942 if (fIsMaster) 2951 2943 { … … 2956 2948 ("%#llx idMaster=%#x idWorker=%#x (idGipMaster=%#x)\n", 2957 2949 pGipCpuMaster->u64TSCSample, pGipCpuMaster->idCpu, pGipCpuWorker->idCpu, pArgs->pDevExt->idGipMaster)); 2958 TSCDELTA_MASTER_SYNC_BEFORE(pMySync, pOtherSync );2950 TSCDELTA_MASTER_SYNC_BEFORE(pMySync, pOtherSync, &fEFlags); 2959 2951 2960 2952 do … … 2964 2956 } while (pGipCpuMaster->u64TSCSample == GIP_TSC_DELTA_RSVD); 2965 2957 2966 TSCDELTA_MASTER_SYNC_AFTER(pMySync, pOtherSync );2958 TSCDELTA_MASTER_SYNC_AFTER(pMySync, pOtherSync, fEFlags); 2967 2959 2968 2960 /* Process the data. */ … … 2994 2986 2995 2987 ASMAtomicReadU64(&pGipCpuMaster->u64TSCSample); /* Warm the cache line. */ 2996 TSCDELTA_OTHER_SYNC_BEFORE(pMySync, pOtherSync );2988 TSCDELTA_OTHER_SYNC_BEFORE(pMySync, pOtherSync, &fEFlags); 2997 2989 2998 2990 /* … … 3029 3021 } 3030 3022 3031 TSCDELTA_OTHER_SYNC_AFTER(pMySync, pOtherSync );3023 TSCDELTA_OTHER_SYNC_AFTER(pMySync, pOtherSync, fEFlags); 3032 3024 } 3033 3025 } … … 3215 3207 for (iLoop = 0; iLoop < GIP_TSC_DELTA_M2_LOOPS; iLoop++) 3216 3208 { 3217 RTCCUINTREG uFlags;3209 RTCCUINTREG fEFlags; 3218 3210 if (fIsMaster) 3219 3211 { … … 3252 3244 * Sync up with the worker and collect data. 3253 3245 */ 3254 TSCDELTA_MASTER_SYNC_BEFORE(pMySync, pOtherSync );3246 TSCDELTA_MASTER_SYNC_BEFORE(pMySync, pOtherSync, &fEFlags); 3255 3247 supdrvTscDeltaMethod2CollectData(pArgs->M2.pMasterData, &pArgs->M2.pWorkerData->iCurSeqNo, pArgs->M2.fLagMaster); 3256 TSCDELTA_MASTER_SYNC_AFTER(pMySync, pOtherSync );3248 TSCDELTA_MASTER_SYNC_AFTER(pMySync, pOtherSync, fEFlags); 3257 3249 3258 3250 /* … … 3271 3263 * The worker. 3272 3264 */ 3273 TSCDELTA_OTHER_SYNC_BEFORE(pMySync, pOtherSync );3265 TSCDELTA_OTHER_SYNC_BEFORE(pMySync, pOtherSync, &fEFlags); 3274 3266 supdrvTscDeltaMethod2CollectData(pArgs->M2.pWorkerData, &pArgs->M2.pMasterData->iCurSeqNo, pArgs->M2.fLagWorker); 3275 TSCDELTA_OTHER_SYNC_AFTER(pMySync, pOtherSync );3267 TSCDELTA_OTHER_SYNC_AFTER(pMySync, pOtherSync, fEFlags); 3276 3268 } 3277 3269 … … 3331 3323 for (;;) 3332 3324 { 3333 RTCCUINTREG uFlags;3325 RTCCUINTREG fEFlags; 3334 3326 AssertCompile((RT_ELEMENTS(pArgs->auVerifyMasterTscs) & 1) == 0); 3335 3327 AssertCompile(RT_ELEMENTS(pArgs->auVerifyWorkerTscs) == RT_ELEMENTS(pArgs->auVerifyMasterTscs)); … … 3338 3330 { 3339 3331 uint64_t uTscWorker; 3340 TSCDELTA_MASTER_SYNC_BEFORE(pMySync, pOtherSync );3332 TSCDELTA_MASTER_SYNC_BEFORE(pMySync, pOtherSync, &fEFlags); 3341 3333 3342 3334 /* … … 3370 3362 } 3371 3363 3372 TSCDELTA_MASTER_SYNC_AFTER(pMySync, pOtherSync );3364 TSCDELTA_MASTER_SYNC_AFTER(pMySync, pOtherSync, fEFlags); 3373 3365 3374 3366 /* … … 3433 3425 * The worker, master leads. 3434 3426 */ 3435 TSCDELTA_OTHER_SYNC_BEFORE(pMySync, pOtherSync );3427 TSCDELTA_OTHER_SYNC_BEFORE(pMySync, pOtherSync, &fEFlags); 3436 3428 3437 3429 for (i = 0; i < RT_ELEMENTS(pArgs->auVerifyWorkerTscs); i += 2) … … 3464 3456 } 3465 3457 3466 TSCDELTA_OTHER_SYNC_AFTER(pMySync, pOtherSync );3458 TSCDELTA_OTHER_SYNC_AFTER(pMySync, pOtherSync, fEFlags); 3467 3459 } 3468 3460 return pArgs->rcVerify; … … 4671 4663 * while we do that. 4672 4664 */ 4673 RTCCUINTREG uFlags= ASMIntDisableFlags();4665 RTCCUINTREG fEFlags = ASMIntDisableFlags(); 4674 4666 int iCpuSet = RTMpCpuIdToSetIndex(RTMpCpuId()); 4675 4667 int iGipCpu; … … 4680 4672 pReq->u.Out.idApic = pGip->aCPUs[iGipCpu].idApic; 4681 4673 pReq->u.Out.u64AdjustedTsc = ASMReadTSC(); 4682 ASMSetFlags( uFlags);4674 ASMSetFlags(fEFlags); 4683 4675 4684 4676 /* … … 4712 4704 pReq->u.Out.idApic = ASMGetApicId(); 4713 4705 pReq->u.Out.u64AdjustedTsc = ASMReadTSC(); 4714 ASMSetFlags( uFlags);4706 ASMSetFlags(fEFlags); 4715 4707 rc = VERR_INTERNAL_ERROR_5; /** @todo change to warning. */ 4716 4708 break; … … 4723 4715 * No delta to apply. Easy. Deal with preemption the lazy way. 4724 4716 */ 4725 RTCCUINTREG uFlags= ASMIntDisableFlags();4717 RTCCUINTREG fEFlags = ASMIntDisableFlags(); 4726 4718 int iCpuSet = RTMpCpuIdToSetIndex(RTMpCpuId()); 4727 4719 int iGipCpu; … … 4732 4724 pReq->u.Out.idApic = ASMGetApicId(); 4733 4725 pReq->u.Out.u64AdjustedTsc = ASMReadTSC(); 4734 ASMSetFlags( uFlags);4726 ASMSetFlags(fEFlags); 4735 4727 rc = VINF_SUCCESS; 4736 4728 }
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