Changeset 54546 in vbox
- Timestamp:
- Feb 27, 2015 11:21:41 AM (10 years ago)
- Location:
- trunk/src/VBox/VMM/VMMSwitcher
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMSwitcher/AMD64andLegacy.mac
r54537 r54546 356 356 je htg_x2apic 357 357 358 ; Legacy xAPIC mode: 358 ; Legacy xAPIC mode. No write completion required when writing to the 359 ; LVT registers as we have mapped the APIC page non-cacheable and the 360 ; MMIO is CPU-local. 359 361 mov rbx, [rdx + r8 + CPUMCPU.pvApicBase] 360 362 or rbx, rbx … … 369 371 or eax, APIC_REG_LVT_MASKED 370 372 mov [rbx + APIC_REG_LVT_LINT0], eax 371 mov eax, [rbx + APIC_REG_LVT_LINT0] ; write completion372 373 htg_nolint0: 373 374 mov eax, [rbx + APIC_REG_LVT_LINT1] … … 379 380 or eax, APIC_REG_LVT_MASKED 380 381 mov [rbx + APIC_REG_LVT_LINT1], eax 381 mov eax, [rbx + APIC_REG_LVT_LINT1] ; write completion382 382 htg_nolint1: 383 383 mov eax, [rbx + APIC_REG_LVT_PC] … … 389 389 or eax, APIC_REG_LVT_MASKED 390 390 mov [rbx + APIC_REG_LVT_PC], eax 391 mov eax, [rbx + APIC_REG_LVT_PC] ; write completion392 391 htg_nopc: 393 392 mov eax, [rbx + APIC_REG_VERSION] … … 405 404 or eax, APIC_REG_LVT_MASKED 406 405 mov [rbx + APIC_REG_LVT_CMCI], eax 407 mov eax, [rbx + APIC_REG_LVT_CMCI] ; write completion408 406 htg_nocmci: 409 407 mov eax, [rbx + APIC_REG_LVT_THMR] … … 415 413 or eax, APIC_REG_LVT_MASKED 416 414 mov [rbx + APIC_REG_LVT_THMR], eax 417 mov eax, [rbx + APIC_REG_LVT_THMR] ; write completion418 415 htg_notherm: 419 416 pop rax … … 436 433 or eax, APIC_REG_LVT_MASKED 437 434 mov [rbx + APIC_REG_EILVT0], eax 438 mov eax, [rbx + APIC_REG_EILVT0] ; write completion439 435 htg_noeilvtx: 440 436 add rbx, 0x10 ; clobbers rbx! -
trunk/src/VBox/VMM/VMMSwitcher/LegacyandAMD64.mac
r54474 r54546 332 332 je htg_x2apic 333 333 334 ; Legacy xAPIC mode: 334 ; Legacy xAPIC mode. No write completion required when writing to the 335 ; LVT registers as we have mapped the APIC pages as non-cacheable and 336 ; the MMIO is CPU-local. 335 337 mov ebx, [edx + CPUMCPU.pvApicBase] 336 338 or ebx, ebx … … 344 346 or eax, APIC_REG_LVT_MASKED 345 347 mov [ebx + APIC_REG_LVT_LINT0], eax 346 mov eax, [ebx + APIC_REG_LVT_LINT0] ; write completion347 348 htg_nolint0: 348 349 mov eax, [ebx + APIC_REG_LVT_LINT1] … … 354 355 or eax, APIC_REG_LVT_MASKED 355 356 mov [ebx + APIC_REG_LVT_LINT1], eax 356 mov eax, [ebx + APIC_REG_LVT_LINT1] ; write completion357 357 htg_nolint1: 358 358 mov eax, [ebx + APIC_REG_LVT_PC] … … 364 364 or eax, APIC_REG_LVT_MASKED 365 365 mov [ebx + APIC_REG_LVT_PC], eax 366 mov eax, [ebx + APIC_REG_LVT_PC] ; write completion367 366 htg_nopc: 368 367 mov eax, [ebx + APIC_REG_VERSION] … … 379 378 or eax, APIC_REG_LVT_MASKED 380 379 mov [ebx + APIC_REG_LVT_CMCI], eax 381 mov eax, [ebx + APIC_REG_LVT_CMCI] ; write completion382 380 htg_nocmci: 383 381 mov eax, [ebx + APIC_REG_LVT_THMR] … … 389 387 or eax, APIC_REG_LVT_MASKED 390 388 mov [ebx + APIC_REG_LVT_THMR], eax 391 mov eax, [ebx + APIC_REG_LVT_THMR] ; write completion392 389 htg_notherm: 393 390 mov [edx + CPUMCPU.fApicDisVectors], edi -
trunk/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac
r54474 r54546 225 225 je htg_x2apic 226 226 227 ; Legacy xAPIC mode: 227 ; Legacy xAPIC mode. No write completion required when writing to the 228 ; LVT registers as we have mapped the APIC page non-cacheable and the 229 ; MMIO is CPU-local. 228 230 mov ebx, [edx + CPUMCPU.pvApicBase] 229 231 or ebx, ebx … … 239 241 or eax, APIC_REG_LVT_MASKED 240 242 mov [ebx + APIC_REG_LVT_LINT0], eax 241 mov eax, [ebx + APIC_REG_LVT_LINT0] ; write completion242 243 htg_nolint0: 243 244 mov eax, [ebx + APIC_REG_LVT_LINT1] … … 249 250 or eax, APIC_REG_LVT_MASKED 250 251 mov [ebx + APIC_REG_LVT_LINT1], eax 251 mov eax, [ebx + APIC_REG_LVT_LINT1] ; write completion252 252 htg_nolint1: 253 253 mov eax, [ebx + APIC_REG_LVT_PC] … … 259 259 or eax, APIC_REG_LVT_MASKED 260 260 mov [ebx + APIC_REG_LVT_PC], eax 261 mov eax, [ebx + APIC_REG_LVT_PC] ; write completion262 261 htg_nopc: 263 262 mov eax, [ebx + APIC_REG_VERSION] … … 274 273 or eax, APIC_REG_LVT_MASKED 275 274 mov [ebx + APIC_REG_LVT_CMCI], eax 276 mov eax, [ebx + APIC_REG_LVT_CMCI] ; write completion277 275 htg_nocmci: 278 276 mov eax, [ebx + APIC_REG_LVT_THMR] … … 284 282 or eax, APIC_REG_LVT_MASKED 285 283 mov [ebx + APIC_REG_LVT_THMR], eax 286 mov eax, [ebx + APIC_REG_LVT_THMR] ; write completion287 284 htg_notherm: 288 285 mov [edx + CPUMCPU.fApicDisVectors], edi
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