Changeset 54862 in vbox
- Timestamp:
- Mar 20, 2015 10:03:23 AM (10 years ago)
- svn:sync-xref-src-repo-rev:
- 99072
- Location:
- trunk
- Files:
-
- 13 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/iprt/x86.h
r54738 r54862 803 803 /** Bit 8 - PCE - Performance-Monitoring Counter Enable. */ 804 804 #define X86_CR4_PCE RT_BIT(8) 805 /** Bit 9 - OSF SXR - Operating System Support for FXSAVE and FXRSTORE instruction. */806 #define X86_CR4_OSF SXR RT_BIT(9)805 /** Bit 9 - OSFXSR - Operating System Support for FXSAVE and FXRSTORE instructions. */ 806 #define X86_CR4_OSFXSR RT_BIT(9) 807 807 /** Bit 10 - OSXMMEEXCPT - Operating System Support for Unmasked SIMD Floating-Point Exceptions. */ 808 808 #define X86_CR4_OSXMMEEXCPT RT_BIT(10) -
trunk/include/iprt/x86.mac
r53626 r54862 228 228 %define X86_CR4_PGE RT_BIT(7) 229 229 %define X86_CR4_PCE RT_BIT(8) 230 %define X86_CR4_OSF SXR RT_BIT(9)230 %define X86_CR4_OSFXSR RT_BIT(9) 231 231 %define X86_CR4_OSXMMEEXCPT RT_BIT(10) 232 232 %define X86_CR4_VMXE RT_BIT(13) -
trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r54760 r54862 747 747 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CR4; 748 748 if (!CPUMSupportsFXSR(pVCpu->CTX_SUFF(pVM))) 749 cr4 &= ~X86_CR4_OSF SXR;749 cr4 &= ~X86_CR4_OSFXSR; 750 750 pVCpu->cpum.s.Guest.cr4 = cr4; 751 751 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r54737 r54862 1549 1549 | X86_CR4_PSE | X86_CR4_PAE 1550 1550 | X86_CR4_MCE | X86_CR4_PGE 1551 | X86_CR4_PCE | X86_CR4_OSF SXR1551 | X86_CR4_PCE | X86_CR4_OSFXSR 1552 1552 | X86_CR4_OSXMMEEXCPT; 1553 1553 //if (xxx) … … 1572 1572 /* Feeling extremely lazy. */ 1573 1573 # ifdef IN_RC 1574 if ( (oldval & (X86_CR4_OSF SXR|X86_CR4_OSXMMEEXCPT|X86_CR4_PCE|X86_CR4_MCE|X86_CR4_PAE|X86_CR4_DE|X86_CR4_TSD|X86_CR4_PVI|X86_CR4_VME))1575 != (val & (X86_CR4_OSF SXR|X86_CR4_OSXMMEEXCPT|X86_CR4_PCE|X86_CR4_MCE|X86_CR4_PAE|X86_CR4_DE|X86_CR4_TSD|X86_CR4_PVI|X86_CR4_VME)))1574 if ( (oldval & (X86_CR4_OSFXSR|X86_CR4_OSXMMEEXCPT|X86_CR4_PCE|X86_CR4_MCE|X86_CR4_PAE|X86_CR4_DE|X86_CR4_TSD|X86_CR4_PVI|X86_CR4_VME)) 1575 != (val & (X86_CR4_OSFXSR|X86_CR4_OSXMMEEXCPT|X86_CR4_PCE|X86_CR4_MCE|X86_CR4_PAE|X86_CR4_DE|X86_CR4_TSD|X86_CR4_PVI|X86_CR4_VME))) 1576 1576 { 1577 1577 Log(("emInterpretMovCRx: CR4: %#RX64->%#RX64 => R3\n", oldval, val)); -
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r54737 r54862 8310 8310 do { \ 8311 8311 if ( (pIemCpu->CTX_SUFF(pCtx)->cr0 & X86_CR0_EM) \ 8312 || !(pIemCpu->CTX_SUFF(pCtx)->cr4 & X86_CR4_OSF SXR) \8312 || !(pIemCpu->CTX_SUFF(pCtx)->cr4 & X86_CR4_OSFXSR) \ 8313 8313 || !IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_SSE2) ) \ 8314 8314 return iemRaiseUndefinedOpcode(pIemCpu); \ -
trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h
r54737 r54862 4977 4977 | X86_CR4_PSE | X86_CR4_PAE 4978 4978 | X86_CR4_MCE | X86_CR4_PGE 4979 | X86_CR4_PCE | X86_CR4_OSF SXR4979 | X86_CR4_PCE | X86_CR4_OSFXSR 4980 4980 | X86_CR4_OSXMMEEXCPT; 4981 4981 //if (xxx) -
trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp
r54737 r54862 340 340 { 341 341 Assert(pVM->cpum.s.CPUFeatures.edx.u1FXSR); 342 Assert(ASMGetCR4() & X86_CR4_OSF SXR);342 Assert(ASMGetCR4() & X86_CR4_OSFXSR); 343 343 344 344 /* If the FPU state has already been loaded, then it's a guest trap. */ … … 461 461 { 462 462 Assert(pVM->cpum.s.CPUFeatures.edx.u1FXSR); 463 Assert(ASMGetCR4() & X86_CR4_OSF SXR);463 Assert(ASMGetCR4() & X86_CR4_OSFXSR); 464 464 AssertReturn((pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU), VINF_SUCCESS); 465 465 NOREF(pVM); NOREF(pCtx); -
trunk/src/VBox/VMM/VMMR3/CPUM.cpp
r54801 r54862 612 612 { 613 613 pVM->cpum.s.CR4.AndMask = X86_CR4_OSXMMEEXCPT | X86_CR4_PVI | X86_CR4_VME; 614 pVM->cpum.s.CR4.OrMask = X86_CR4_OSF SXR;614 pVM->cpum.s.CR4.OrMask = X86_CR4_OSFXSR; 615 615 } 616 616 -
trunk/src/VBox/VMM/VMMR3/CPUMDbg.cpp
r54674 r54862 956 956 DBGFREGSUBFIELD_RW("pge", 7, 1, 0), 957 957 DBGFREGSUBFIELD_RW("pce", 8, 1, 0), 958 DBGFREGSUBFIELD_RW("osf sxr", 9, 1, 0),958 DBGFREGSUBFIELD_RW("osfxsr", 9, 1, 0), 959 959 DBGFREGSUBFIELD_RW("osxmmeexcpt", 10, 1, 0), 960 DBGFREGSUBFIELD_RW("vmxe", 10, 1, 0), 961 DBGFREGSUBFIELD_RW("smxe", 13, 1, 0), 962 DBGFREGSUBFIELD_RW("pcide", 14, 1, 0), 963 DBGFREGSUBFIELD_RW("osxsave", 17, 1, 0), 964 DBGFREGSUBFIELD_RW("smep", 18, 1, 0), 960 DBGFREGSUBFIELD_RW("vmxe", 13, 1, 0), 961 DBGFREGSUBFIELD_RW("smxe", 14, 1, 0), 962 DBGFREGSUBFIELD_RW("pcide", 17, 1, 0), 963 DBGFREGSUBFIELD_RW("osxsave", 18, 1, 0), 964 DBGFREGSUBFIELD_RW("smep", 20, 1, 0), 965 DBGFREGSUBFIELD_RW("smap", 21, 1, 0), 965 966 DBGFREGSUBFIELD_TERMINATOR() 966 967 }; -
trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp
r54844 r54862 2331 2331 //| X86_CPUID_FEATURE_ECX_AES - not implemented yet. 2332 2332 //| X86_CPUID_FEATURE_ECX_XSAVE - not implemented yet. 2333 //| X86_CPUID_FEATURE_ECX_OSXSAVE - not implemented yet.2333 //| X86_CPUID_FEATURE_ECX_OSXSAVE - mirrors CR4.OSXSAVE state 2334 2334 //| X86_CPUID_FEATURE_ECX_AVX - not implemented yet. 2335 2335 //| X86_CPUID_FEATURE_ECX_F16C - not implemented yet. -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r54751 r54862 1050 1050 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PROC_EXEC2_INVPCID); 1051 1051 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PROC_EXEC2_VMFUNC); 1052 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PROC_EXEC2_VMCS_SHADOWING); 1053 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PROC_EXEC2_RDSEED_EXIT); 1054 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PROC_EXEC2_EPT_VE); 1055 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PROC_EXEC2_XSAVES); 1052 1056 } 1053 1057 -
trunk/src/VBox/VMM/VMMR3/VMMTests.cpp
r54308 r54862 666 666 667 667 pHyperCtx->cr0 = X86_CR0_PE | X86_CR0_WP | X86_CR0_PG | X86_CR0_TS | X86_CR0_ET | X86_CR0_NE | X86_CR0_MP; 668 pHyperCtx->cr4 = X86_CR4_PGE | X86_CR4_OSF SXR | X86_CR4_OSXMMEEXCPT;668 pHyperCtx->cr4 = X86_CR4_PGE | X86_CR4_OSFXSR | X86_CR4_OSXMMEEXCPT; 669 669 PGMChangeMode(pVCpu, pHyperCtx->cr0, pHyperCtx->cr4, pHyperCtx->msrEFER); 670 670 PGMSyncCR3(pVCpu, pHyperCtx->cr0, CR3Phys, pHyperCtx->cr4, true); -
trunk/src/VBox/VMM/VMMSwitcher/LegacyandAMD64.mac
r54546 r54862 499 499 ;; 500 500 and esi, X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE | X86_CR4_PSE | X86_CR4_PAE \ 501 | X86_CR4_MCE | X86_CR4_OSF SXR | X86_CR4_OSXMMEEXCPT | X86_CR4_SMXE | X86_CR4_OSXSAVE501 | X86_CR4_MCE | X86_CR4_OSFXSR | X86_CR4_OSXMMEEXCPT | X86_CR4_SMXE | X86_CR4_OSXSAVE 502 502 mov cr4, esi 503 503
Note:
See TracChangeset
for help on using the changeset viewer.