Changeset 54924 in vbox
- Timestamp:
- Mar 24, 2015 3:49:12 PM (10 years ago)
- svn:sync-xref-src-repo-rev:
- 99170
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp
r54920 r54924 4718 4718 DBGFREGSUBFIELD_RO("PGE\0" "PTE Global Bit", 13, 1, 0), 4719 4719 DBGFREGSUBFIELD_RO("MCA\0" "Machine Check Architecture", 14, 1, 0), 4720 DBGFREGSUBFIELD_RO("CMOV\0" "Conditional Move Instructions", 15, 1, 0),4720 DBGFREGSUBFIELD_RO("CMOV\0" "Conditional Move instructions", 15, 1, 0), 4721 4721 DBGFREGSUBFIELD_RO("PAT\0" "Page Attribute Table", 16, 1, 0), 4722 4722 DBGFREGSUBFIELD_RO("PSE-36\0" "36-bit Page Size Extension", 17, 1, 0), 4723 4723 DBGFREGSUBFIELD_RO("PSN\0" "Processor Serial Number", 18, 1, 0), 4724 DBGFREGSUBFIELD_RO("CLFSH\0" "CLFLUSH Instruction", 19, 1, 0),4724 DBGFREGSUBFIELD_RO("CLFSH\0" "CLFLUSH instruction", 19, 1, 0), 4725 4725 DBGFREGSUBFIELD_RO("DS\0" "Debug Store", 21, 1, 0), 4726 4726 DBGFREGSUBFIELD_RO("ACPI\0" "Thermal Mon. & Soft. Clock Ctrl.", 22, 1, 0), 4727 4727 DBGFREGSUBFIELD_RO("MMX\0" "Intel MMX Technology", 23, 1, 0), 4728 DBGFREGSUBFIELD_RO("FXSR\0" "FXSAVE and FXRSTOR Instructions", 24, 1, 0),4729 DBGFREGSUBFIELD_RO("SSE\0" "SSE Support", 25, 1, 0),4730 DBGFREGSUBFIELD_RO("SSE2\0" "SSE2 Support", 26, 1, 0),4728 DBGFREGSUBFIELD_RO("FXSR\0" "FXSAVE and FXRSTOR instructions", 24, 1, 0), 4729 DBGFREGSUBFIELD_RO("SSE\0" "SSE support", 25, 1, 0), 4730 DBGFREGSUBFIELD_RO("SSE2\0" "SSE2 support", 26, 1, 0), 4731 4731 DBGFREGSUBFIELD_RO("SS\0" "Self Snoop", 27, 1, 0), 4732 4732 DBGFREGSUBFIELD_RO("HTT\0" "Hyper-Threading Technology", 28, 1, 0), … … 4739 4739 static DBGFREGSUBFIELD const g_aLeaf1EcxSubFields[] = 4740 4740 { 4741 DBGFREGSUBFIELD_RO("SSE3\0" "S upports SSE3 or not",0, 1, 0),4742 DBGFREGSUBFIELD_RO("PCLMUL\0" "PCLMULQDQ support (for AES-GCM)", 1, 1, 0),4743 DBGFREGSUBFIELD_RO("DTES64\0" "DS Area 64-bit Layout", 2, 1, 0),4744 DBGFREGSUBFIELD_RO("MONITOR\0" " Supports MONITOR/MWAIT", 3, 1, 0),4745 DBGFREGSUBFIELD_RO("CPL-DS\0" "CPL Qualified Debug Store", 4, 1, 0),4746 DBGFREGSUBFIELD_RO("VMX\0" "Virtual Machine Technology",5, 1, 0),4747 DBGFREGSUBFIELD_RO("SMX\0" "Safer Mode Extensions", 6, 1, 0),4748 DBGFREGSUBFIELD_RO("EST\0" "Enh . SpeedStep Tech",7, 1, 0),4749 DBGFREGSUBFIELD_RO("TM2\0" "Terminal Monitor 2", 8, 1, 0),4750 DBGFREGSUBFIELD_RO("SSSE3\0" "Supplemental Streaming SIMD Extensions 3", 9, 1, 0),4751 DBGFREGSUBFIELD_RO("CNTX-ID\0" "L1 Context ID", 10, 1, 0),4752 DBGFREGSUBFIELD_RO("SDBG\0" "Sil licon debug interface",11, 1, 0),4753 DBGFREGSUBFIELD_RO("FMA\0" "F MA Support",12, 1, 0),4754 DBGFREGSUBFIELD_RO("CX16\0" "CMPXCHG16B ",13, 1, 0),4755 DBGFREGSUBFIELD_RO("TPRUPDATE\0" "xTPR Update Control", 14, 1, 0),4756 DBGFREGSUBFIELD_RO("PDCM\0" "Perf/Debug Capability MSR", 15, 1, 0),4757 DBGFREGSUBFIELD_RO("PCID\0" "Process -context identifiers",17, 1, 0),4758 DBGFREGSUBFIELD_RO("DCA\0" "Direct Cache Access", 18, 1, 0),4759 DBGFREGSUBFIELD_RO("SSE4_1\0" "S upports SSE4_1 or not",19, 1, 0),4760 DBGFREGSUBFIELD_RO("SSE4_2\0" "S upports SSE4_2 or not",20, 1, 0),4761 DBGFREGSUBFIELD_RO("X2APIC\0" "x2APIC support", 21, 1, 0),4762 DBGFREGSUBFIELD_RO("MOVBE\0" "MOVBE instruction", 22, 1, 0),4763 DBGFREGSUBFIELD_RO("POPCNT\0" "POPCNT instruction", 23, 1, 0),4764 DBGFREGSUBFIELD_RO("TSCDEADL\0" "T SC-Deadline",24, 1, 0),4765 DBGFREGSUBFIELD_RO("AES\0" "AES instructions", 25, 1, 0),4766 DBGFREGSUBFIELD_RO("XSAVE\0" "XSAVE instruction", 26, 1, 0),4767 DBGFREGSUBFIELD_RO("OSXSAVE\0" "OSXSAVE instruction", 27, 1, 0),4768 DBGFREGSUBFIELD_RO("AVX\0" "AVX ",28, 1, 0),4769 DBGFREGSUBFIELD_RO("F16C\0" "16-bit floating point conversion instr ",29, 1, 0),4770 DBGFREGSUBFIELD_RO("RDRAND\0" "RDRAND instruction", 30, 1, 0),4771 DBGFREGSUBFIELD_RO("HVP\0" "Hypervisor Present (we're a guest)", 31, 1, 0),4741 DBGFREGSUBFIELD_RO("SSE3\0" "SSE3 support", 0, 1, 0), 4742 DBGFREGSUBFIELD_RO("PCLMUL\0" "PCLMULQDQ support (for AES-GCM)", 1, 1, 0), 4743 DBGFREGSUBFIELD_RO("DTES64\0" "DS Area 64-bit Layout", 2, 1, 0), 4744 DBGFREGSUBFIELD_RO("MONITOR\0" "MONITOR/MWAIT instructions", 3, 1, 0), 4745 DBGFREGSUBFIELD_RO("CPL-DS\0" "CPL Qualified Debug Store", 4, 1, 0), 4746 DBGFREGSUBFIELD_RO("VMX\0" "Virtual Machine Extensions", 5, 1, 0), 4747 DBGFREGSUBFIELD_RO("SMX\0" "Safer Mode Extensions", 6, 1, 0), 4748 DBGFREGSUBFIELD_RO("EST\0" "Enhanced SpeedStep Technology", 7, 1, 0), 4749 DBGFREGSUBFIELD_RO("TM2\0" "Terminal Monitor 2", 8, 1, 0), 4750 DBGFREGSUBFIELD_RO("SSSE3\0" "Supplemental Streaming SIMD Extensions 3", 9, 1, 0), 4751 DBGFREGSUBFIELD_RO("CNTX-ID\0" "L1 Context ID", 10, 1, 0), 4752 DBGFREGSUBFIELD_RO("SDBG\0" "Silicon Debug interface", 11, 1, 0), 4753 DBGFREGSUBFIELD_RO("FMA\0" "Fused Multiply Add extensions", 12, 1, 0), 4754 DBGFREGSUBFIELD_RO("CX16\0" "CMPXCHG16B instruction", 13, 1, 0), 4755 DBGFREGSUBFIELD_RO("TPRUPDATE\0" "xTPR Update Control", 14, 1, 0), 4756 DBGFREGSUBFIELD_RO("PDCM\0" "Perf/Debug Capability MSR", 15, 1, 0), 4757 DBGFREGSUBFIELD_RO("PCID\0" "Process Context Identifiers", 17, 1, 0), 4758 DBGFREGSUBFIELD_RO("DCA\0" "Direct Cache Access", 18, 1, 0), 4759 DBGFREGSUBFIELD_RO("SSE4_1\0" "SSE4_1 support", 19, 1, 0), 4760 DBGFREGSUBFIELD_RO("SSE4_2\0" "SSE4_2 support", 20, 1, 0), 4761 DBGFREGSUBFIELD_RO("X2APIC\0" "x2APIC support", 21, 1, 0), 4762 DBGFREGSUBFIELD_RO("MOVBE\0" "MOVBE instruction", 22, 1, 0), 4763 DBGFREGSUBFIELD_RO("POPCNT\0" "POPCNT instruction", 23, 1, 0), 4764 DBGFREGSUBFIELD_RO("TSCDEADL\0" "Time Stamp Counter Deadline", 24, 1, 0), 4765 DBGFREGSUBFIELD_RO("AES\0" "AES instructions", 25, 1, 0), 4766 DBGFREGSUBFIELD_RO("XSAVE\0" "XSAVE instruction", 26, 1, 0), 4767 DBGFREGSUBFIELD_RO("OSXSAVE\0" "OSXSAVE instruction", 27, 1, 0), 4768 DBGFREGSUBFIELD_RO("AVX\0" "AVX support", 28, 1, 0), 4769 DBGFREGSUBFIELD_RO("F16C\0" "16-bit floating point conversion instructions", 29, 1, 0), 4770 DBGFREGSUBFIELD_RO("RDRAND\0" "RDRAND instruction", 30, 1, 0), 4771 DBGFREGSUBFIELD_RO("HVP\0" "Hypervisor Present (we're a guest)", 31, 1, 0), 4772 4772 DBGFREGSUBFIELD_TERMINATOR() 4773 4773 }; … … 4776 4776 static DBGFREGSUBFIELD const g_aLeaf7Sub0EbxSubFields[] = 4777 4777 { 4778 DBGFREGSUBFIELD_RO("FSGSBASE\0" "Supports RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE",0, 1, 0),4779 DBGFREGSUBFIELD_RO("TSCADJUST\0" "Supports MSR_IA32_TSC_ADJUST",1, 1, 0),4780 DBGFREGSUBFIELD_RO("BMI1\0" "Advanced Bit Manipulation extension 1",3, 1, 0),4781 DBGFREGSUBFIELD_RO("HLE\0" "Hardware Lock Elision",4, 1, 0),4782 DBGFREGSUBFIELD_RO("AVX2\0" "Advanced Vector Extensions 2",5, 1, 0),4783 DBGFREGSUBFIELD_RO("SMEP\0" "Supervisor Mode Execution Prevention",7, 1, 0),4784 DBGFREGSUBFIELD_RO("BMI2\0" "Advanced Bit Manipulation extension 2",8, 1, 0),4785 DBGFREGSUBFIELD_RO("ERMS\0" "Supports Enhanced REP MOVSB/STOSB",9, 1, 0),4786 DBGFREGSUBFIELD_RO("INVPCID\0" "Supports INVPCID",10, 1, 0),4787 DBGFREGSUBFIELD_RO("RTM\0" "Supports Restricted Transactional Memory",11, 1, 0),4788 DBGFREGSUBFIELD_RO("PQM\0" "Supports Platform Quality of Service Monitoring",12, 1, 0),4789 DBGFREGSUBFIELD_RO("DEPFPU_CS_DS\0" "Deprecates FPU CS, FPU DS values if set", 4790 DBGFREGSUBFIELD_RO("MPE\0" "Supports Intel Memory Protection Extensions",14, 1, 0),4791 DBGFREGSUBFIELD_RO("PQE\0" "Supports Platform Quality of Service Enforcement",15, 1, 0),4792 DBGFREGSUBFIELD_RO("AVX512F\0" "Supports AVX512F",16, 1, 0),4793 DBGFREGSUBFIELD_RO("RDSEED\0" "Supports RDSEED",18, 1, 0),4794 DBGFREGSUBFIELD_RO("ADX\0" "Supports ADCX/ADOX",19, 1, 0),4795 DBGFREGSUBFIELD_RO("SMAP\0" "Supports Supervisor Mode Access Prevention",20, 1, 0),4796 DBGFREGSUBFIELD_RO("CLFLUSHOPT\0" "Supports CLFLUSHOPT (Cache Line Flush)",23, 1, 0),4797 DBGFREGSUBFIELD_RO("INTEL_PT\0" "Supports Intel Processor Trace",25, 1, 0),4798 DBGFREGSUBFIELD_RO("AVX512PF\0" "Supports AVX512PF",26, 1, 0),4799 DBGFREGSUBFIELD_RO("AVX512ER\0" "Supports AVX512ER",27, 1, 0),4800 DBGFREGSUBFIELD_RO("AVX512CD\0" "Supports AVX512CD",28, 1, 0),4801 DBGFREGSUBFIELD_RO("SHA\0" "Supports Secure Hash Algorithm extensions",29, 1, 0),4778 DBGFREGSUBFIELD_RO("FSGSBASE\0" "RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE instr.", 0, 1, 0), 4779 DBGFREGSUBFIELD_RO("TSCADJUST\0" "Supports MSR_IA32_TSC_ADJUST", 1, 1, 0), 4780 DBGFREGSUBFIELD_RO("BMI1\0" "Advanced Bit Manipulation extension 1", 3, 1, 0), 4781 DBGFREGSUBFIELD_RO("HLE\0" "Hardware Lock Elision", 4, 1, 0), 4782 DBGFREGSUBFIELD_RO("AVX2\0" "Advanced Vector Extensions 2", 5, 1, 0), 4783 DBGFREGSUBFIELD_RO("SMEP\0" "Supervisor Mode Execution Prevention", 7, 1, 0), 4784 DBGFREGSUBFIELD_RO("BMI2\0" "Advanced Bit Manipulation extension 2", 8, 1, 0), 4785 DBGFREGSUBFIELD_RO("ERMS\0" "Enhanced REP MOVSB/STOSB instructions", 9, 1, 0), 4786 DBGFREGSUBFIELD_RO("INVPCID\0" "INVPCID instruction", 10, 1, 0), 4787 DBGFREGSUBFIELD_RO("RTM\0" "Restricted Transactional Memory", 11, 1, 0), 4788 DBGFREGSUBFIELD_RO("PQM\0" "Platform Quality of Service Monitoring", 12, 1, 0), 4789 DBGFREGSUBFIELD_RO("DEPFPU_CS_DS\0" "Deprecates FPU CS, FPU DS values if set", 13, 1, 0), 4790 DBGFREGSUBFIELD_RO("MPE\0" "Intel Memory Protection Extensions", 14, 1, 0), 4791 DBGFREGSUBFIELD_RO("PQE\0" "Platform Quality of Service Enforcement", 15, 1, 0), 4792 DBGFREGSUBFIELD_RO("AVX512F\0" "AVX512 Foundation instructions", 16, 1, 0), 4793 DBGFREGSUBFIELD_RO("RDSEED\0" "RDSEED instruction", 18, 1, 0), 4794 DBGFREGSUBFIELD_RO("ADX\0" "ADCX/ADOX instructions", 19, 1, 0), 4795 DBGFREGSUBFIELD_RO("SMAP\0" "Supervisor Mode Access Prevention", 20, 1, 0), 4796 DBGFREGSUBFIELD_RO("CLFLUSHOPT\0" "CLFLUSHOPT (Cache Line Flush) instruction", 23, 1, 0), 4797 DBGFREGSUBFIELD_RO("INTEL_PT\0" "Intel Processor Trace", 25, 1, 0), 4798 DBGFREGSUBFIELD_RO("AVX512PF\0" "AVX512 Prefetch instructions", 26, 1, 0), 4799 DBGFREGSUBFIELD_RO("AVX512ER\0" "AVX512 Exponential & reciprocal instructions", 27, 1, 0), 4800 DBGFREGSUBFIELD_RO("AVX512CD\0" "AVX512 Conflict Detection instructions", 28, 1, 0), 4801 DBGFREGSUBFIELD_RO("SHA\0" "Secure Hash Algorithm extensions", 29, 1, 0), 4802 4802 DBGFREGSUBFIELD_TERMINATOR() 4803 4803 }; … … 4806 4806 static DBGFREGSUBFIELD const g_aLeaf7Sub0EcxSubFields[] = 4807 4807 { 4808 DBGFREGSUBFIELD_RO("PREFETCHWT1\0" " Supports the PREFETCHWT1 instruction",0, 1, 0),4808 DBGFREGSUBFIELD_RO("PREFETCHWT1\0" "PREFETCHWT1 instruction", 0, 1, 0), 4809 4809 DBGFREGSUBFIELD_TERMINATOR() 4810 4810 }; … … 4829 4829 static DBGFREGSUBFIELD const g_aLeaf13Sub1EaxSubFields[] = 4830 4830 { 4831 DBGFREGSUBFIELD_RO("XSAVEOPT\0" "XSAVEOPT is available",0, 1, 0),4832 DBGFREGSUBFIELD_RO("XSAVEC\0" "XSAVEC and compacted XRSTOR supported",1, 1, 0),4833 DBGFREGSUBFIELD_RO("XGETBC1\0" "XGETBV with ECX=1 supported",2, 1, 0),4834 DBGFREGSUBFIELD_RO("XSAVES\0" "XSAVES/XRSTORS and IA32_XSS supported",3, 1, 0),4831 DBGFREGSUBFIELD_RO("XSAVEOPT\0" "XSAVEOPT is available", 0, 1, 0), 4832 DBGFREGSUBFIELD_RO("XSAVEC\0" "XSAVEC and compacted XRSTOR supported", 1, 1, 0), 4833 DBGFREGSUBFIELD_RO("XGETBC1\0" "XGETBV with ECX=1 supported", 2, 1, 0), 4834 DBGFREGSUBFIELD_RO("XSAVES\0" "XSAVES/XRSTORS and IA32_XSS supported", 3, 1, 0), 4835 4835 DBGFREGSUBFIELD_TERMINATOR() 4836 4836 }; … … 4854 4854 DBGFREGSUBFIELD_RO("PGE\0" "PTE Global Bit", 13, 1, 0), 4855 4855 DBGFREGSUBFIELD_RO("MCA\0" "Machine Check Architecture", 14, 1, 0), 4856 DBGFREGSUBFIELD_RO("CMOV\0" "Conditional Move Instructions", 15, 1, 0),4856 DBGFREGSUBFIELD_RO("CMOV\0" "Conditional Move instructions", 15, 1, 0), 4857 4857 DBGFREGSUBFIELD_RO("PAT\0" "Page Attribute Table", 16, 1, 0), 4858 4858 DBGFREGSUBFIELD_RO("PSE-36\0" "36-bit Page Size Extension", 17, 1, 0), 4859 4859 DBGFREGSUBFIELD_RO("NX\0" "No-Execute/Execute-Disable", 20, 1, 0), 4860 DBGFREGSUBFIELD_RO("AXMMX\0" "AMD Extensions to MMX Instructions", 22, 1, 0),4860 DBGFREGSUBFIELD_RO("AXMMX\0" "AMD Extensions to MMX instructions", 22, 1, 0), 4861 4861 DBGFREGSUBFIELD_RO("MMX\0" "Intel MMX Technology", 23, 1, 0), 4862 4862 DBGFREGSUBFIELD_RO("FXSR\0" "FXSAVE and FXRSTOR Instructions", 24, 1, 0), 4863 DBGFREGSUBFIELD_RO("FFXSR\0" "AMD fast FXSAVE and FXRSTOR Instr.",25, 1, 0),4863 DBGFREGSUBFIELD_RO("FFXSR\0" "AMD fast FXSAVE and FXRSTOR instructions", 25, 1, 0), 4864 4864 DBGFREGSUBFIELD_RO("Page1GB\0" "1 GB large page", 26, 1, 0), 4865 4865 DBGFREGSUBFIELD_RO("RDTSCP\0" "RDTSCP instruction", 27, 1, 0), … … 4876 4876 DBGFREGSUBFIELD_RO("CmpLegacy\0" "Core multi-processing legacy mode", 1, 1, 0), 4877 4877 DBGFREGSUBFIELD_RO("SVM\0" "AMD VM extensions", 2, 1, 0), 4878 DBGFREGSUBFIELD_RO("EXTAPIC\0" "AMD extended APIC registers", 3, 1, 0),4878 DBGFREGSUBFIELD_RO("EXTAPIC\0" "AMD Extended APIC registers", 3, 1, 0), 4879 4879 DBGFREGSUBFIELD_RO("CR8L\0" "AMD LOCK MOV CR0 means MOV CR8", 4, 1, 0), 4880 DBGFREGSUBFIELD_RO("ABM\0" "AMD Advanced bit manipulation", 5, 1, 0),4881 DBGFREGSUBFIELD_RO("SSE4A\0" "SSE4A instruction support",6, 1, 0),4880 DBGFREGSUBFIELD_RO("ABM\0" "AMD Advanced Bit Manipulation", 5, 1, 0), 4881 DBGFREGSUBFIELD_RO("SSE4A\0" "SSE4A instructions", 6, 1, 0), 4882 4882 DBGFREGSUBFIELD_RO("MISALIGNSSE\0" "AMD Misaligned SSE mode", 7, 1, 0), 4883 DBGFREGSUBFIELD_RO("3DNOWPRF\0" "AMD PREFETCH and PREFETCHW instr .",8, 1, 0),4884 DBGFREGSUBFIELD_RO("OSVW\0" "AMD OS visible workaround", 9, 1, 0),4885 DBGFREGSUBFIELD_RO("IBS\0" "Instruct based sampling", 10, 1, 0),4886 DBGFREGSUBFIELD_RO("XOP\0" "Extended operation support", 11, 1, 0),4883 DBGFREGSUBFIELD_RO("3DNOWPRF\0" "AMD PREFETCH and PREFETCHW instructions", 8, 1, 0), 4884 DBGFREGSUBFIELD_RO("OSVW\0" "AMD OS Visible Workaround", 9, 1, 0), 4885 DBGFREGSUBFIELD_RO("IBS\0" "Instruct Based Sampling", 10, 1, 0), 4886 DBGFREGSUBFIELD_RO("XOP\0" "Extended Operation support", 11, 1, 0), 4887 4887 DBGFREGSUBFIELD_RO("SKINIT\0" "SKINIT, STGI, and DEV support", 12, 1, 0), 4888 DBGFREGSUBFIELD_RO("WDT\0" "AMD Watchdog timer support", 13, 1, 0),4889 DBGFREGSUBFIELD_RO("LWP\0" "Lightweight profiling support", 15, 1, 0),4888 DBGFREGSUBFIELD_RO("WDT\0" "AMD Watchdog Timer support", 13, 1, 0), 4889 DBGFREGSUBFIELD_RO("LWP\0" "Lightweight Profiling support", 15, 1, 0), 4890 4890 DBGFREGSUBFIELD_RO("FMA4\0" "Four operand FMA instruction support", 16, 1, 0), 4891 4891 DBGFREGSUBFIELD_RO("NodeId\0" "NodeId in MSR C001_100C", 19, 1, 0), 4892 DBGFREGSUBFIELD_RO("TBM\0" "Trailing bit manipulation instr.",21, 1, 0),4892 DBGFREGSUBFIELD_RO("TBM\0" "Trailing Bit Manipulation instructions", 21, 1, 0), 4893 4893 DBGFREGSUBFIELD_RO("TOPOEXT\0" "Topology Extensions", 22, 1, 0), 4894 4894 DBGFREGSUBFIELD_TERMINATOR()
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