Changeset 55054 in vbox for trunk/src/VBox/VMM/VMMSwitcher

Timestamp:

Mar 31, 2015 7:29:50 PM (10 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

99343

Message:

Removed support for host CPUs without FXSAVE/FXRSTOR support.

Location:

trunk/src/VBox/VMM/VMMSwitcher

Files:

• AMD64andLegacy.mac (modified) (1 diff)
• PAEand32Bit.mac (modified) (2 diffs)

trunk/src/VBox/VMM/VMMSwitcher/AMD64andLegacy.mac

@@ -565 +565 @@
     ;
     ; CR4.AndMask and CR4.OrMask are set in CPUMR3Init based on the presence of
-    ; FXSAVE support on the host CPU
+    ; FXSAVE and XSAVE support on the host CPU
     ;
     and     ecx, [rdx + CPUM.CR4.AndMask]

trunk/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac

@@ -420 +420 @@
     ;
     ; CR4.AndMask and CR4.OrMask are set in CPUMR3Init based on the presence of
-    ; FXSAVE support on the host CPU
+    ; FXSAVE and XSAVE support on the host CPU
     ;
     CPUM_FROM_CPUMCPU(edx)
@@ -992 +992 @@
     mov     eax, [edx + CPUMCPU.Guest.pXStateR0]
     mov     ecx, [edx + CPUMCPU.Host.pXStateR0]
-    FIXUP FIX_NO_FXSAVE_JMP, 0, gth_no_fxsave - NAME(Start) ; this will insert a jmp gth_no_fxsave if fxsave isn't supported.
     fxsave  [eax]
     fxrstor [ecx]
-    jmp near gth_fpu_no
-
-gth_no_fxsave:
-    fnsave  [eax]
-    mov     eax, [ecx]                  ; control word
-    not     eax                         ; 1 means exception ignored (6 LS bits)
-    and     eax, byte 03Fh              ; 6 LS bits only
-    test    eax, [ecx + 4]              ; status word
-    jz      gth_no_exceptions_pending
-
-    ; technically incorrect, but we certainly don't want any exceptions now!!
-    and     dword [ecx + 4], ~03Fh
-
-gth_no_exceptions_pending:
-    frstor  [ecx]
-    jmp short gth_fpu_no
-
-ALIGNCODE(16)
-gth_fpu_no:
 
     ; Control registers.