Changeset 55062 in vbox for trunk/src/VBox/VMM/VMMR0
- Timestamp:
- Apr 1, 2015 12:45:12 AM (10 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp
r55048 r55062 339 339 VMMR0_INT_DECL(int) CPUMR0Trap07Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 340 340 { 341 Assert(pVM->cpum.s. CPUFeatures.edx.u1FXSR);341 Assert(pVM->cpum.s.HostFeatures.fFxSaveRstor); 342 342 Assert(ASMGetCR4() & X86_CR4_OSFXSR); 343 343 … … 399 399 VMMR0_INT_DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 400 400 { 401 402 401 Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); 403 402 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) … … 423 422 uint64_t uHostEfer = 0; 424 423 bool fRestoreEfer = false; 425 if (pVM->cpum.s. CPUFeaturesExt.edx & X86_CPUID_AMD_FEATURE_EDX_FFXSR)424 if (pVM->cpum.s.HostFeatures.fLeakyFxSR) 426 425 { 427 426 /** @todo r=ramshankar: Can't we used a cached value here … … 460 459 VMMR0_INT_DECL(int) CPUMR0SaveGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 461 460 { 462 Assert(pVM->cpum.s. CPUFeatures.edx.u1FXSR);461 Assert(pVM->cpum.s.HostFeatures.fFxSaveRstor); 463 462 Assert(ASMGetCR4() & X86_CR4_OSFXSR); 464 463 AssertReturn((pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU), VINF_SUCCESS);
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