Changeset 55248 in vbox for trunk/src/VBox/VMM/VMMR0
- Timestamp:
- Apr 14, 2015 1:43:25 PM (10 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r55129 r55248 6750 6750 6751 6751 return rc; 6752 } 6753 6754 6755 /** 6756 * Ensures that we've got a complete basic context. 6757 * 6758 * This excludes the FPU, SSE, AVX, and similar extended state. The interface 6759 * is for the interpreter. 6760 * 6761 * @returns VBox status code. 6762 * @param pVCpu Pointer to the VMCPU of the calling EMT. 6763 * @param pMixedCtx Pointer to the guest-CPU context which may have data 6764 * needing to be synced in. 6765 * @thread EMT(pVCpu) 6766 */ 6767 VMMR0_INT_DECL(int) HMR0EnsureCompleteBasicContext(PVMCPU pVCpu, PCPUMCTX pMixedCtx) 6768 { 6769 /* Note! Since this is only applicable to VT-x, the implementation is placed 6770 in the VT-x part of the sources instead of the generic stuff. */ 6771 if (pVCpu->CTX_SUFF(pVM)->hm.s.vmx.fSupported) 6772 return hmR0VmxSaveGuestState(pVCpu, pMixedCtx); 6773 return VINF_SUCCESS; 6752 6774 } 6753 6775 … … 10928 10950 STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatExitMovCRx, y2); 10929 10951 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 10952 rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 10930 10953 AssertRCReturn(rc, rc); 10931 10954 … … 10933 10956 uint32_t const uAccessType = VMX_EXIT_QUALIFICATION_CRX_ACCESS(uExitQualification); 10934 10957 PVM pVM = pVCpu->CTX_SUFF(pVM); 10958 VBOXSTRICTRC rcStrict; 10959 rc = hmR0VmxSaveGuestRipRspRflags(pVCpu, pMixedCtx); 10960 rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx); /* Only really need CS+SS. */ 10935 10961 switch (uAccessType) 10936 10962 { 10937 10963 case VMX_EXIT_QUALIFICATION_CRX_ACCESS_WRITE: /* MOV to CRx */ 10938 10964 { 10939 #if 010940 /* EMInterpretCRxWrite() references a lot of guest state (EFER, RFLAGS, Segment Registers, etc.) Sync entire state */10941 rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);10942 #else10943 rc = hmR0VmxSaveGuestRipRspRflags(pVCpu, pMixedCtx);10944 10965 rc |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx); 10945 rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);10946 #endif10947 10966 AssertRCReturn(rc, rc); 10948 10967 10949 rc = EMInterpretCRxWrite(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx),10950 VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification),10951 VMX_EXIT_QUALIFICATION_CRX_GENREG(uExitQualification));10952 Assert (rc == VINF_SUCCESS || rc == VERR_EM_INTERPRETER || rc == VINF_PGM_CHANGE_MODE || rc == VINF_PGM_SYNC_CR3);10953 10968 rcStrict = IEMExecDecodedMovCRxWrite(pVCpu, pVmxTransient->cbInstr, 10969 VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification), 10970 VMX_EXIT_QUALIFICATION_CRX_GENREG(uExitQualification)); 10971 AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IEM_RAISED_XCPT || rcStrict == VINF_PGM_CHANGE_MODE 10972 || rcStrict == VINF_PGM_SYNC_CR3, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 10954 10973 switch (VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification)) 10955 10974 { 10956 10975 case 0: /* CR0 */ 10957 10976 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_CR0); 10958 Log4(("CRX CR0 write rc =%d CR0=%#RX64\n", rc, pMixedCtx->cr0));10977 Log4(("CRX CR0 write rcStrict=%Rrc CR0=%#RX64\n", VBOXSTRICTRC_VAL(rcStrict), pMixedCtx->cr0)); 10959 10978 break; 10960 10979 case 2: /* CR2 */ … … 10964 10983 Assert(!pVM->hm.s.fNestedPaging || !CPUMIsGuestPagingEnabledEx(pMixedCtx)); 10965 10984 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_CR3); 10966 Log4(("CRX CR3 write rc =%d CR3=%#RX64\n", rc, pMixedCtx->cr3));10985 Log4(("CRX CR3 write rcStrict=%Rrc CR3=%#RX64\n", VBOXSTRICTRC_VAL(rcStrict), pMixedCtx->cr3)); 10967 10986 break; 10968 10987 case 4: /* CR4 */ 10969 10988 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_CR4); 10970 Log4(("CRX CR4 write rc=% d CR4=%#RX64\n", rc, pMixedCtx->cr4));10989 Log4(("CRX CR4 write rc=%Rrc CR4=%#RX64\n", VBOXSTRICTRC_VAL(rcStrict), pMixedCtx->cr4)); 10971 10990 break; 10972 10991 case 8: /* CR8 */ 10973 10992 Assert(!(pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TPR_SHADOW)); 10974 /* CR8 contains the APIC TPR. Was updated by EMInterpretCRxWrite(). */10993 /* CR8 contains the APIC TPR. Was updated by IEMExecDecodedMovCRxWrite(). */ 10975 10994 HMCPU_CF_SET(pVCpu, HM_CHANGED_VMX_GUEST_APIC_STATE); 10976 10995 break; … … 10986 11005 case VMX_EXIT_QUALIFICATION_CRX_ACCESS_READ: /* MOV from CRx */ 10987 11006 { 10988 /* EMInterpretCRxRead() requires EFER MSR, CS. */10989 rc = hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);10990 11007 rc |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx); 10991 11008 AssertRCReturn(rc, rc); 11009 10992 11010 Assert( !pVM->hm.s.fNestedPaging 10993 11011 || !CPUMIsGuestPagingEnabledEx(pMixedCtx) … … 10998 11016 || !(pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TPR_SHADOW)); 10999 11017 11000 rc = EMInterpretCRxRead(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx),11001 VMX_EXIT_QUALIFICATION_CRX_GENREG(uExitQualification),11002 VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification));11003 Assert (rc == VINF_SUCCESS || rc == VERR_EM_INTERPRETER);11018 rcStrict = IEMExecDecodedMovCRxRead(pVCpu, pVmxTransient->cbInstr, 11019 VMX_EXIT_QUALIFICATION_CRX_GENREG(uExitQualification), 11020 VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification)); 11021 AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IEM_RAISED_XCPT, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 11004 11022 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitCRxRead[VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification)]); 11005 Log4(("CRX CR%d Read access rc=%d\n", VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification), rc)); 11023 Log4(("CRX CR%d Read access rcStrict=%Rrc\n", VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification), 11024 VBOXSTRICTRC_VAL(rcStrict))); 11006 11025 break; 11007 11026 } … … 11009 11028 case VMX_EXIT_QUALIFICATION_CRX_ACCESS_CLTS: /* CLTS (Clear Task-Switch Flag in CR0) */ 11010 11029 { 11011 rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);11030 rc |= hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx); 11012 11031 AssertRCReturn(rc, rc); 11013 rc = EMInterpretCLTS(pVM, pVCpu);11014 Assert RCReturn(rc, rc);11032 rcStrict = IEMExecDecodedClts(pVCpu, pVmxTransient->cbInstr); 11033 AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IEM_RAISED_XCPT, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 11015 11034 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_CR0); 11016 11035 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitClts); 11017 Log4(("CRX CLTS write rc=%d\n", rc));11036 Log4(("CRX CLTS rcStrict=%d\n", VBOXSTRICTRC_VAL(rcStrict))); 11018 11037 break; 11019 11038 } … … 11021 11040 case VMX_EXIT_QUALIFICATION_CRX_ACCESS_LMSW: /* LMSW (Load Machine-Status Word into CR0) */ 11022 11041 { 11023 rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);11042 rc |= hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx); 11024 11043 AssertRCReturn(rc, rc); 11025 rc = EMInterpretLMSW(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx), VMX_EXIT_QUALIFICATION_CRX_LMSW_DATA(uExitQualification));11026 if (RT_LIKELY(rc == VINF_SUCCESS))11027 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_CR0);11044 rcStrict = IEMExecDecodedLmsw(pVCpu, pVmxTransient->cbInstr, 11045 VMX_EXIT_QUALIFICATION_CRX_LMSW_DATA(uExitQualification)); 11046 AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IEM_RAISED_XCPT || rcStrict == VINF_PGM_CHANGE_MODE, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 11028 11047 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitLmsw); 11029 Log4(("CRX LMSW write rc=%d\n", rc));11048 Log4(("CRX LMSW rcStrict=%d\n", VBOXSTRICTRC_VAL(rcStrict))); 11030 11049 break; 11031 11050 } 11032 11051 11033 11052 default: 11034 { 11035 AssertMsgFailed(("Invalid access-type in Mov CRx VM-exit qualification %#x\n", uAccessType)); 11036 rc = VERR_VMX_UNEXPECTED_EXCEPTION; 11037 } 11038 } 11039 11040 /* Validate possible error codes. */ 11041 Assert(rc == VINF_SUCCESS || rc == VINF_PGM_CHANGE_MODE || rc == VERR_EM_INTERPRETER || rc == VINF_PGM_SYNC_CR3 11042 || rc == VERR_VMX_UNEXPECTED_EXCEPTION); 11043 if (RT_SUCCESS(rc)) 11044 { 11045 int rc2 = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient); 11046 AssertRCReturn(rc2, rc2); 11047 } 11048 11053 AssertMsgFailedReturn(("Invalid access-type in Mov CRx VM-exit qualification %#x\n", uAccessType), 11054 VERR_VMX_UNEXPECTED_EXCEPTION); 11055 } 11056 11057 HMCPU_CF_SET(pVCpu, rcStrict != VINF_IEM_RAISED_XCPT ? HM_CHANGED_GUEST_RIP | HM_CHANGED_GUEST_RFLAGS : HM_CHANGED_ALL_GUEST); 11049 11058 STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatExitMovCRx, y2); 11050 return rc;11059 return VBOXSTRICTRC_TODO(rcStrict); 11051 11060 } 11052 11061
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