Changeset 56048 in vbox
- Timestamp:
- May 23, 2015 8:28:52 PM (10 years ago)
- svn:sync-xref-src-repo-rev:
- 100570
- Location:
- trunk
- Files:
-
- 13 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/pgm.h
r56013 r56048 266 266 * @param pVCpu Pointer to the cross context CPU context for the 267 267 * calling EMT. 268 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!) 268 * @param GCPtr The virtual address the guest is writing to. This 269 * is the registered address corresponding to the 270 * access, so no aliasing trouble here. 269 271 * @param pvPtr The HC mapping of that address. 270 272 * @param pvBuf What the guest is reading/writing. … … 464 466 VMMDECL(int) PGMPhysGCPtr2GCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTGCPHYS pGCPhys); 465 467 VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock); 466 VMMDECL(int) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin); 467 VMMDECL(int) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin); 468 VMMDECL(int) PGMPhysReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, PGMACCESSORIGIN enmOrigin); 469 VMMDECL(int) PGMPhysWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, PGMACCESSORIGIN enmOrigin); 468 469 /** @def PGM_PHYS_RW_IS_SUCCESS 470 * Check whether a PGMPhysRead, PGMPhysWrite, PGMPhysReadGCPtr or 471 * PGMPhysWriteGCPtr call completed the given task. 472 * 473 * @returns true if completed, false if not. 474 * @param a_rcStrict The status code. 475 * @sa IOM_SUCCESS 476 */ 477 #ifdef IN_RING3 478 # define PGM_PHYS_RW_IS_SUCCESS(a_rcStrict) \ 479 ( (a_rcStrict) == VINF_SUCCESS ) 480 #elif defined(IN_RING0) 481 # define PGM_PHYS_RW_IS_SUCCESS(a_rcStrict) \ 482 ( (a_rcStrict) == VINF_SUCCESS \ 483 || (a_rcStrict) == VINF_EM_OFF \ 484 || (a_rcStrict) == VINF_EM_SUSPEND \ 485 || (a_rcStrict) == VINF_EM_RESET \ 486 || (a_rcStrict) == VINF_EM_HALT \ 487 ) 488 #elif defined(IN_RC) 489 # define PGM_PHYS_RW_IS_SUCCESS(a_rcStrict) \ 490 ( (a_rcStrict) == VINF_SUCCESS \ 491 || (a_rcStrict) == VINF_EM_OFF \ 492 || (a_rcStrict) == VINF_EM_SUSPEND \ 493 || (a_rcStrict) == VINF_EM_RESET \ 494 || (a_rcStrict) == VINF_EM_HALT \ 495 || (a_rcStrict) == VINF_SELM_SYNC_GDT \ 496 || (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT \ 497 ) 498 #endif 499 /** @def PGM_PHYS_RW_DO_UPDATE_STRICT_RC 500 * Updates the return code with a new result. 501 * 502 * Both status codes must be successes according to PGM_PHYS_RW_IS_SUCCESS. 503 * 504 * @param a_rcStrict The current return code, to be updated. 505 * @param a_rcStrict2 The new return code to merge in. 506 */ 507 #ifdef IN_RING3 508 # define PGM_PHYS_RW_DO_UPDATE_STRICT_RC(a_rcStrict, a_rcStrict2) \ 509 do { \ 510 Assert(rcStrict == VINF_SUCCESS); \ 511 Assert(rcStrict2 == VINF_SUCCESS); \ 512 } while (0) 513 #elif defined(IN_RING0) 514 # define PGM_PHYS_RW_DO_UPDATE_STRICT_RC(a_rcStrict, a_rcStrict2) \ 515 do { \ 516 Assert(PGM_PHYS_RW_IS_SUCCESS(rcStrict)); \ 517 Assert(PGM_PHYS_RW_IS_SUCCESS(rcStrict2)); \ 518 if ((a_rcStrict2) == VINF_SUCCESS || (a_rcStrict) == (a_rcStrict2)) \ 519 { /* likely */ } \ 520 else if ( (a_rcStrict) == VINF_SUCCESS \ 521 || (a_rcStrict) > (a_rcStrict2)) \ 522 (a_rcStrict) = (a_rcStrict2); \ 523 } while (0) 524 #elif defined(IN_RC) 525 # define PGM_PHYS_RW_DO_UPDATE_STRICT_RC(a_rcStrict, a_rcStrict2) \ 526 do { \ 527 Assert(PGM_PHYS_RW_IS_SUCCESS(rcStrict)); \ 528 Assert(PGM_PHYS_RW_IS_SUCCESS(rcStrict2)); \ 529 AssertCompile(VINF_SELM_SYNC_GDT > VINF_EM_LAST); \ 530 AssertCompile(VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT > VINF_EM_LAST); \ 531 AssertCompile(VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT < VINF_SELM_SYNC_GDT); \ 532 if ((a_rcStrict2) == VINF_SUCCESS || (a_rcStrict) == (a_rcStrict2)) \ 533 { /* likely */ } \ 534 else if ( (a_rcStrict) == VINF_SUCCESS \ 535 || ( (a_rcStrict) > (a_rcStrict2) \ 536 && ( (a_rcStrict2) <= VINF_EM_RESET \ 537 || (a_rcStrict) != VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT) ) \ 538 || ( (a_rcStrict2) == VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT \ 539 && (a_rcStrict) > VINF_EM_RESET) ) \ 540 (a_rcStrict) = (a_rcStrict2); \ 541 } while (0) 542 #endif 543 544 VMMDECL(VBOXSTRICTRC) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin); 545 VMMDECL(VBOXSTRICTRC) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin); 546 VMMDECL(VBOXSTRICTRC) PGMPhysReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, PGMACCESSORIGIN enmOrigin); 547 VMMDECL(VBOXSTRICTRC) PGMPhysWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, PGMACCESSORIGIN enmOrigin); 548 470 549 VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb); 471 550 VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb); -
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r56021 r56048 1031 1031 if (RT_LIKELY(rcStrict == VINF_SUCCESS)) 1032 1032 { /* likely */ } 1033 else if (PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 1034 { 1035 Log(("iemInitDecoderAndPrefetchOpcodes: %RGv/%RGp LB %#x - read status - rcStrict=%Rrc\n", 1036 GCPtrPC, GCPhys, VBOXSTRICTRC_VAL(rcStrict), cbToTryRead)); 1037 rcStrict = iemSetPassUpStatus(pIemCpu, rcStrict); 1038 } 1033 1039 else 1034 1040 { 1035 Log(("iemInitDecoderAndPrefetchOpcodes: %RGv/%RGp LB %#x - read error - rc=%Rrc (!!)\n", 1036 GCPtrPC, GCPhys, rc, cbToTryRead)); 1037 return rc; 1041 Log((RT_SUCCESS(rcStrict) 1042 ? "iemInitDecoderAndPrefetchOpcodes: %RGv/%RGp LB %#x - read status - rcStrict=%Rrc\n" 1043 : "iemInitDecoderAndPrefetchOpcodes: %RGv/%RGp LB %#x - read error - rcStrict=%Rrc (!!)\n", 1044 GCPtrPC, GCPhys, VBOXSTRICTRC_VAL(rcStrict), cbToTryRead)); 1045 return rcStrict; 1038 1046 } 1039 1047 } … … 1158 1166 */ 1159 1167 if (!pIemCpu->fBypassHandlers) 1160 rc = PGMPhysRead(IEMCPU_TO_VM(pIemCpu), GCPhys, &pIemCpu->abOpcode[pIemCpu->cbOpcode], cbToTryRead, PGMACCESSORIGIN_IEM); 1168 { 1169 VBOXSTRICTRC rcStrict = PGMPhysRead(IEMCPU_TO_VM(pIemCpu), GCPhys, &pIemCpu->abOpcode[pIemCpu->cbOpcode], 1170 cbToTryRead, PGMACCESSORIGIN_IEM); 1171 if (RT_LIKELY(rcStrict == VINF_SUCCESS)) 1172 { /* likely */ } 1173 else if (PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 1174 { 1175 Log(("iemOpcodeFetchMoreBytes: %RGv/%RGp LB %#x - read status - rcStrict=%Rrc\n", 1176 GCPtrNext, GCPhys, VBOXSTRICTRC_VAL(rcStrict), cbToTryRead)); 1177 rcStrict = iemSetPassUpStatus(pIemCpu, rcStrict); 1178 } 1179 else 1180 { 1181 Log((RT_SUCCESS(rcStrict) 1182 ? "iemOpcodeFetchMoreBytes: %RGv/%RGp LB %#x - read status - rcStrict=%Rrc\n" 1183 : "iemOpcodeFetchMoreBytes: %RGv/%RGp LB %#x - read error - rcStrict=%Rrc (!!)\n", 1184 GCPtrNext, GCPhys, VBOXSTRICTRC_VAL(rcStrict), cbToTryRead)); 1185 return rcStrict; 1186 } 1187 } 1161 1188 else 1189 { 1162 1190 rc = PGMPhysSimpleReadGCPhys(IEMCPU_TO_VM(pIemCpu), &pIemCpu->abOpcode[pIemCpu->cbOpcode], GCPhys, cbToTryRead); 1163 if (rc != VINF_SUCCESS) 1164 { 1165 /** @todo status code handling */ 1166 Log(("iemOpcodeFetchMoreBytes: %RGv - read error - rc=%Rrc (!!)\n", GCPtrNext, rc)); 1167 return rc; 1191 if (RT_SUCCESS(rc)) 1192 { /* likely */ } 1193 else 1194 { 1195 Log(("iemOpcodeFetchMoreBytes: %RGv - read error - rc=%Rrc (!!)\n", GCPtrNext, rc)); 1196 return rc; 1197 } 1168 1198 } 1169 1199 pIemCpu->cbOpcode += cbToTryRead; … … 6432 6462 * Do the writing. 6433 6463 */ 6434 int rc;6435 6464 #ifndef IEM_VERIFICATION_MODE_MINIMAL 6465 PVM pVM = IEMCPU_TO_VM(pIemCpu); 6436 6466 if ( !pIemCpu->aMemBbMappings[iMemMap].fUnassigned 6437 6467 && !IEM_VERIFICATION_ENABLED(pIemCpu)) … … 6442 6472 if (!pIemCpu->fBypassHandlers) 6443 6473 { 6444 rc = PGMPhysWrite(IEMCPU_TO_VM(pIemCpu), 6445 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, 6446 pbBuf, 6447 cbFirst, 6448 PGMACCESSORIGIN_IEM); 6449 if (cbSecond && rc == VINF_SUCCESS) 6450 rc = PGMPhysWrite(IEMCPU_TO_VM(pIemCpu), 6451 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, 6452 pbBuf + cbFirst, 6453 cbSecond, 6454 PGMACCESSORIGIN_IEM); 6474 /* 6475 * Carefully and efficiently dealing with access handler return 6476 * codes make this a little bloated. 6477 */ 6478 VBOXSTRICTRC rcStrict = PGMPhysWrite(pVM, 6479 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, 6480 pbBuf, 6481 cbFirst, 6482 PGMACCESSORIGIN_IEM); 6483 if (rcStrict == VINF_SUCCESS) 6484 { 6485 if (cbSecond) 6486 { 6487 rcStrict = PGMPhysWrite(pVM, 6488 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, 6489 pbBuf + cbFirst, 6490 cbSecond, 6491 PGMACCESSORIGIN_IEM); 6492 if (rcStrict == VINF_SUCCESS) 6493 { /* nothing */ } 6494 else if (PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 6495 { 6496 Log(("iemMemBounceBufferCommitAndUnmap: PGMPhysWrite GCPhysFirst=%RGp/%#x GCPhysSecond=%RGp/%#x %Rrc\n", 6497 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, 6498 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, cbSecond, VBOXSTRICTRC_VAL(rcStrict) )); 6499 rcStrict = iemSetPassUpStatus(pIemCpu, rcStrict); 6500 } 6501 else 6502 { 6503 Log(("iemMemBounceBufferCommitAndUnmap: PGMPhysWrite GCPhysFirst=%RGp/%#x GCPhysSecond=%RGp/%#x %Rrc (!!)\n", 6504 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, 6505 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, cbSecond, VBOXSTRICTRC_VAL(rcStrict) )); 6506 return rcStrict; 6507 } 6508 } 6509 } 6510 else if (PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 6511 { 6512 if (!cbSecond) 6513 { 6514 Log(("iemMemBounceBufferCommitAndUnmap: PGMPhysWrite GCPhysFirst=%RGp/%#x %Rrc\n", 6515 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, VBOXSTRICTRC_VAL(rcStrict) )); 6516 rcStrict = iemSetPassUpStatus(pIemCpu, rcStrict); 6517 } 6518 else 6519 { 6520 VBOXSTRICTRC rcStrict2 = PGMPhysWrite(pVM, 6521 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, 6522 pbBuf + cbFirst, 6523 cbSecond, 6524 PGMACCESSORIGIN_IEM); 6525 if (rcStrict2 == VINF_SUCCESS) 6526 { 6527 Log(("iemMemBounceBufferCommitAndUnmap: PGMPhysWrite GCPhysFirst=%RGp/%#x %Rrc GCPhysSecond=%RGp/%#x\n", 6528 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, VBOXSTRICTRC_VAL(rcStrict), 6529 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, cbSecond)); 6530 rcStrict = iemSetPassUpStatus(pIemCpu, rcStrict); 6531 } 6532 else if (PGM_PHYS_RW_IS_SUCCESS(rcStrict2)) 6533 { 6534 Log(("iemMemBounceBufferCommitAndUnmap: PGMPhysWrite GCPhysFirst=%RGp/%#x %Rrc GCPhysSecond=%RGp/%#x %Rrc\n", 6535 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, VBOXSTRICTRC_VAL(rcStrict), 6536 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, cbSecond, VBOXSTRICTRC_VAL(rcStrict2) )); 6537 PGM_PHYS_RW_DO_UPDATE_STRICT_RC(rcStrict, rcStrict2); 6538 rcStrict = iemSetPassUpStatus(pIemCpu, rcStrict); 6539 } 6540 else 6541 { 6542 Log(("iemMemBounceBufferCommitAndUnmap: PGMPhysWrite GCPhysFirst=%RGp/%#x %Rrc GCPhysSecond=%RGp/%#x %Rrc (!!)\n", 6543 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, VBOXSTRICTRC_VAL(rcStrict), 6544 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, cbSecond, VBOXSTRICTRC_VAL(rcStrict2) )); 6545 return rcStrict2; 6546 } 6547 } 6548 } 6549 else 6550 { 6551 Log(("iemMemBounceBufferCommitAndUnmap: PGMPhysWrite GCPhysFirst=%RGp/%#x %Rrc [GCPhysSecond=%RGp/%#x] (!!)\n", 6552 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, VBOXSTRICTRC_VAL(rcStrict), 6553 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, cbSecond)); 6554 return rcStrict; 6555 } 6455 6556 } 6456 6557 else 6457 6558 { 6458 rc = PGMPhysSimpleWriteGCPhys(IEMCPU_TO_VM(pIemCpu), 6459 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, 6460 pbBuf, 6461 cbFirst); 6462 if (cbSecond && rc == VINF_SUCCESS) 6463 rc = PGMPhysSimpleWriteGCPhys(IEMCPU_TO_VM(pIemCpu), 6464 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, 6465 pbBuf + cbFirst, 6466 cbSecond); 6559 /* 6560 * No access handlers, much simpler. 6561 */ 6562 int rc = PGMPhysSimpleWriteGCPhys(pVM, pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, pbBuf, cbFirst); 6563 if (RT_SUCCESS(rc)) 6564 { 6565 if (cbSecond) 6566 { 6567 rc = PGMPhysSimpleWriteGCPhys(pVM, pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, pbBuf + cbFirst, cbSecond); 6568 if (RT_SUCCESS(rc)) 6569 { /* likely */ } 6570 else 6571 { 6572 Log(("iemMemBounceBufferCommitAndUnmap: PGMPhysSimpleWriteGCPhys GCPhysFirst=%RGp/%#x GCPhysSecond=%RGp/%#x %Rrc (!!)\n", 6573 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, 6574 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, cbSecond, rc)); 6575 return rc; 6576 } 6577 } 6578 } 6579 else 6580 { 6581 Log(("iemMemBounceBufferCommitAndUnmap: PGMPhysSimpleWriteGCPhys GCPhysFirst=%RGp/%#x %Rrc [GCPhysSecond=%RGp/%#x] (!!)\n", 6582 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, rc, 6583 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, cbSecond)); 6584 return rc; 6585 } 6467 6586 } 6468 if (rc != VINF_SUCCESS) 6469 { 6470 /** @todo status code handling */ 6471 Log(("iemMemBounceBufferCommitAndUnmap: %s GCPhysFirst=%RGp/%#x GCPhysSecond=%RGp/%#x %Rrc (!!)\n", 6472 pIemCpu->fBypassHandlers ? "PGMPhysWrite" : "PGMPhysSimpleWriteGCPhys", 6473 pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, cbFirst, 6474 pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, cbSecond, rc)); 6475 } 6476 } 6477 else 6587 } 6478 6588 #endif 6479 rc = VINF_SUCCESS;6480 6589 6481 6590 #if defined(IEM_VERIFICATION_MODE_FULL) && defined(IN_RING3) … … 6514 6623 #endif 6515 6624 #if defined(IEM_VERIFICATION_MODE_MINIMAL) || defined(IEM_LOG_MEMORY_WRITES) 6516 if (rc == VINF_SUCCESS) 6517 { 6518 Log(("IEM Wrote %RGp: %.*Rhxs\n", pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, 6519 RT_MAX(RT_MIN(pIemCpu->aMemBbMappings[iMemMap].cbFirst, 64), 1), &pIemCpu->aBounceBuffers[iMemMap].ab[0])); 6520 if (pIemCpu->aMemBbMappings[iMemMap].cbSecond) 6521 Log(("IEM Wrote %RGp: %.*Rhxs [2nd page]\n", pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, 6522 RT_MIN(pIemCpu->aMemBbMappings[iMemMap].cbSecond, 64), 6523 &pIemCpu->aBounceBuffers[iMemMap].ab[pIemCpu->aMemBbMappings[iMemMap].cbFirst])); 6524 6525 size_t cbWrote = pIemCpu->aMemBbMappings[iMemMap].cbFirst + pIemCpu->aMemBbMappings[iMemMap].cbSecond; 6526 g_cbIemWrote = cbWrote; 6527 memcpy(g_abIemWrote, &pIemCpu->aBounceBuffers[iMemMap].ab[0], RT_MIN(cbWrote, sizeof(g_abIemWrote))); 6528 } 6625 Log(("IEM Wrote %RGp: %.*Rhxs\n", pIemCpu->aMemBbMappings[iMemMap].GCPhysFirst, 6626 RT_MAX(RT_MIN(pIemCpu->aMemBbMappings[iMemMap].cbFirst, 64), 1), &pIemCpu->aBounceBuffers[iMemMap].ab[0])); 6627 if (pIemCpu->aMemBbMappings[iMemMap].cbSecond) 6628 Log(("IEM Wrote %RGp: %.*Rhxs [2nd page]\n", pIemCpu->aMemBbMappings[iMemMap].GCPhysSecond, 6629 RT_MIN(pIemCpu->aMemBbMappings[iMemMap].cbSecond, 64), 6630 &pIemCpu->aBounceBuffers[iMemMap].ab[pIemCpu->aMemBbMappings[iMemMap].cbFirst])); 6631 6632 size_t cbWrote = pIemCpu->aMemBbMappings[iMemMap].cbFirst + pIemCpu->aMemBbMappings[iMemMap].cbSecond; 6633 g_cbIemWrote = cbWrote; 6634 memcpy(g_abIemWrote, &pIemCpu->aBounceBuffers[iMemMap].ab[0], RT_MIN(cbWrote, sizeof(g_abIemWrote))); 6529 6635 #endif 6530 6636 … … 6535 6641 Assert(pIemCpu->cActiveMappings != 0); 6536 6642 pIemCpu->cActiveMappings--; 6537 return rc;6643 return VINF_SUCCESS; 6538 6644 } 6539 6645 … … 6561 6667 GCPhysSecond &= ~(RTGCPHYS)PAGE_OFFSET_MASK; 6562 6668 6669 PVM pVM = IEMCPU_TO_VM(pIemCpu); 6563 6670 #ifdef IEM_VERIFICATION_MODE_FULL 6564 6671 /* … … 6568 6675 if (IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 6569 6676 { 6570 int rc2 = PGMPhysIemQueryAccess(IEMCPU_TO_VM(pIemCpu), GCPhysFirst, 6571 RT_BOOL(fAccess & IEM_ACCESS_TYPE_WRITE), pIemCpu->fBypassHandlers); 6677 int rc2 = PGMPhysIemQueryAccess(pVM, GCPhysFirst, RT_BOOL(fAccess & IEM_ACCESS_TYPE_WRITE), pIemCpu->fBypassHandlers); 6572 6678 if (RT_SUCCESS(rc2)) 6573 rc2 = PGMPhysIemQueryAccess(IEMCPU_TO_VM(pIemCpu), GCPhysSecond, 6574 RT_BOOL(fAccess & IEM_ACCESS_TYPE_WRITE), pIemCpu->fBypassHandlers); 6679 rc2 = PGMPhysIemQueryAccess(pVM, GCPhysSecond, RT_BOOL(fAccess & IEM_ACCESS_TYPE_WRITE), pIemCpu->fBypassHandlers); 6575 6680 if (RT_FAILURE(rc2)) 6576 6681 pIemCpu->fProblematicMemory = true; … … 6589 6694 if (fAccess & (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_EXEC | IEM_ACCESS_PARTIAL_WRITE)) 6590 6695 { 6591 int rc;6592 6696 if (!pIemCpu->fBypassHandlers) 6593 6697 { 6594 rc = PGMPhysRead(IEMCPU_TO_VM(pIemCpu), GCPhysFirst, pbBuf, cbFirstPage, PGMACCESSORIGIN_IEM); 6595 if (rc != VINF_SUCCESS) 6698 /* 6699 * Must carefully deal with access handler status codes here, 6700 * makes the code a bit bloated. 6701 */ 6702 rcStrict = PGMPhysRead(pVM, GCPhysFirst, pbBuf, cbFirstPage, PGMACCESSORIGIN_IEM); 6703 if (rcStrict == VINF_SUCCESS) 6596 6704 { 6597 /** @todo status code handling */ 6598 Log(("iemMemBounceBufferMapPhys: PGMPhysRead GCPhysFirst=%RGp rc=%Rrc (!!)\n", GCPhysFirst, rc)); 6599 return rc; 6705 rcStrict = PGMPhysRead(pVM, GCPhysSecond, pbBuf + cbFirstPage, cbSecondPage, PGMACCESSORIGIN_IEM); 6706 if (rcStrict == VINF_SUCCESS) 6707 { /*likely */ } 6708 else if (PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 6709 rcStrict = iemSetPassUpStatus(pIemCpu, rcStrict); 6710 else 6711 { 6712 Log(("iemMemBounceBufferMapPhys: PGMPhysRead GCPhysSecond=%RGp rcStrict2=%Rrc (!!)\n", 6713 GCPhysSecond, VBOXSTRICTRC_VAL(rcStrict) )); 6714 return rcStrict; 6715 } 6600 6716 } 6601 rc = PGMPhysRead(IEMCPU_TO_VM(pIemCpu), GCPhysSecond, pbBuf + cbFirstPage, cbSecondPage, PGMACCESSORIGIN_IEM); 6602 if (rc != VINF_SUCCESS) 6717 else if (PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 6603 6718 { 6604 /** @todo status code handling */ 6605 Log(("iemMemBounceBufferMapPhys: PGMPhysRead GCPhysSecond=%RGp rc=%Rrc (!!)\n", GCPhysSecond, rc)); 6606 return rc; 6719 VBOXSTRICTRC rcStrict2 = PGMPhysRead(pVM, GCPhysSecond, pbBuf + cbFirstPage, cbSecondPage, PGMACCESSORIGIN_IEM); 6720 if (PGM_PHYS_RW_IS_SUCCESS(rcStrict2)) 6721 { 6722 PGM_PHYS_RW_DO_UPDATE_STRICT_RC(rcStrict, rcStrict2); 6723 rcStrict = iemSetPassUpStatus(pIemCpu, rcStrict); 6724 } 6725 else 6726 { 6727 Log(("iemMemBounceBufferMapPhys: PGMPhysRead GCPhysSecond=%RGp rcStrict2=%Rrc (rcStrict=%Rrc) (!!)\n", 6728 GCPhysSecond, VBOXSTRICTRC_VAL(rcStrict2), VBOXSTRICTRC_VAL(rcStrict2) )); 6729 return rcStrict2; 6730 } 6731 } 6732 else 6733 { 6734 Log(("iemMemBounceBufferMapPhys: PGMPhysRead GCPhysFirst=%RGp rcStrict=%Rrc (!!)\n", 6735 GCPhysFirst, VBOXSTRICTRC_VAL(rcStrict) )); 6736 return rcStrict; 6607 6737 } 6608 6738 } 6609 6739 else 6610 6740 { 6611 rc = PGMPhysSimpleReadGCPhys(IEMCPU_TO_VM(pIemCpu), pbBuf, GCPhysFirst, cbFirstPage); 6612 if (rc != VINF_SUCCESS) 6741 /* 6742 * No informational status codes here, much more straight forward. 6743 */ 6744 int rc = PGMPhysSimpleReadGCPhys(pVM, pbBuf, GCPhysFirst, cbFirstPage); 6745 if (RT_SUCCESS(rc)) 6613 6746 { 6614 /** @todo status code handling */ 6747 Assert(rc == VINF_SUCCESS); 6748 rc = PGMPhysSimpleReadGCPhys(pVM, pbBuf + cbFirstPage, GCPhysSecond, cbSecondPage); 6749 if (RT_SUCCESS(rc)) 6750 Assert(rc == VINF_SUCCESS); 6751 else 6752 { 6753 Log(("iemMemBounceBufferMapPhys: PGMPhysSimpleReadGCPhys GCPhysSecond=%RGp rc=%Rrc (!!)\n", GCPhysSecond, rc)); 6754 return rc; 6755 } 6756 } 6757 else 6758 { 6615 6759 Log(("iemMemBounceBufferMapPhys: PGMPhysSimpleReadGCPhys GCPhysFirst=%RGp rc=%Rrc (!!)\n", GCPhysFirst, rc)); 6616 return rc;6617 }6618 rc = PGMPhysSimpleReadGCPhys(IEMCPU_TO_VM(pIemCpu), pbBuf + cbFirstPage, GCPhysSecond, cbSecondPage);6619 if (rc != VINF_SUCCESS)6620 {6621 /** @todo status code handling */6622 Log(("iemMemBounceBufferMapPhys: PGMPhysSimpleReadGCPhys GCPhysSecond=%RGp rc=%Rrc (!!)\n", GCPhysSecond, rc));6623 6760 return rc; 6624 6761 } … … 6656 6793 else 6657 6794 memset(pbBuf, 0xcc, cbMem); 6658 #endif6659 #ifdef VBOX_STRICT6660 6795 if (cbMem < sizeof(pIemCpu->aBounceBuffers[iMemMap].ab)) 6661 6796 memset(pbBuf + cbMem, 0xaa, sizeof(pIemCpu->aBounceBuffers[iMemMap].ab) - cbMem); … … 6712 6847 int rc; 6713 6848 if (!pIemCpu->fBypassHandlers) 6714 rc = PGMPhysRead(IEMCPU_TO_VM(pIemCpu), GCPhysFirst, pbBuf, cbMem, PGMACCESSORIGIN_IEM); 6849 { 6850 VBOXSTRICTRC rcStrict = PGMPhysRead(IEMCPU_TO_VM(pIemCpu), GCPhysFirst, pbBuf, cbMem, PGMACCESSORIGIN_IEM); 6851 if (rcStrict == VINF_SUCCESS) 6852 { /* nothing */ } 6853 else if (PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 6854 rcStrict = iemSetPassUpStatus(pIemCpu, rcStrict); 6855 else 6856 { 6857 Log(("iemMemBounceBufferMapPhys: PGMPhysRead GCPhysFirst=%RGp rcStrict=%Rrc (!!)\n", 6858 GCPhysFirst, VBOXSTRICTRC_VAL(rcStrict) )); 6859 return rcStrict; 6860 } 6861 } 6715 6862 else 6863 { 6716 6864 rc = PGMPhysSimpleReadGCPhys(IEMCPU_TO_VM(pIemCpu), pbBuf, GCPhysFirst, cbMem); 6717 if (rc != VINF_SUCCESS) 6718 { 6719 /** @todo status code handling */ 6720 Log(("iemMemBounceBufferMapPhys: %s GCPhysFirst=%RGp rc=%Rrc (!!)\n", 6721 pIemCpu->fBypassHandlers ? "PGMPhysRead" : "PGMPhysSimpleReadGCPhys", GCPhysFirst, rc)); 6722 return rc; 6865 if (RT_SUCCESS(rc)) 6866 { /* likely */ } 6867 else 6868 { 6869 Log(("iemMemBounceBufferMapPhys: PGMPhysSimpleReadGCPhys GCPhysFirst=%RGp rcStrict=%Rrc (!!)\n", 6870 GCPhysFirst, rc)); 6871 return rc; 6872 } 6723 6873 } 6724 6874 } -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r56017 r56048 681 681 return rc; 682 682 #else 683 return PGMPhysReadGCPtr(pVCpu, pDest, GCSrc, cb, PGMACCESSORIGIN_IOM);683 return VBOXSTRICTRC_VAL(PGMPhysReadGCPtr(pVCpu, pDest, GCSrc, cb, PGMACCESSORIGIN_IOM)); 684 684 #endif 685 685 } … … 699 699 #else 700 700 NOREF(pCtxCore); 701 return PGMPhysWriteGCPtr(pVCpu, GCPtrDst, pvSrc, cb, PGMACCESSORIGIN_IOM);701 return VBOXSTRICTRC_VAL(PGMPhysWriteGCPtr(pVCpu, GCPtrDst, pvSrc, cb, PGMACCESSORIGIN_IOM)); 702 702 #endif 703 703 } -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r56017 r56048 48 48 #define PGM_WITH_PHYS_TLB 49 49 50 /** @def PGM_HANDLER_PHYS_IS_VALID_STATUS 51 * Checks if valid physical access handler return code (normal handler, not PF). 52 * 53 * Checks if the given strict status code is one of the expected ones for a 54 * physical access handler in the current context. 55 * 56 * @returns true or false. 57 * @param a_rcStrict The status code. 58 * @param a_fWrite Whether it is a write or read being serviced. 59 * 60 * @remarks We wish to keep the list of statuses here as short as possible. 61 * When changing, please make sure to update the PGMPhysRead, 62 * PGMPhysWrite, PGMPhysReadGCPtr and PGMPhysWriteGCPtr docs too. 63 */ 64 #ifdef IN_RING3 65 # define PGM_HANDLER_PHYS_IS_VALID_STATUS(a_rcStrict, a_fWrite) \ 66 ( (a_rcStrict) == VINF_SUCCESS \ 67 || (a_rcStrict) == VINF_PGM_HANDLER_DO_DEFAULT) 68 #elif defined(IN_RING0) || defined(IN_RC) 69 # define PGM_HANDLER_PHYS_IS_VALID_STATUS(a_rcStrict, a_fWrite) \ 70 ( (a_rcStrict) == VINF_SUCCESS \ 71 || (a_rcStrict) == VINF_PGM_HANDLER_DO_DEFAULT \ 72 \ 73 || (a_rcStrict) == ((a_fWrite) ? VINF_IOM_R3_MMIO_WRITE : VINF_IOM_R3_MMIO_READ) \ 74 || (a_rcStrict) == VINF_IOM_R3_MMIO_READ_WRITE \ 75 \ 76 || (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR \ 77 || (a_rcStrict) == VINF_EM_DBG_STOP \ 78 || (a_rcStrict) == VINF_EM_DBG_BREAKPOINT \ 79 || (a_rcStrict) == VINF_EM_OFF \ 80 || (a_rcStrict) == VINF_EM_SUSPEND \ 81 || (a_rcStrict) == VINF_EM_RESET \ 82 ) 83 #else 84 # error "Context?" 85 #endif 86 87 /** @def PGM_HANDLER_VIRT_IS_VALID_STATUS 88 * Checks if valid virtual access handler return code (normal handler, not PF). 89 * 90 * Checks if the given strict status code is one of the expected ones for a 91 * virtual access handler in the current context. 92 * 93 * @returns true or false. 94 * @param a_rcStrict The status code. 95 * @param a_fWrite Whether it is a write or read being serviced. 96 * 97 * @remarks We wish to keep the list of statuses here as short as possible. 98 * When changing, please make sure to update the PGMPhysRead, 99 * PGMPhysWrite, PGMPhysReadGCPtr and PGMPhysWriteGCPtr docs too. 100 */ 101 #ifdef IN_RING3 102 # define PGM_HANDLER_VIRT_IS_VALID_STATUS(a_rcStrict, a_fWrite) \ 103 ( (a_rcStrict) == VINF_SUCCESS \ 104 || (a_rcStrict) == VINF_PGM_HANDLER_DO_DEFAULT) 105 #elif defined(IN_RING0) 106 # define PGM_HANDLER_VIRT_IS_VALID_STATUS(a_rcStrict, a_fWrite) \ 107 (false /* no virtual handlers in ring-0! */ ) 108 #elif defined(IN_RC) 109 # define PGM_HANDLER_VIRT_IS_VALID_STATUS(a_rcStrict, a_fWrite) \ 110 ( (a_rcStrict) == VINF_SUCCESS \ 111 || (a_rcStrict) == VINF_PGM_HANDLER_DO_DEFAULT \ 112 \ 113 || ((a_fWrite) ? (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT : 0) \ 114 || ((a_fWrite) ? (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT : 0) \ 115 || ((a_fWrite) ? (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT : 0) \ 116 || ((a_fWrite) ? (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT : 0) \ 117 || ((a_fWrite) ? (a_rcStrict) == VINF_SELM_SYNC_GDT : 0) \ 118 || ((a_fWrite) ? (a_rcStrict) == VINF_CSAM_PENDING_ACTION : 0) \ 119 || (a_rcStrict) == VINF_PATM_CHECK_PATCH_PAGE \ 120 \ 121 || (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR \ 122 || (a_rcStrict) == VINF_EM_DBG_STOP \ 123 || (a_rcStrict) == VINF_EM_DBG_BREAKPOINT \ 124 ) 125 #else 126 # error "Context?" 127 #endif 128 50 129 51 130 … … 53 132 54 133 /** 55 * \#PF Handler callback for physical memory accesses without a RC/R0 handler. 56 * This simply pushes everything to the HC handler. 57 * 58 * @returns VBox status code (appropriate for trap handling and GC return). 59 * @param pVM Pointer to the VM. 60 * @param pVCpu Pointer to the cross context CPU context for the 61 * calling EMT. 62 * @param uErrorCode CPU Error code. 63 * @param pRegFrame Trap register frame. 64 * @param pvFault The fault address (cr2). 65 * @param GCPhysFault The GC physical address corresponding to pvFault. 66 * @param pvUser User argument. 134 * @callback_method_impl{FNPGMPHYSHANDLER, 135 * Dummy for forcing ring-3 handling of the access.} 136 * 137 * @remarks The @a pvUser argument points to the PGMROMRANGE. 138 */ 139 DECLEXPORT(VBOXSTRICTRC) 140 pgmPhysHandlerRedirectToHC(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, 141 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser) 142 { 143 NOREF(pVM); NOREF(pVCpu); NOREF(GCPhys); NOREF(pvPhys); NOREF(pvBuf); NOREF(cbBuf); 144 NOREF(enmAccessType); NOREF(enmOrigin); NOREF(pvUser); 145 return VINF_EM_RAW_EMULATE_INSTR; 146 } 147 148 149 /** 150 * @callback_method_impl{FNPGMRZPHYSPFHANDLER, 151 * Dummy for forcing ring-3 handling of the access.} 152 * 153 * @remarks The @a pvUser argument points to the PGMROMRANGE. 67 154 */ 68 155 VMMDECL(VBOXSTRICTRC) pgmPhysPfHandlerRedirectToHC(PVM pVM, PVMCPU pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, … … 70 157 { 71 158 NOREF(pVM); NOREF(pVCpu); NOREF(uErrorCode); NOREF(pRegFrame); NOREF(pvFault); NOREF(GCPhysFault); NOREF(pvUser); 72 return (uErrorCode & X86_TRAP_PF_RW) ? VINF_IOM_R3_MMIO_WRITE : VINF_IOM_R3_MMIO_READ;159 return VINF_EM_RAW_EMULATE_INSTR; 73 160 } 74 161 … … 2171 2258 * 2172 2259 * @returns Strict VBox status code in ring-0 and raw-mode, ignorable in ring-3. 2173 * @retval VINF_SUCCESS. 2174 * @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3 or with 2175 * PGMACCESSORIGIN_IEM. 2260 * See PGM_HANDLER_PHYS_IS_VALID_STATUS and 2261 * PGM_HANDLER_VIRT_IS_VALID_STATUS for details. 2176 2262 * 2177 2263 * @param pVM Pointer to the VM. … … 2180 2266 * @param pvBuf Where to put the bits we read. 2181 2267 * @param cb How much to read - less or equal to a page. 2182 * @param enmOrigin 2268 * @param enmOrigin The origin of this call. 2183 2269 */ 2184 2270 static VBOXSTRICTRC pgmPhysReadHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void *pvBuf, size_t cb, … … 2196 2282 const void *pvSrc = NULL; 2197 2283 int rc = pgmPhysGCPhys2CCPtrInternalReadOnly(pVM, pPage, GCPhys, &pvSrc, &PgMpLck); 2284 /** @todo Check how this can work for MMIO pages? */ 2198 2285 if (RT_FAILURE(rc)) 2199 2286 { … … 2210 2297 */ 2211 2298 PVMCPU pVCpu = VMMGetCpu(pVM); 2212 #ifdef IN_RING32213 2299 PPGMPHYSHANDLER pPhys = NULL; 2214 #endif2215 2300 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_ALL 2216 2301 || PGM_PAGE_IS_MMIO_OR_SPECIAL_ALIAS(pPage)) 2217 2302 { 2218 #ifdef IN_RING32219 2303 pPhys = pgmHandlerPhysicalLookup(pVM, GCPhys); 2220 2304 AssertReleaseMsg(pPhys, ("GCPhys=%RGp cb=%#x\n", GCPhys, cb)); … … 2222 2306 Assert((pPhys->Core.Key & PAGE_OFFSET_MASK) == 0); 2223 2307 Assert((pPhys->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK); 2224 2308 #ifndef IN_RING3 2309 //if (enmOrigin != PGMACCESSORIGIN_IOM) 2310 { 2311 /* Cannot reliably handle informational status codes in this context */ 2312 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 2313 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2314 } 2315 #endif 2316 #ifdef IN_RING3 //temp 2225 2317 PFNPGMPHYSHANDLER pfnHandler = PGMPHYSHANDLER_GET_TYPE(pVM, pPhys)->CTX_SUFF(pfnHandler); Assert(pfnHandler); 2226 2318 void *pvUser = pPhys->CTX_SUFF(pvUser); … … 2229 2321 STAM_PROFILE_START(&pPhys->Stat, h); 2230 2322 PGM_LOCK_ASSERT_OWNER(pVM); 2323 2231 2324 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */ 2232 2325 pgmUnlock(pVM); 2233 2326 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, enmOrigin, pvUser); 2234 2327 pgmLock(pVM); 2235 # ifdef VBOX_WITH_STATISTICS 2328 2329 #ifdef VBOX_WITH_STATISTICS 2236 2330 pPhys = pgmHandlerPhysicalLookup(pVM, GCPhys); 2237 2331 if (pPhys) 2238 2332 STAM_PROFILE_STOP(&pPhys->Stat, h); 2239 # 2333 #else 2240 2334 pPhys = NULL; /* might not be valid anymore. */ 2241 # endif 2242 # ifdef IN_RING3 2243 AssertLogRelMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_PGM_HANDLER_DO_DEFAULT, 2335 #endif 2336 AssertLogRelMsg(PGM_HANDLER_PHYS_IS_VALID_STATUS(rcStrict, false), 2244 2337 ("rcStrict=%Rrc GCPhys=%RGp\n", VBOXSTRICTRC_VAL(rcStrict), GCPhys)); 2245 # else 2246 AssertLogRelMsg( rcStrict == VINF_SUCCESS 2247 || rcStrict == VINF_PGM_HANDLER_DO_DEFAULT 2248 || rcStrict == VINF_IOM_R3_MMIO_READ 2249 || rcStrict == VINF_IOM_R3_MMIO_READ_WRITE 2250 || rcStrict == VINF_EM_DBG_STOP 2251 || rcStrict == VINF_EM_DBG_BREAKPOINT 2252 || rcStrict == VINF_EM_OFF 2253 || rcStrict == VINF_EM_SUSPEND 2254 || rcStrict == VINF_EM_RESET 2255 //|| rcStrict == VINF_EM_HALT /* ?? */ 2256 //|| rcStrict == VINF_EM_NO_MEMORY /* ?? */ 2257 , ("rcStrict=%Rrc GCPhys=%RGp\n", VBOXSTRICTRC_VAL(rcStrict), GCPhys)); 2258 # endif 2259 #else 2260 /* In R0 and RC the callbacks cannot handle this context, so we'll fail. */ 2261 //AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cb)); 2262 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 2263 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2264 #endif 2338 if ( rcStrict != VINF_PGM_HANDLER_DO_DEFAULT 2339 && !PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 2340 { 2341 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 2342 return rcStrict; 2343 } 2344 #endif //temp 2265 2345 } 2266 2346 … … 2277 2357 Assert(GCPhys >= pVirt->aPhysToVirt[iPage].Core.Key && GCPhys <= pVirt->aPhysToVirt[iPage].Core.KeyLast); 2278 2358 2359 #ifndef IN_RING3 2360 //if (enmOrigin != PGMACCESSORIGIN_IOM) 2361 { 2362 /* Cannot reliably handle informational status codes in this context */ 2363 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 2364 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2365 } 2366 #endif 2367 #ifdef IN_RING3 //temp 2279 2368 PPGMVIRTHANDLERTYPEINT pVirtType = PGMVIRTANDLER_GET_TYPE(pVM, pVirt); 2280 2369 #ifdef IN_RING3 2281 if (pVirtType->pfnHandlerR3) 2370 if (pVirtType->CTX_SUFF(pfnHandler)) 2371 #endif 2282 2372 { 2283 2373 if (!pPhys) … … 2293 2383 PGMACCESSTYPE_READ, enmOrigin, pVirt->CTX_SUFF(pvUser)); 2294 2384 STAM_PROFILE_STOP(&pVirt->Stat, h); 2385 2386 /* Merge status codes. */ 2295 2387 if (rcStrict2 == VINF_SUCCESS) 2296 rcStrict = rcStrict == VINF_PGM_HANDLER_DO_DEFAULT ? VINF_SUCCESS : rcStrict; 2388 { 2389 if (rcStrict == VINF_PGM_HANDLER_DO_DEFAULT) 2390 rcStrict = VINF_SUCCESS; 2391 } 2297 2392 else if (rcStrict2 != VINF_PGM_HANDLER_DO_DEFAULT) 2298 2393 { 2299 AssertLogRelMsgFailed(("rcStrict2=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", 2300 VBOXSTRICTRC_VAL(rcStrict2), GCPhys, pPage, pVirt->pszDesc)); 2301 if (rcStrict == VINF_SUCCESS || rcStrict == VINF_PGM_HANDLER_DO_DEFAULT || rcStrict2 < rcStrict) 2302 rcStrict = rcStrict2; 2394 AssertLogRelMsg(PGM_HANDLER_VIRT_IS_VALID_STATUS(rcStrict2, false), 2395 ("rcStrict2=%Rrc (rcStrict=%Rrc) GCPhys=%RGp pPage=%R[pgmpage] %s\n", 2396 VBOXSTRICTRC_VAL(rcStrict2), VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, pVirt->pszDesc)); 2397 if (!PGM_PHYS_RW_IS_SUCCESS(rcStrict2)) 2398 { 2399 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 2400 return rcStrict2; 2401 } 2402 if (rcStrict == VINF_PGM_HANDLER_DO_DEFAULT) 2403 rcStrict = rcStrict2; 2404 else 2405 PGM_PHYS_RW_DO_UPDATE_STRICT_RC(rcStrict, rcStrict2); 2303 2406 } 2304 2407 } 2408 #ifdef IN_RING3 2305 2409 else 2410 { 2306 2411 Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] virt %s [no handler]\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc) )); 2307 #else 2308 /* In R0 and RC the callbacks cannot handle this context, so we'll fail. */ 2309 //AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cb)); 2310 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 2311 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2412 Assert(pVirtType->enmKind == PGMVIRTHANDLERKIND_HYPERVISOR); 2413 } 2312 2414 #endif 2415 #endif //temp 2313 2416 } 2314 2417 … … 2332 2435 * want to ignore those. 2333 2436 * 2334 * @returns VBox status code. Can be ignored in ring-3. 2335 * @retval VINF_SUCCESS. 2336 * @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3. 2437 * @returns Strict VBox status code in raw-mode and ring-0, normal VBox status 2438 * code in ring-3. Use PGM_PHYS_RW_IS_SUCCESS to check. 2439 * @retval VINF_SUCCESS in all context - read completed. 2440 * 2441 * @retval VINF_EM_OFF in RC and R0 - read completed. 2442 * @retval VINF_EM_SUSPEND in RC and R0 - read completed. 2443 * @retval VINF_EM_RESET in RC and R0 - read completed. 2444 * @retval VINF_EM_HALT in RC and R0 - read completed. 2445 * @retval VINF_SELM_SYNC_GDT in RC only - read completed. 2446 * 2447 * @retval VINF_EM_DBG_STOP in RC and R0. 2448 * @retval VINF_EM_DBG_BREAKPOINT in RC and R0. 2449 * @retval VINF_EM_RAW_EMULATE_INSTR in RC and R0 only. 2450 * 2451 * @retval VINF_IOM_R3_MMIO_READ in RC and R0. 2452 * @retval VINF_IOM_R3_MMIO_READ_WRITE in RC and R0. 2453 * 2454 * @retval VINF_PATM_CHECK_PATCH_PAGE in RC only. 2455 * 2456 * @retval VERR_PGM_PHYS_WR_HIT_HANDLER in RC and R0 for access origins that 2457 * haven't been cleared for strict status codes yet. 2337 2458 * 2338 2459 * @param pVM Pointer to the VM. … … 2342 2463 * @param enmOrigin The origin of this call. 2343 2464 */ 2344 VMMDECL( int) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin)2465 VMMDECL(VBOXSTRICTRC) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin) 2345 2466 { 2346 2467 AssertMsgReturn(cbRead > 0, ("don't even think about reading zero bytes!\n"), VINF_SUCCESS); … … 2355 2476 * Copy loop on ram ranges. 2356 2477 */ 2478 VBOXSTRICTRC rcStrict = VINF_SUCCESS; 2357 2479 PPGMRAMRANGE pRam = pgmPhysGetRangeAtOrAbove(pVM, GCPhys); 2358 2480 for (;;) … … 2402 2524 else 2403 2525 { 2404 VBOXSTRICTRC rcStrict = pgmPhysReadHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb, enmOrigin); 2405 if (rcStrict != VINF_SUCCESS) 2526 VBOXSTRICTRC rcStrict2 = pgmPhysReadHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb, enmOrigin); 2527 if (PGM_PHYS_RW_IS_SUCCESS(rcStrict2)) 2528 PGM_PHYS_RW_DO_UPDATE_STRICT_RC(rcStrict, rcStrict2); 2529 else 2406 2530 { 2407 2531 pgmUnlock(pVM); 2408 return VBOXSTRICTRC_TODO(rcStrict);2532 return rcStrict; 2409 2533 } 2410 2534 } … … 2414 2538 { 2415 2539 pgmUnlock(pVM); 2416 return VINF_SUCCESS;2540 return rcStrict; 2417 2541 } 2418 2542 cbRead -= cb; … … 2449 2573 2450 2574 pgmUnlock(pVM); 2451 return VINF_SUCCESS;2575 return rcStrict; 2452 2576 } 2453 2577 … … 2457 2581 * 2458 2582 * @returns Strict VBox status code in ring-0 and raw-mode, ignorable in ring-3. 2459 * @retval VINF_SUCCESS. 2460 * @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3 or with 2461 * PGMACCESSORIGIN_IEM. 2583 * See PGM_HANDLER_PHYS_IS_VALID_STATUS and 2584 * PGM_HANDLER_VIRT_IS_VALID_STATUS for details. 2462 2585 * 2463 2586 * @param pVM Pointer to the VM. … … 2490 2613 { 2491 2614 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast); 2492 2615 #ifndef IN_RING3 2616 //if (enmOrigin != PGMACCESSORIGIN_IOM) 2617 /* Cannot reliably handle informational status codes in this context */ 2618 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2619 #endif 2620 #ifdef IN_RING3 //temp 2493 2621 size_t cbRange = pCur->Core.KeyLast - GCPhys + 1; 2494 2622 if (cbRange > cbWrite) 2495 2623 cbRange = cbWrite; 2496 2624 2497 #ifndef IN_RING32498 /* In R0 and RC the callbacks cannot handle this context, so we'll fail. */2499 NOREF(cbRange);2500 //AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));2501 return VERR_PGM_PHYS_WR_HIT_HANDLER;2502 2503 #else /* IN_RING3 */2504 2625 Assert(PGMPHYSHANDLER_GET_TYPE(pVM, pCur)->CTX_SUFF(pfnHandler)); 2505 2626 Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", … … 2513 2634 PFNPGMPHYSHANDLER pfnHandler = PGMPHYSHANDLER_GET_TYPE(pVM, pCur)->CTX_SUFF(pfnHandler); 2514 2635 void *pvUser = pCur->CTX_SUFF(pvUser); 2515 2516 2636 STAM_PROFILE_START(&pCur->Stat, h); 2637 2638 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */ 2517 2639 PGM_LOCK_ASSERT_OWNER(pVM); 2518 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */2519 2640 pgmUnlock(pVM); 2520 2641 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser); 2521 2642 pgmLock(pVM); 2522 # ifdef VBOX_WITH_STATISTICS 2643 2644 #ifdef VBOX_WITH_STATISTICS 2523 2645 pCur = pgmHandlerPhysicalLookup(pVM, GCPhys); 2524 2646 if (pCur) 2525 2647 STAM_PROFILE_STOP(&pCur->Stat, h); 2526 # 2648 #else 2527 2649 pCur = NULL; /* might not be valid anymore. */ 2528 # 2650 #endif 2529 2651 if (rcStrict == VINF_PGM_HANDLER_DO_DEFAULT) 2530 2652 { … … 2534 2656 } 2535 2657 else 2536 AssertLogRelMsg( rcStrict == VINF_SUCCESS,2658 AssertLogRelMsg(PGM_HANDLER_PHYS_IS_VALID_STATUS(rcStrict, true), 2537 2659 ("rcStrict=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", 2538 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, pCur ? pCur->pszDesc: ""));2660 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, pCur ? R3STRING(pCur->pszDesc) : "")); 2539 2661 } 2540 2662 else 2541 2663 AssertLogRelMsgFailedReturn(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n", 2542 2664 GCPhys, pPage, VBOXSTRICTRC_VAL(rcStrict)), rcStrict); 2543 if (RT_LIKELY(cbRange == cbWrite) || rcStrict != VINF_SUCCESS)2665 if (RT_LIKELY(cbRange == cbWrite) || !PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 2544 2666 { 2545 2667 if (pvDst) … … 2553 2675 pvBuf = (uint8_t *)pvBuf + cbRange; 2554 2676 pvDst = (uint8_t *)pvDst + cbRange; 2555 #endif /* IN_RING3 */ 2556 } 2557 /* else: the handler is somewhere else in the page, deal with it below. */ 2677 #endif//temp 2678 } 2679 else /* The handler is somewhere else in the page, deal with it below. */ 2680 rcStrict = VINF_SUCCESS; 2558 2681 Assert(!PGM_PAGE_IS_MMIO_OR_ALIAS(pPage)); /* MMIO handlers are all PAGE_SIZEed! */ 2559 2682 } … … 2568 2691 if (pVirt) 2569 2692 { 2693 #ifndef IN_RING3 2694 //if (enmOrigin != PGMACCESSORIGIN_IOM) 2695 /* Cannot reliably handle informational status codes in this context */ 2696 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2697 #endif 2698 #ifdef IN_RING3 //temp 2570 2699 PPGMVIRTHANDLERTYPEINT pVirtType = PGMVIRTANDLER_GET_TYPE(pVM, pVirt); 2571 2572 2700 size_t cbRange = (PAGE_OFFSET_MASK & pVirt->Core.KeyLast) - (PAGE_OFFSET_MASK & GCPhys) + 1; 2573 2701 if (cbRange > cbWrite) 2574 2702 cbRange = cbWrite; 2575 2576 #ifndef IN_RING32577 /* In R0 and RC the callbacks cannot handle this context, so we'll fail. */2578 NOREF(cbRange);2579 //AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));2580 return VERR_PGM_PHYS_WR_HIT_HANDLER;2581 2582 #else /* IN_RING3 */2583 2703 2584 2704 Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] virt %s\n", … … 2587 2707 if (RT_SUCCESS(rcStrict)) 2588 2708 { 2589 if (pVirtType-> pfnHandlerR3)2709 if (pVirtType->CTX_SUFF(pfnHandler)) 2590 2710 { 2591 2711 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirt->Core.Key & PAGE_BASE_GC_MASK) … … 2606 2726 } 2607 2727 else 2608 AssertLogRelMsg( rcStrict == VINF_SUCCESS,2728 AssertLogRelMsg(PGM_HANDLER_VIRT_IS_VALID_STATUS(rcStrict, true), 2609 2729 ("rcStrict=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", 2610 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, pVirt->pszDesc));2730 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, R3STRING(pVirt->pszDesc))); 2611 2731 } 2612 2732 else 2613 2733 AssertLogRelMsgFailedReturn(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n", 2614 2734 GCPhys, pPage, VBOXSTRICTRC_VAL(rcStrict)), rcStrict); 2615 if (RT_LIKELY(cbRange == cbWrite) || rcStrict != VINF_SUCCESS)2735 if (RT_LIKELY(cbRange == cbWrite) || !PGM_PHYS_RW_IS_SUCCESS(rcStrict)) 2616 2736 { 2617 2737 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); … … 2626 2746 #endif 2627 2747 } 2628 /* else: the handler is somewhere else in the page, deal with it below. */ 2748 else /* The handler is somewhere else in the page, deal with it below. */ 2749 rcStrict = VINF_SUCCESS; 2629 2750 } 2630 2751 … … 2632 2753 * Deal with all the odd ends. 2633 2754 */ 2755 Assert(rcStrict != VINF_PGM_HANDLER_DO_DEFAULT); 2634 2756 2635 2757 /* We need a writable destination page. */ 2636 2758 if (!pvDst) 2637 2759 { 2638 rcStrict= pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst, &PgMpLck);2639 AssertLogRelMsgReturn(RT_SUCCESS(rc Strict),2640 ("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n", 2641 GCPhys, pPage, VBOXSTRICTRC_VAL(rcStrict)), rcStrict);2760 int rc2 = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst, &PgMpLck); 2761 AssertLogRelMsgReturn(RT_SUCCESS(rc2), 2762 ("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n", GCPhys, pPage, rc2), 2763 rc2); 2642 2764 } 2643 2765 … … 2724 2846 * Handle access to space without handlers (that's easy). 2725 2847 */ 2726 rcStrict= VINF_PGM_HANDLER_DO_DEFAULT;2848 VBOXSTRICTRC rcStrict2 = VINF_PGM_HANDLER_DO_DEFAULT; 2727 2849 uint32_t cbRange = (uint32_t)cbWrite; 2728 2850 if (offPhys && offVirt) … … 2739 2861 else if (!offPhys && offVirt) 2740 2862 { 2863 #ifndef IN_RING3 2864 //if (enmOrigin != PGMACCESSORIGIN_IOM) 2865 /* Cannot reliably handle informational status codes in this context */ 2866 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2867 #endif 2868 #ifdef IN_RING3 //temp 2741 2869 if (cbRange > offPhysLast + 1) 2742 2870 cbRange = offPhysLast + 1; 2743 2871 if (cbRange > offVirt) 2744 2872 cbRange = offVirt; 2745 #ifdef IN_RING3 2873 2746 2874 PFNPGMPHYSHANDLER pfnHandler = PGMPHYSHANDLER_GET_TYPE(pVM, pPhys)->CTX_SUFF(pfnHandler); 2747 2875 void *pvUser = pPhys->CTX_SUFF(pvUser); … … 2749 2877 Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc) )); 2750 2878 STAM_PROFILE_START(&pPhys->Stat, h); 2879 2880 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */ 2751 2881 PGM_LOCK_ASSERT_OWNER(pVM); 2752 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */2753 2882 pgmUnlock(pVM); 2754 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser);2883 rcStrict2 = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser); 2755 2884 pgmLock(pVM); 2756 # ifdef VBOX_WITH_STATISTICS 2885 2886 #ifdef VBOX_WITH_STATISTICS 2757 2887 pPhys = pgmHandlerPhysicalLookup(pVM, GCPhys); 2758 2888 if (pPhys) 2759 2889 STAM_PROFILE_STOP(&pPhys->Stat, h); 2760 # 2890 #else 2761 2891 pPhys = NULL; /* might not be valid anymore. */ 2762 # endif2763 AssertLogRelMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_PGM_HANDLER_DO_DEFAULT,2764 ("rcStrict=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n",2765 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, (pPhys) ? pPhys->pszDesc : ""));2766 #else2767 /* In R0 and RC the callbacks cannot handle this context, so we'll fail. */2768 NOREF(cbRange);2769 //AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));2770 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck);2771 return VERR_PGM_PHYS_WR_HIT_HANDLER;2772 2892 #endif 2893 AssertLogRelMsg(PGM_HANDLER_PHYS_IS_VALID_STATUS(rcStrict2, true), 2894 ("rcStrict2=%Rrc (rcStrict=%Rrc) GCPhys=%RGp pPage=%R[pgmpage] %s\n", VBOXSTRICTRC_VAL(rcStrict2), 2895 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, pPhys ? R3STRING(pPhys->pszDesc) : "")); 2896 #endif//temp 2773 2897 } 2774 2898 /* … … 2777 2901 else if (offPhys && !offVirt) 2778 2902 { 2903 #ifndef IN_RING3 2904 //if (enmOrigin != PGMACCESSORIGIN_IOM) 2905 /* Cannot reliably handle informational status codes in this context */ 2906 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2907 #endif 2908 #ifdef IN_RING3//temp 2779 2909 if (cbRange > offVirtLast + 1) 2780 2910 cbRange = offVirtLast + 1; … … 2783 2913 2784 2914 PPGMVIRTHANDLERTYPEINT pVirtType = PGMVIRTANDLER_GET_TYPE(pVM, pVirt); 2785 #ifdef IN_RING32786 2915 Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pVirt->pszDesc) )); 2787 if (pVirtType-> pfnHandlerR3)2916 if (pVirtType->CTX_SUFF(pfnHandler)) 2788 2917 { 2789 2918 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirt->Core.Key & PAGE_BASE_GC_MASK) … … 2791 2920 + (GCPhys & PAGE_OFFSET_MASK); 2792 2921 STAM_PROFILE_START(&pVirt->Stat, h); 2793 rcStrict = pVirtType->CTX_SUFF(pfnHandler)(pVM, pVCpu, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE,2794 enmOrigin, pVirt->CTX_SUFF(pvUser));2922 rcStrict2 = pVirtType->CTX_SUFF(pfnHandler)(pVM, pVCpu, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, 2923 enmOrigin, pVirt->CTX_SUFF(pvUser)); 2795 2924 STAM_PROFILE_STOP(&pVirt->Stat, h); 2796 AssertLogRelMsg( rcStrict == VINF_SUCCESS || rcStrict == VINF_PGM_HANDLER_DO_DEFAULT,2797 ("rcStrict =%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n",2798 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, pVirt->pszDesc));2925 AssertLogRelMsg(PGM_HANDLER_VIRT_IS_VALID_STATUS(rcStrict2, true), 2926 ("rcStrict2=%Rrc (rcStrict=%Rrc) GCPhys=%RGp pPage=%R[pgmpage] %s\n", VBOXSTRICTRC_VAL(rcStrict2), 2927 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, pPhys ? R3STRING(pPhys->pszDesc) : "")); 2799 2928 } 2800 2929 pVirt = NULL; 2801 #else 2802 /* In R0 and RC the callbacks cannot handle this context, so we'll fail. */ 2803 NOREF(cbRange); 2804 //AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange)); 2805 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 2806 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2807 #endif 2930 #endif//temp 2808 2931 } 2809 2932 /* … … 2812 2935 else 2813 2936 { 2937 #ifndef IN_RING3 2938 //if (enmOrigin != PGMACCESSORIGIN_IOM) 2939 /* Cannot reliably handle informational status codes in this context */ 2940 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2941 #endif 2942 #ifdef IN_RING3//temp 2814 2943 Assert(!offPhys && !offVirt); 2815 2944 if (cbRange > offVirtLast + 1) … … 2819 2948 2820 2949 PPGMVIRTHANDLERTYPEINT pVirtType = PGMVIRTANDLER_GET_TYPE(pVM, pVirt); 2821 #ifdef IN_RING32822 2950 if (pVirtType->pfnHandlerR3) 2823 2951 Log(("pgmPhysWriteHandler: overlapping phys and virt handlers at %RGp %R[pgmpage]; cbRange=%#x\n", GCPhys, pPage, cbRange)); … … 2826 2954 PFNPGMPHYSHANDLER pfnHandler = PGMPHYSHANDLER_GET_TYPE(pVM, pPhys)->CTX_SUFF(pfnHandler); 2827 2955 void *pvUser = pPhys->CTX_SUFF(pvUser); 2828 2829 2956 STAM_PROFILE_START(&pPhys->Stat, h); 2957 2958 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */ 2830 2959 PGM_LOCK_ASSERT_OWNER(pVM); 2831 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */2832 2960 pgmUnlock(pVM); 2833 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser);2961 rcStrict2 = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser); 2834 2962 pgmLock(pVM); 2835 # ifdef VBOX_WITH_STATISTICS 2963 2964 #ifdef VBOX_WITH_STATISTICS 2836 2965 pPhys = pgmHandlerPhysicalLookup(pVM, GCPhys); 2837 2966 if (pPhys) 2838 2967 STAM_PROFILE_STOP(&pPhys->Stat, h); 2839 # 2968 #else 2840 2969 pPhys = NULL; /* might not be valid anymore. */ 2841 # endif 2842 AssertLogRelMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_PGM_HANDLER_DO_DEFAULT, 2843 ("rcStrict=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", 2844 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, (pPhys) ? pPhys->pszDesc : "")); 2845 if (pVirtType->pfnHandlerR3) 2970 #endif 2971 AssertLogRelMsg(PGM_HANDLER_PHYS_IS_VALID_STATUS(rcStrict2, true), 2972 ("rcStrict2=%Rrc (rcStrict=%Rrc) GCPhys=%RGp pPage=%R[pgmpage] %s\n", VBOXSTRICTRC_VAL(rcStrict2), 2973 VBOXSTRICTRC_VAL(rcStrict), GCPhys, pPage, pPhys ? R3STRING(pPhys->pszDesc) : "")); 2974 if ( (rcStrict2 == VINF_PGM_HANDLER_DO_DEFAULT || PGM_PHYS_RW_IS_SUCCESS(rcStrict2)) 2975 && pVirtType->CTX_SUFF(pfnHandler)) 2846 2976 { 2847 2848 2977 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirt->Core.Key & PAGE_BASE_GC_MASK) 2849 2978 + (iVirtPage << PAGE_SHIFT) 2850 2979 + (GCPhys & PAGE_OFFSET_MASK); 2980 pvUser = pVirt->CTX_SUFF(pvUser); 2981 2851 2982 STAM_PROFILE_START(&pVirt->Stat, h2); 2852 VBOXSTRICTRC rcStrict 2= pVirtType->CTX_SUFF(pfnHandler)(pVM, pVCpu, GCPtr, pvDst, (void *)pvBuf, cbRange,2853 PGMACCESSTYPE_WRITE, enmOrigin, p Virt->CTX_SUFF(pvUser));2983 VBOXSTRICTRC rcStrict3 = pVirtType->CTX_SUFF(pfnHandler)(pVM, pVCpu, GCPtr, pvDst, (void *)pvBuf, cbRange, 2984 PGMACCESSTYPE_WRITE, enmOrigin, pvUser); 2854 2985 STAM_PROFILE_STOP(&pVirt->Stat, h2); 2855 if (rcStrict2 == VINF_SUCCESS) 2856 rcStrict = rcStrict == VINF_PGM_HANDLER_DO_DEFAULT ? VINF_SUCCESS : rcStrict;2857 else if (rcStrict2 != VINF_PGM_HANDLER_DO_DEFAULT)2986 2987 /* Merge the 3rd status into the 2nd. */ 2988 if (rcStrict3 == VINF_SUCCESS) 2858 2989 { 2859 AssertLogRelMsgFailed(("rcStrict2=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", 2860 VBOXSTRICTRC_VAL(rcStrict2), GCPhys, pPage, pVirt->pszDesc)); 2861 if (rcStrict == VINF_SUCCESS || rcStrict == VINF_PGM_HANDLER_DO_DEFAULT || rcStrict2 < rcStrict) 2862 rcStrict = rcStrict2; 2990 if (rcStrict2 == VINF_PGM_HANDLER_DO_DEFAULT) 2991 rcStrict2 = VINF_SUCCESS; 2992 } 2993 else if (rcStrict3 != VINF_PGM_HANDLER_DO_DEFAULT) 2994 { 2995 AssertLogRelMsg(PGM_HANDLER_VIRT_IS_VALID_STATUS(rcStrict3, true), 2996 ("rcStrict3=%Rrc (rcStrict2=%Rrc) (rcStrict=%Rrc) GCPhys=%RGp pPage=%R[pgmpage] %s\n", 2997 VBOXSTRICTRC_VAL(rcStrict3), VBOXSTRICTRC_VAL(rcStrict2), VBOXSTRICTRC_VAL(rcStrict), 2998 GCPhys, pPage, R3STRING(pVirt->pszDesc) )); 2999 if (rcStrict2 == VINF_PGM_HANDLER_DO_DEFAULT) 3000 rcStrict2 = rcStrict3; 3001 else if (!PGM_PHYS_RW_IS_SUCCESS(rcStrict3)) 3002 rcStrict2 = rcStrict3; 3003 else 3004 PGM_PHYS_RW_DO_UPDATE_STRICT_RC(rcStrict2, rcStrict3); 2863 3005 } 2864 3006 } 2865 3007 pPhys = NULL; 2866 3008 pVirt = NULL; 2867 #else 2868 /* In R0 and RC the callbacks cannot handle this context, so we'll fail. */ 2869 NOREF(cbRange); 2870 //AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange)); 3009 #endif 3010 } 3011 3012 /* 3013 * Execute the default action and merge the status codes. 3014 */ 3015 if (rcStrict2 == VINF_PGM_HANDLER_DO_DEFAULT) 3016 { 3017 memcpy(pvDst, pvBuf, cbRange); 3018 rcStrict2 = VINF_SUCCESS; 3019 } 3020 else if (!PGM_PHYS_RW_IS_SUCCESS(rcStrict2)) 3021 { 2871 3022 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 2872 return VERR_PGM_PHYS_WR_HIT_HANDLER; 2873 #endif 2874 } 2875 if (rcStrict == VINF_PGM_HANDLER_DO_DEFAULT) 2876 { 2877 memcpy(pvDst, pvBuf, cbRange); 2878 rcStrict = VINF_SUCCESS; 2879 } 3023 return rcStrict2; 3024 } 3025 else 3026 PGM_PHYS_RW_DO_UPDATE_STRICT_RC(rcStrict, rcStrict2); 2880 3027 2881 3028 /* 2882 3029 * Advance if we've got more stuff to do. 2883 3030 */ 2884 if (cbRange >= cbWrite || rcStrict != VINF_SUCCESS)3031 if (cbRange >= cbWrite) 2885 3032 { 2886 3033 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 2887 3034 return rcStrict; 2888 3035 } 3036 2889 3037 2890 3038 cbWrite -= cbRange; … … 2907 3055 * want to ignore those. 2908 3056 * 2909 * @returns VBox status code. Can be ignored in ring-3. 2910 * @retval VINF_SUCCESS. 2911 * @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3. 3057 * @returns Strict VBox status code in raw-mode and ring-0, normal VBox status 3058 * code in ring-3. Use PGM_PHYS_RW_IS_SUCCESS to check. 3059 * @retval VINF_SUCCESS in all context - write completed. 3060 * 3061 * @retval VINF_EM_OFF in RC and R0 - write completed. 3062 * @retval VINF_EM_SUSPEND in RC and R0 - write completed. 3063 * @retval VINF_EM_RESET in RC and R0 - write completed. 3064 * @retval VINF_EM_HALT in RC and R0 - write completed. 3065 * @retval VINF_SELM_SYNC_GDT in RC only - write completed. 3066 * 3067 * @retval VINF_EM_DBG_STOP in RC and R0. 3068 * @retval VINF_EM_DBG_BREAKPOINT in RC and R0. 3069 * @retval VINF_EM_RAW_EMULATE_INSTR in RC and R0 only. 3070 * 3071 * @retval VINF_IOM_R3_MMIO_WRITE in RC and R0. 3072 * @retval VINF_IOM_R3_MMIO_READ_WRITE in RC and R0. 3073 * 3074 * @retval VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT in RC only - write completed. 3075 * @retval VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT in RC only. 3076 * @retval VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT in RC only. 3077 * @retval VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT in RC only. 3078 * @retval VINF_CSAM_PENDING_ACTION in RC only. 3079 * @retval VINF_PATM_CHECK_PATCH_PAGE in RC only. 3080 * 3081 * @retval VERR_PGM_PHYS_WR_HIT_HANDLER in RC and R0 for access origins that 3082 * haven't been cleared for strict status codes yet. 3083 * 2912 3084 * 2913 3085 * @param pVM Pointer to the VM. … … 2917 3089 * @param enmOrigin Who is calling. 2918 3090 */ 2919 VMMDECL( int) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin)3091 VMMDECL(VBOXSTRICTRC) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin) 2920 3092 { 2921 3093 AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()! enmOrigin=%d\n", enmOrigin)); … … 2931 3103 * Copy loop on ram ranges. 2932 3104 */ 3105 VBOXSTRICTRC rcStrict = VINF_SUCCESS; 2933 3106 PPGMRAMRANGE pRam = pgmPhysGetRangeAtOrAbove(pVM, GCPhys); 2934 3107 for (;;) … … 2974 3147 else 2975 3148 { 2976 VBOXSTRICTRC rcStrict = pgmPhysWriteHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb, enmOrigin); 2977 if (rcStrict != VINF_SUCCESS) 3149 VBOXSTRICTRC rcStrict2 = pgmPhysWriteHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb, enmOrigin); 3150 if (PGM_PHYS_RW_IS_SUCCESS(rcStrict2)) 3151 PGM_PHYS_RW_DO_UPDATE_STRICT_RC(rcStrict, rcStrict2); 3152 else 2978 3153 { 2979 3154 pgmUnlock(pVM); 2980 return VBOXSTRICTRC_TODO(rcStrict);3155 return rcStrict; 2981 3156 } 2982 3157 } … … 2986 3161 { 2987 3162 pgmUnlock(pVM); 2988 return VINF_SUCCESS;3163 return rcStrict; 2989 3164 } 2990 3165 … … 3017 3192 3018 3193 pgmUnlock(pVM); 3019 return VINF_SUCCESS;3194 return rcStrict; 3020 3195 } 3021 3196 … … 3430 3605 * @thread EMT(pVCpu) 3431 3606 */ 3432 VMMDECL( int) PGMPhysReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, PGMACCESSORIGIN enmOrigin)3607 VMMDECL(VBOXSTRICTRC) PGMPhysReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, PGMACCESSORIGIN enmOrigin) 3433 3608 { 3434 3609 RTGCPHYS GCPhys; … … 3487 3662 if (cbRead < cb) 3488 3663 { 3489 rc = PGMPhysRead(pVM, GCPhys, pvDst, cbRead, enmOrigin); 3490 if (RT_FAILURE(rc)) 3491 return rc; 3664 VBOXSTRICTRC rcStrict = PGMPhysRead(pVM, GCPhys, pvDst, cbRead, enmOrigin); 3665 if (RT_LIKELY(rcStrict == VINF_SUCCESS)) 3666 { /* likely */ } 3667 else 3668 return rcStrict; 3492 3669 } 3493 3670 else /* Last page (cbRead is PAGE_SIZE, we only need cb!) */ … … 3519 3696 * @param enmOrigin Who is calling. 3520 3697 */ 3521 VMMDECL( int) PGMPhysWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, PGMACCESSORIGIN enmOrigin)3698 VMMDECL(VBOXSTRICTRC) PGMPhysWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, PGMACCESSORIGIN enmOrigin) 3522 3699 { 3523 3700 RTGCPHYS GCPhys; … … 3547 3724 /* Mention when we ignore X86_PTE_RW... */ 3548 3725 if (!(fFlags & X86_PTE_RW)) 3549 Log(("PGMPhys GCPtr2GCPhys: Writing to RO page %RGv %#x\n", GCPtrDst, cb));3726 Log(("PGMPhysWriteGCPtr: Writing to RO page %RGv %#x\n", GCPtrDst, cb)); 3550 3727 3551 3728 /* Mark the guest page as accessed and dirty if necessary. */ … … 3571 3748 /* Mention when we ignore X86_PTE_RW... */ 3572 3749 if (!(fFlags & X86_PTE_RW)) 3573 Log(("PGMPhys GCPtr2GCPhys: Writing to RO page %RGv %#x\n", GCPtrDst, cb));3750 Log(("PGMPhysWriteGCPtr: Writing to RO page %RGv %#x\n", GCPtrDst, cb)); 3574 3751 3575 3752 /* Mark the guest page as accessed and dirty if necessary. */ … … 3584 3761 if (cbWrite < cb) 3585 3762 { 3586 rc = PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite, enmOrigin); 3587 if (RT_FAILURE(rc)) 3588 return rc; 3763 VBOXSTRICTRC rcStrict = PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite, enmOrigin); 3764 if (RT_LIKELY(rcStrict == VINF_SUCCESS)) 3765 { /* likely */ } 3766 else 3767 return rcStrict; 3589 3768 } 3590 3769 else /* Last page (cbWrite is PAGE_SIZE, we only need cb!) */ 3591 r c =PGMPhysWrite(pVM, GCPhys, pvSrc, cb, enmOrigin);3770 return PGMPhysWrite(pVM, GCPhys, pvSrc, cb, enmOrigin); 3592 3771 3593 3772 /* next */ -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r56016 r56048 591 591 */ 592 592 X86DESC GstDesc; 593 int rc = PGMPhysReadGCPtr(pVCpu, &GstDesc, GCPtrDesc, sizeof(GstDesc), PGMACCESSORIGIN_IOM); 594 if (RT_FAILURE(rc)) 595 { 596 Log(("SELMLoadHiddenSelectorReg: Error reading descriptor %s=%#x: %Rrc\n", g_aszSRegNms[iSReg], Sel, rc)); 593 VBOXSTRICTRC rcStrict = PGMPhysReadGCPtr(pVCpu, &GstDesc, GCPtrDesc, sizeof(GstDesc), PGMACCESSORIGIN_SELM); 594 if (rcStrict == VINF_SUCCESS) 595 { 596 /* 597 * Validate it and load it. 598 */ 599 if (selmIsGstDescGoodForSReg(pVCpu, pSReg, &GstDesc, iSReg, CPUMGetGuestCPL(pVCpu))) 600 { 601 selmLoadHiddenSRegFromGuestDesc(pVCpu, pSReg, &GstDesc); 602 Log(("SELMLoadHiddenSelectorReg: loaded %s=%#x:{b=%llx, l=%x, a=%x, vs=%x} (gst)\n", 603 g_aszSRegNms[iSReg], Sel, pSReg->u64Base, pSReg->u32Limit, pSReg->Attr.u, pSReg->ValidSel)); 604 STAM_COUNTER_INC(&pVCpu->CTX_SUFF(pVM)->selm.s.StatLoadHidSelGst); 605 } 606 else 607 { 608 Log(("SELMLoadHiddenSelectorReg: Guest table entry is no good (%s=%#x): %.8Rhxs\n", g_aszSRegNms[iSReg], Sel, &GstDesc)); 609 STAM_REL_COUNTER_INC(&pVCpu->CTX_SUFF(pVM)->selm.s.StatLoadHidSelGstNoGood); 610 } 611 } 612 else 613 { 614 AssertMsg(RT_FAILURE_NP(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 615 Log(("SELMLoadHiddenSelectorReg: Error reading descriptor %s=%#x: %Rrc\n", 616 g_aszSRegNms[iSReg], Sel, VBOXSTRICTRC_VAL(rcStrict) )); 597 617 STAM_REL_COUNTER_INC(&pVCpu->CTX_SUFF(pVM)->selm.s.StatLoadHidSelReadErrors); 598 return; 599 } 600 601 /* 602 * Validate it and load it. 603 */ 604 if (!selmIsGstDescGoodForSReg(pVCpu, pSReg, &GstDesc, iSReg, CPUMGetGuestCPL(pVCpu))) 605 { 606 Log(("SELMLoadHiddenSelectorReg: Guest table entry is no good (%s=%#x): %.8Rhxs\n", g_aszSRegNms[iSReg], Sel, &GstDesc)); 607 STAM_REL_COUNTER_INC(&pVCpu->CTX_SUFF(pVM)->selm.s.StatLoadHidSelGstNoGood); 608 return; 609 } 610 611 selmLoadHiddenSRegFromGuestDesc(pVCpu, pSReg, &GstDesc); 612 Log(("SELMLoadHiddenSelectorReg: loaded %s=%#x:{b=%llx, l=%x, a=%x, vs=%x} (gst)\n", 613 g_aszSRegNms[iSReg], Sel, pSReg->u64Base, pSReg->u32Limit, pSReg->Attr.u, pSReg->ValidSel)); 614 STAM_COUNTER_INC(&pVCpu->CTX_SUFF(pVM)->selm.s.StatLoadHidSelGst); 618 } 615 619 } 616 620 -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r55899 r56048 12064 12064 Assert(sizeof(Eflags.u32) >= cbParm); 12065 12065 Eflags.u32 = 0; 12066 rc = PGMPhysRead(pVM, (RTGCPHYS)GCPtrStack, &Eflags.u32, cbParm, PGMACCESSORIGIN_HM); 12066 rc = VBOXSTRICTRC_TODO(PGMPhysRead(pVM, (RTGCPHYS)GCPtrStack, &Eflags.u32, cbParm, PGMACCESSORIGIN_HM)); 12067 AssertMsg(rc == VINF_SUCCESS, ("%Rrc\n", rc)); /** @todo allow strict return codes here */ 12067 12068 } 12068 12069 if (RT_FAILURE(rc)) … … 12117 12118 Eflags.Bits.u1VM = 0; 12118 12119 12119 rc = PGMPhysWrite(pVM, (RTGCPHYS)GCPtrStack, &Eflags.u, cbParm, PGMACCESSORIGIN_HM);12120 if (RT_ FAILURE(rc))12120 rc = VBOXSTRICTRC_TODO(PGMPhysWrite(pVM, (RTGCPHYS)GCPtrStack, &Eflags.u, cbParm, PGMACCESSORIGIN_HM)); 12121 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 12121 12122 { 12123 AssertMsgFailed(("%Rrc\n", rc)); /** @todo allow strict return codes here */ 12122 12124 rc = VERR_EM_INTERPRETER; 12123 12125 break; … … 12152 12154 &GCPtrStack); 12153 12155 if (RT_SUCCESS(rc)) 12154 rc = PGMPhysRead(pVM, (RTGCPHYS)GCPtrStack, &aIretFrame[0], sizeof(aIretFrame), PGMACCESSORIGIN_HM); 12156 { 12157 rc = VBOXSTRICTRC_TODO(PGMPhysRead(pVM, (RTGCPHYS)GCPtrStack, &aIretFrame[0], sizeof(aIretFrame), 12158 PGMACCESSORIGIN_HM)); 12159 AssertMsg(rc == VINF_SUCCESS, ("%Rrc\n", rc)); /** @todo allow strict return codes here */ 12160 } 12155 12161 if (RT_FAILURE(rc)) 12156 12162 { -
trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp
r55899 r56048 205 205 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead)); 206 206 207 int rc= PGMPhysRead(pDevIns->Internal.s.pVMR0, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);208 Assert RC(rc); /** @todo track down the users for this bugger. */209 210 Log(("pdmR0DevHlp_PhysRead: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, rc));211 return rc;207 VBOXSTRICTRC rcStrict = PGMPhysRead(pDevIns->Internal.s.pVMR0, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE); 208 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */ 209 210 Log(("pdmR0DevHlp_PhysRead: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) )); 211 return VBOXSTRICTRC_VAL(rcStrict); 212 212 } 213 213 … … 220 220 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite)); 221 221 222 int rc= PGMPhysWrite(pDevIns->Internal.s.pVMR0, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);223 Assert RC(rc); /** @todo track down the users for this bugger. */224 225 Log(("pdmR0DevHlp_PhysWrite: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, rc));226 return rc;222 VBOXSTRICTRC rcStrict = PGMPhysWrite(pDevIns->Internal.s.pVMR0, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE); 223 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */ 224 225 Log(("pdmR0DevHlp_PhysWrite: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) )); 226 return VBOXSTRICTRC_VAL(rcStrict); 227 227 } 228 228 -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r55899 r56048 715 715 #endif 716 716 717 int rc;717 VBOXSTRICTRC rcStrict; 718 718 if (VM_IS_EMT(pVM)) 719 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE); 720 else 721 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE); 722 723 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc)); 724 return rc; 719 rcStrict = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE); 720 else 721 rcStrict = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE); 722 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */ 723 724 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) )); 725 return VBOXSTRICTRC_VAL(rcStrict); 725 726 } 726 727 … … 743 744 #endif 744 745 745 int rc;746 VBOXSTRICTRC rcStrict; 746 747 if (VM_IS_EMT(pVM)) 747 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE); 748 else 749 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE); 750 751 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc)); 752 return rc; 748 rcStrict = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE); 749 else 750 rcStrict = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE); 751 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */ 752 753 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) )); 754 return VBOXSTRICTRC_VAL(rcStrict); 753 755 } 754 756 -
trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp
r55909 r56048 90 90 PGMACCESSORIGIN enmOrigin) 91 91 { 92 PGMPhysRead(pVM, *pGCPhys, pvBuf, cbRead, enmOrigin); 92 VBOXSTRICTRC rcStrict = PGMPhysRead(pVM, *pGCPhys, pvBuf, cbRead, enmOrigin); 93 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 93 94 return VINF_SUCCESS; 94 95 } … … 221 222 { 222 223 /** @todo VERR_EM_NO_MEMORY */ 223 PGMPhysWrite(pVM, *pGCPhys, pvBuf, cbWrite, enmOrigin); 224 VBOXSTRICTRC rcStrict = PGMPhysWrite(pVM, *pGCPhys, pvBuf, cbWrite, enmOrigin); 225 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 224 226 return VINF_SUCCESS; 225 227 } -
trunk/src/VBox/VMM/VMMR3/PGMPhysRWTmpl.h
r55899 r56048 31 31 Assert(VM_IS_EMT(pVM)); 32 32 PGMPHYS_DATATYPE val; 33 PGMPhysRead(pVM, GCPhys, &val, sizeof(val), enmOrigin); 33 VBOXSTRICTRC rcStrict = PGMPhysRead(pVM, GCPhys, &val, sizeof(val), enmOrigin); 34 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 34 35 return val; 35 36 } … … 50 51 { 51 52 Assert(VM_IS_EMT(pVM)); 52 PGMPhysWrite(pVM, GCPhys, &val, sizeof(val), enmOrigin); 53 VBOXSTRICTRC rcStrict = PGMPhysWrite(pVM, GCPhys, &val, sizeof(val), enmOrigin); 54 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 53 55 } 54 56 -
trunk/src/VBox/VMM/VMMRC/PDMRCDevice.cpp
r55899 r56048 201 201 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead)); 202 202 203 int rc= PGMPhysRead(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);204 Assert RC(rc); /** @todo track down the users for this bugger. */205 206 Log(("pdmRCDevHlp_PhysRead: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, rc));207 return rc;203 VBOXSTRICTRC rcStrict = PGMPhysRead(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE); 204 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */ 205 206 Log(("pdmRCDevHlp_PhysRead: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) )); 207 return VBOXSTRICTRC_VAL(rcStrict); 208 208 } 209 209 … … 216 216 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite)); 217 217 218 int rc= PGMPhysWrite(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);219 Assert RC(rc); /** @todo track down the users for this bugger. */220 221 Log(("pdmRCDevHlp_PhysWrite: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, rc));222 return rc;218 VBOXSTRICTRC rcStrict = PGMPhysWrite(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE); 219 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */ 220 221 Log(("pdmRCDevHlp_PhysWrite: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) )); 222 return VBOXSTRICTRC_VAL(rcStrict); 223 223 } 224 224 -
trunk/src/VBox/VMM/include/PGMInternal.h
r56013 r56048 4146 4146 int pgmPhysGCPhys2CCPtrInternalReadOnly(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, const void **ppv, PPGMPAGEMAPLOCK pLock); 4147 4147 void pgmPhysReleaseInternalPageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock); 4148 PGM_ALL_CB2_DECL(FNPGMPHYSHANDLER) pgmPhysRomWriteHandler;4148 PGM_ALL_CB2_DECL(FNPGMPHYSHANDLER) pgmPhysRomWriteHandler; 4149 4149 #ifndef IN_RING3 4150 DECLEXPORT(FNPGMRZPHYSPFHANDLER) pgmPhysPfHandlerRedirectToHC; 4151 DECLEXPORT(FNPGMRZPHYSPFHANDLER) pgmPhysRomWritePfHandler; 4150 DECLEXPORT(FNPGMPHYSHANDLER) pgmPhysHandlerRedirectToHC; 4151 DECLEXPORT(FNPGMRZPHYSPFHANDLER) pgmPhysPfHandlerRedirectToHC; 4152 DECLEXPORT(FNPGMRZPHYSPFHANDLER) pgmPhysRomWritePfHandler; 4152 4153 #endif 4153 4154 int pgmPhysFreePage(PVM pVM, PGMMFREEPAGESREQ pReq, uint32_t *pcPendingPages, PPGMPAGE pPage, RTGCPHYS GCPhys); -
trunk/src/recompiler/VBoxRecompiler.c
r55980 r56048 3565 3565 STAM_PROFILE_ADV_START(&gStatMemRead, a); 3566 3566 VBOX_CHECK_ADDR(SrcGCPhys); 3567 PGMPhysRead(cpu_single_env->pVM, SrcGCPhys, pvDst, cb, PGMACCESSORIGIN_REM); 3567 VBOXSTRICTRC rcStrict = PGMPhysRead(cpu_single_env->pVM, SrcGCPhys, pvDst, cb, PGMACCESSORIGIN_REM); 3568 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 3568 3569 #ifdef VBOX_DEBUG_PHYS 3569 3570 LogRel(("read(%d): %08x\n", cb, (uint32_t)SrcGCPhys)); … … 3736 3737 STAM_PROFILE_ADV_START(&gStatMemWrite, a); 3737 3738 VBOX_CHECK_ADDR(DstGCPhys); 3738 PGMPhysWrite(cpu_single_env->pVM, DstGCPhys, pvSrc, cb, PGMACCESSORIGIN_REM); 3739 VBOXSTRICTRC rcStrict = PGMPhysWrite(cpu_single_env->pVM, DstGCPhys, pvSrc, cb, PGMACCESSORIGIN_REM); 3740 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 3739 3741 STAM_PROFILE_ADV_STOP(&gStatMemWrite, a); 3740 3742 #ifdef VBOX_DEBUG_PHYS … … 3891 3893 uint8_t u8; 3892 3894 Log2(("remR3HandlerReadU8: GCPhys=%RGp\n", (RTGCPHYS)GCPhys)); 3893 PGMPhysRead((PVM)pvVM, GCPhys, &u8, sizeof(u8), PGMACCESSORIGIN_REM); 3895 VBOXSTRICTRC rcStrict = PGMPhysRead((PVM)pvVM, GCPhys, &u8, sizeof(u8), PGMACCESSORIGIN_REM); 3896 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 3894 3897 return u8; 3895 3898 } … … 3899 3902 uint16_t u16; 3900 3903 Log2(("remR3HandlerReadU16: GCPhys=%RGp\n", (RTGCPHYS)GCPhys)); 3901 PGMPhysRead((PVM)pvVM, GCPhys, &u16, sizeof(u16), PGMACCESSORIGIN_REM); 3904 VBOXSTRICTRC rcStrict = PGMPhysRead((PVM)pvVM, GCPhys, &u16, sizeof(u16), PGMACCESSORIGIN_REM); 3905 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 3902 3906 return u16; 3903 3907 } … … 3907 3911 uint32_t u32; 3908 3912 Log2(("remR3HandlerReadU32: GCPhys=%RGp\n", (RTGCPHYS)GCPhys)); 3909 PGMPhysRead((PVM)pvVM, GCPhys, &u32, sizeof(u32), PGMACCESSORIGIN_REM); 3913 VBOXSTRICTRC rcStrict = PGMPhysRead((PVM)pvVM, GCPhys, &u32, sizeof(u32), PGMACCESSORIGIN_REM); 3914 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 3910 3915 return u32; 3911 3916 } … … 3914 3919 { 3915 3920 Log2(("remR3HandlerWriteU8: GCPhys=%RGp u32=%#x\n", (RTGCPHYS)GCPhys, u32)); 3916 PGMPhysWrite((PVM)pvVM, GCPhys, &u32, sizeof(uint8_t), PGMACCESSORIGIN_REM); 3921 VBOXSTRICTRC rcStrict = PGMPhysWrite((PVM)pvVM, GCPhys, &u32, sizeof(uint8_t), PGMACCESSORIGIN_REM); 3922 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 3917 3923 } 3918 3924 … … 3920 3926 { 3921 3927 Log2(("remR3HandlerWriteU16: GCPhys=%RGp u32=%#x\n", (RTGCPHYS)GCPhys, u32)); 3922 PGMPhysWrite((PVM)pvVM, GCPhys, &u32, sizeof(uint16_t), PGMACCESSORIGIN_REM); 3928 VBOXSTRICTRC rcStrict = PGMPhysWrite((PVM)pvVM, GCPhys, &u32, sizeof(uint16_t), PGMACCESSORIGIN_REM); 3929 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 3923 3930 } 3924 3931 … … 3926 3933 { 3927 3934 Log2(("remR3HandlerWriteU32: GCPhys=%RGp u32=%#x\n", (RTGCPHYS)GCPhys, u32)); 3928 PGMPhysWrite((PVM)pvVM, GCPhys, &u32, sizeof(uint32_t), PGMACCESSORIGIN_REM); 3935 VBOXSTRICTRC rcStrict = PGMPhysWrite((PVM)pvVM, GCPhys, &u32, sizeof(uint32_t), PGMACCESSORIGIN_REM); 3936 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); NOREF(rcStrict); 3929 3937 } 3930 3938
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