Changeset 56400 in vbox for trunk/src/VBox/Devices/Storage
- Timestamp:
- Jun 13, 2015 12:23:15 AM (10 years ago)
- svn:sync-xref-src-repo-rev:
- 101000
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Storage/DevATA.cpp
r56399 r56400 574 574 typedef bool (*PSourceSinkFunc)(ATADevState *); 575 575 576 static void ataR eadWriteSectorsBT(ATADevState *);577 static void ata PacketBT(ATADevState *);578 static void atapi CmdBT(ATADevState *);579 static void atapi PassthroughCmdBT(ATADevState *);580 581 static bool ata IdentifySS(ATADevState *);582 static bool ata FlushSS(ATADevState *);583 static bool ataR eadSectorsSS(ATADevState *);584 static bool ata WriteSectorsSS(ATADevState *);585 static bool ata ExecuteDeviceDiagnosticSS(ATADevState *);586 static bool ata TrimSS(ATADevState *);587 static bool ata PacketSS(ATADevState *);588 static bool atapi GetConfigurationSS(ATADevState *);589 static bool atapi GetEventStatusNotificationSS(ATADevState *);590 static bool atapi IdentifySS(ATADevState *);591 static bool atapi InquirySS(ATADevState *);592 static bool atapi MechanismStatusSS(ATADevState *);593 static bool atapi ModeSenseErrorRecoverySS(ATADevState *);594 static bool atapi ModeSenseCDStatusSS(ATADevState *);595 static bool atapiR eadSS(ATADevState *);596 static bool atapiR eadCapacitySS(ATADevState *);597 static bool atapiR eadDiscInformationSS(ATADevState *);598 static bool atapiR eadTOCNormalSS(ATADevState *);599 static bool atapiR eadTOCMultiSS(ATADevState *);600 static bool atapiR eadTOCRawSS(ATADevState *);601 static bool atapiR eadTrackInformationSS(ATADevState *);602 static bool atapiR equestSenseSS(ATADevState *);603 static bool atapi PassthroughSS(ATADevState *);604 static bool atapiR eadDVDStructureSS(ATADevState *);576 static void ataR3ReadWriteSectorsBT(ATADevState *); 577 static void ataR3PacketBT(ATADevState *); 578 static void atapiR3CmdBT(ATADevState *); 579 static void atapiR3PassthroughCmdBT(ATADevState *); 580 581 static bool ataR3IdentifySS(ATADevState *); 582 static bool ataR3FlushSS(ATADevState *); 583 static bool ataR3ReadSectorsSS(ATADevState *); 584 static bool ataR3WriteSectorsSS(ATADevState *); 585 static bool ataR3ExecuteDeviceDiagnosticSS(ATADevState *); 586 static bool ataR3TrimSS(ATADevState *); 587 static bool ataR3PacketSS(ATADevState *); 588 static bool atapiR3GetConfigurationSS(ATADevState *); 589 static bool atapiR3GetEventStatusNotificationSS(ATADevState *); 590 static bool atapiR3IdentifySS(ATADevState *); 591 static bool atapiR3InquirySS(ATADevState *); 592 static bool atapiR3MechanismStatusSS(ATADevState *); 593 static bool atapiR3ModeSenseErrorRecoverySS(ATADevState *); 594 static bool atapiR3ModeSenseCDStatusSS(ATADevState *); 595 static bool atapiR3ReadSS(ATADevState *); 596 static bool atapiR3ReadCapacitySS(ATADevState *); 597 static bool atapiR3ReadDiscInformationSS(ATADevState *); 598 static bool atapiR3ReadTOCNormalSS(ATADevState *); 599 static bool atapiR3ReadTOCMultiSS(ATADevState *); 600 static bool atapiR3ReadTOCRawSS(ATADevState *); 601 static bool atapiR3ReadTrackInformationSS(ATADevState *); 602 static bool atapiR3RequestSenseSS(ATADevState *); 603 static bool atapiR3PassthroughSS(ATADevState *); 604 static bool atapiR3ReadDVDStructureSS(ATADevState *); 605 605 606 606 /** … … 624 624 { 625 625 NULL, 626 ataR eadWriteSectorsBT,627 ata PacketBT,628 atapi CmdBT,629 atapi PassthroughCmdBT,626 ataR3ReadWriteSectorsBT, 627 ataR3PacketBT, 628 atapiR3CmdBT, 629 atapiR3PassthroughCmdBT, 630 630 }; 631 631 … … 670 670 { 671 671 NULL, 672 ata IdentifySS,673 ata FlushSS,674 ataR eadSectorsSS,675 ata WriteSectorsSS,676 ata ExecuteDeviceDiagnosticSS,677 ata TrimSS,678 ata PacketSS,679 atapi GetConfigurationSS,680 atapi GetEventStatusNotificationSS,681 atapi IdentifySS,682 atapi InquirySS,683 atapi MechanismStatusSS,684 atapi ModeSenseErrorRecoverySS,685 atapi ModeSenseCDStatusSS,686 atapiR eadSS,687 atapiR eadCapacitySS,688 atapiR eadDiscInformationSS,689 atapiR eadTOCNormalSS,690 atapiR eadTOCMultiSS,691 atapiR eadTOCRawSS,692 atapiR eadTrackInformationSS,693 atapiR equestSenseSS,694 atapi PassthroughSS,695 atapiR eadDVDStructureSS672 ataR3IdentifySS, 673 ataR3FlushSS, 674 ataR3ReadSectorsSS, 675 ataR3WriteSectorsSS, 676 ataR3ExecuteDeviceDiagnosticSS, 677 ataR3TrimSS, 678 ataR3PacketSS, 679 atapiR3GetConfigurationSS, 680 atapiR3GetEventStatusNotificationSS, 681 atapiR3IdentifySS, 682 atapiR3InquirySS, 683 atapiR3MechanismStatusSS, 684 atapiR3ModeSenseErrorRecoverySS, 685 atapiR3ModeSenseCDStatusSS, 686 atapiR3ReadSS, 687 atapiR3ReadCapacitySS, 688 atapiR3ReadDiscInformationSS, 689 atapiR3ReadTOCNormalSS, 690 atapiR3ReadTOCMultiSS, 691 atapiR3ReadTOCRawSS, 692 atapiR3ReadTrackInformationSS, 693 atapiR3RequestSenseSS, 694 atapiR3PassthroughSS, 695 atapiR3ReadDVDStructureSS 696 696 }; 697 697 … … 702 702 static const ATARequest g_ataResetCRequest = { ATA_AIO_RESET_CLEARED, { { 0, 0, 0, 0, 0 } } }; 703 703 704 static void ata AsyncIOClearRequests(PATACONTROLLER pCtl)704 static void ataR3AsyncIOClearRequests(PATACONTROLLER pCtl) 705 705 { 706 706 int rc = PDMCritSectEnter(&pCtl->AsyncIORequestLock, VINF_SUCCESS); … … 715 715 716 716 717 static void ata AsyncIOPutRequest(PATACONTROLLER pCtl, const ATARequest *pReq)717 static void ataR3AsyncIOPutRequest(PATACONTROLLER pCtl, const ATARequest *pReq) 718 718 { 719 719 int rc = PDMCritSectEnter(&pCtl->AsyncIORequestLock, VINF_SUCCESS); … … 737 737 738 738 739 static const ATARequest *ata AsyncIOGetCurrentRequest(PATACONTROLLER pCtl)739 static const ATARequest *ataR3AsyncIOGetCurrentRequest(PATACONTROLLER pCtl) 740 740 { 741 741 const ATARequest *pReq; … … 763 763 * @param ReqType Type of the request to remove. 764 764 */ 765 static void ata AsyncIORemoveCurrentRequest(PATACONTROLLER pCtl, ATAAIO ReqType)765 static void ataR3AsyncIORemoveCurrentRequest(PATACONTROLLER pCtl, ATAAIO ReqType) 766 766 { 767 767 int rc = PDMCritSectEnter(&pCtl->AsyncIORequestLock, VINF_SUCCESS); … … 786 786 * @param pCtl Controller for which to dump the queue. 787 787 */ 788 static void ata AsyncIODumpRequests(PATACONTROLLER pCtl)788 static void ataR3AsyncIODumpRequests(PATACONTROLLER pCtl) 789 789 { 790 790 int rc = PDMCritSectEnter(&pCtl->AsyncIORequestLock, VINF_SUCCESS); … … 835 835 * @param fStrict If set then the controller is checked to be idle. 836 836 */ 837 static bool ata AsyncIOIsIdle(PATACONTROLLER pCtl, bool fStrict)837 static bool ataR3AsyncIOIsIdle(PATACONTROLLER pCtl, bool fStrict) 838 838 { 839 839 int rc = PDMCritSectEnter(&pCtl->AsyncIORequestLock, VINF_SUCCESS); … … 862 862 * @param fChainedTransfer Whether this is a transfer that is part of the previous command/transfer. 863 863 */ 864 static void ataStartTransfer(ATADevState *s, uint32_t cbTotalTransfer, uint8_t uTxDir, ATAFNBT iBeginTransfer, ATAFNSS iSourceSink, bool fChainedTransfer) 864 static void ataR3StartTransfer(ATADevState *s, uint32_t cbTotalTransfer, uint8_t uTxDir, ATAFNBT iBeginTransfer, 865 ATAFNSS iSourceSink, bool fChainedTransfer) 865 866 { 866 867 PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s); … … 879 880 * the command that is being submitted. Some broken guests issue commands 880 881 * twice (e.g. the Linux kernel that comes with Acronis True Image 8). */ 881 if (!fChainedTransfer && !ata AsyncIOIsIdle(pCtl, true /*fStrict*/))882 if (!fChainedTransfer && !ataR3AsyncIOIsIdle(pCtl, true /*fStrict*/)) 882 883 { 883 884 Log(("%s: Ctl#%d: ignored command %#04x, controller state %d\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), s->uATARegCommand, pCtl->uAsyncIOState)); … … 902 903 */ 903 904 Log2(("%s: Ctl#%d: message to async I/O thread, new request\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl))); 904 ata AsyncIOPutRequest(pCtl, &Req);905 ataR3AsyncIOPutRequest(pCtl, &Req); 905 906 } 906 907 … … 912 913 * @param fResetDrive Whether to reset the drive or just abort a command. 913 914 */ 914 static void ata AbortCurrentCommand(ATADevState *s, bool fResetDrive)915 static void ataR3AbortCurrentCommand(ATADevState *s, bool fResetDrive) 915 916 { 916 917 PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s); … … 931 932 ataSetStatus(s, ATA_STAT_BUSY); 932 933 Log2(("%s: Ctl#%d: message to async I/O thread, abort command on LUN#%d\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), s->iLUN)); 933 ata AsyncIOPutRequest(pCtl, &Req);934 } 935 936 937 static void ata SetIRQ(ATADevState *s)934 ataR3AsyncIOPutRequest(pCtl, &Req); 935 } 936 937 938 static void ataR3SetIRQ(ATADevState *s) 938 939 { 939 940 PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s); … … 985 986 #ifdef IN_RING3 986 987 987 static void ata PIOTransferStart(ATADevState *s, uint32_t start, uint32_t size)988 static void ataR3PIOTransferStart(ATADevState *s, uint32_t start, uint32_t size) 988 989 { 989 990 Log2(("%s: LUN#%d start %d size %d\n", __FUNCTION__, s->iLUN, start, size)); … … 995 996 996 997 997 static void ata PIOTransferStop(ATADevState *s)998 static void ataR3PIOTransferStop(ATADevState *s) 998 999 { 999 1000 Log2(("%s: LUN#%d\n", __FUNCTION__, s->iLUN)); … … 1002 1003 s->uATARegNSector = (s->uATARegNSector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD; 1003 1004 Log2(("%s: interrupt reason %#04x\n", __FUNCTION__, s->uATARegNSector)); 1004 ata SetIRQ(s);1005 ataR3SetIRQ(s); 1005 1006 s->fATAPITransfer = false; 1006 1007 } … … 1014 1015 1015 1016 1016 static void ata PIOTransferLimitATAPI(ATADevState *s)1017 static void ataR3PIOTransferLimitATAPI(ATADevState *s) 1017 1018 { 1018 1019 uint32_t cbLimit, cbTransfer; … … 1039 1040 1040 1041 1041 static uint32_t ata GetNSectors(ATADevState *s)1042 static uint32_t ataR3GetNSectors(ATADevState *s) 1042 1043 { 1043 1044 /* 0 means either 256 (LBA28) or 65536 (LBA48) sectors. */ … … 1059 1060 1060 1061 1061 static void ata PadString(uint8_t *pbDst, const char *pbSrc, uint32_t cbSize)1062 static void ataR3PadString(uint8_t *pbDst, const char *pbSrc, uint32_t cbSize) 1062 1063 { 1063 1064 for (uint32_t i = 0; i < cbSize; i++) … … 1071 1072 1072 1073 1073 static void ata SCSIPadStr(uint8_t *pbDst, const char *pbSrc, uint32_t cbSize)1074 static void ataR3SCSIPadStr(uint8_t *pbDst, const char *pbSrc, uint32_t cbSize) 1074 1075 { 1075 1076 for (uint32_t i = 0; i < cbSize; i++) … … 1167 1168 } 1168 1169 1169 static void ata CmdOK(ATADevState *s, uint8_t status)1170 static void ataR3CmdOK(ATADevState *s, uint8_t status) 1170 1171 { 1171 1172 s->uATARegError = 0; /* Not needed by ATA spec, but cannot hurt. */ … … 1174 1175 1175 1176 1176 static void ata CmdError(ATADevState *s, uint8_t uErrorCode)1177 static void ataR3CmdError(ATADevState *s, uint8_t uErrorCode) 1177 1178 { 1178 1179 Log(("%s: code=%#x\n", __FUNCTION__, uErrorCode)); … … 1189 1190 } 1190 1191 1191 static uint32_t ata Checksum(void* ptr, size_t count)1192 static uint32_t ataR3Checksum(void* ptr, size_t count) 1192 1193 { 1193 1194 uint8_t u8Sum = 0xa5, *p = (uint8_t*)ptr; … … 1202 1203 } 1203 1204 1204 static bool ata IdentifySS(ATADevState *s)1205 static bool ataR3IdentifySS(ATADevState *s) 1205 1206 { 1206 1207 uint16_t *p; … … 1217 1218 p[5] = RT_H2LE_U16(s->cbSector); 1218 1219 p[6] = RT_H2LE_U16(s->PCHSGeometry.cSectors); 1219 ata PadString((uint8_t *)(p + 10), s->szSerialNumber, ATA_SERIAL_NUMBER_LENGTH); /* serial number */1220 ataR3PadString((uint8_t *)(p + 10), s->szSerialNumber, ATA_SERIAL_NUMBER_LENGTH); /* serial number */ 1220 1221 p[20] = RT_H2LE_U16(3); /* XXX: retired, cache type */ 1221 1222 p[21] = RT_H2LE_U16(512); /* XXX: retired, cache size in sectors */ 1222 1223 p[22] = RT_H2LE_U16(0); /* ECC bytes per sector */ 1223 ata PadString((uint8_t *)(p + 23), s->szFirmwareRevision, ATA_FIRMWARE_REVISION_LENGTH); /* firmware version */1224 ata PadString((uint8_t *)(p + 27), s->szModelNumber, ATA_MODEL_NUMBER_LENGTH); /* model */1225 # if ATA_MAX_MULT_SECTORS > 11224 ataR3PadString((uint8_t *)(p + 23), s->szFirmwareRevision, ATA_FIRMWARE_REVISION_LENGTH); /* firmware version */ 1225 ataR3PadString((uint8_t *)(p + 27), s->szModelNumber, ATA_MODEL_NUMBER_LENGTH); /* model */ 1226 # if ATA_MAX_MULT_SECTORS > 1 1226 1227 p[47] = RT_H2LE_U16(0x8000 | ATA_MAX_MULT_SECTORS); 1227 # endif1228 # endif 1228 1229 p[48] = RT_H2LE_U16(1); /* dword I/O, used by the BIOS */ 1229 1230 p[49] = RT_H2LE_U16(1 << 11 | 1 << 9 | 1 << 8); /* DMA and LBA supported */ … … 1307 1308 if (s->fNonRotational) 1308 1309 p[217] = RT_H2LE_U16(1); /* Non-rotational medium */ 1309 uint32_t uCsum = ata Checksum(p, 510);1310 uint32_t uCsum = ataR3Checksum(p, 510); 1310 1311 p[255] = RT_H2LE_U16(0xa5 | (uCsum << 8)); /* Integrity word */ 1311 1312 s->iSourceSink = ATAFN_SS_NULL; 1312 ata CmdOK(s, ATA_STAT_SEEK);1313 ataR3CmdOK(s, ATA_STAT_SEEK); 1313 1314 return false; 1314 1315 } 1315 1316 1316 1317 1317 static bool ata FlushSS(ATADevState *s)1318 static bool ataR3FlushSS(ATADevState *s) 1318 1319 { 1319 1320 PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s); … … 1333 1334 PDMCritSectEnter(&pCtl->lock, VINF_SUCCESS); 1334 1335 STAM_PROFILE_STOP(&pCtl->StatLockWait, a); 1335 ata CmdOK(s, 0);1336 ataR3CmdOK(s, 0); 1336 1337 return false; 1337 1338 } 1338 1339 1339 static bool atapi IdentifySS(ATADevState *s)1340 static bool atapiR3IdentifySS(ATADevState *s) 1340 1341 { 1341 1342 uint16_t *p; … … 1348 1349 /* Removable CDROM, 3ms response, 12 byte packets */ 1349 1350 p[0] = RT_H2LE_U16(2 << 14 | 5 << 8 | 1 << 7 | 0 << 5 | 0 << 0); 1350 ata PadString((uint8_t *)(p + 10), s->szSerialNumber, ATA_SERIAL_NUMBER_LENGTH); /* serial number */1351 ataR3PadString((uint8_t *)(p + 10), s->szSerialNumber, ATA_SERIAL_NUMBER_LENGTH); /* serial number */ 1351 1352 p[20] = RT_H2LE_U16(3); /* XXX: retired, cache type */ 1352 1353 p[21] = RT_H2LE_U16(512); /* XXX: retired, cache size in sectors */ 1353 ata PadString((uint8_t *)(p + 23), s->szFirmwareRevision, ATA_FIRMWARE_REVISION_LENGTH); /* firmware version */1354 ata PadString((uint8_t *)(p + 27), s->szModelNumber, ATA_MODEL_NUMBER_LENGTH); /* model */1354 ataR3PadString((uint8_t *)(p + 23), s->szFirmwareRevision, ATA_FIRMWARE_REVISION_LENGTH); /* firmware version */ 1355 ataR3PadString((uint8_t *)(p + 27), s->szModelNumber, ATA_MODEL_NUMBER_LENGTH); /* model */ 1355 1356 p[49] = RT_H2LE_U16(1 << 11 | 1 << 9 | 1 << 8); /* DMA and LBA supported */ 1356 1357 p[50] = RT_H2LE_U16(1 << 14); /* No drive specific standby timer minimum */ … … 1390 1391 * The sum of all 512 bytes is zero when the checksum is correct. 1391 1392 */ 1392 uint32_t uCsum = ata Checksum(p, 510);1393 uint32_t uCsum = ataR3Checksum(p, 510); 1393 1394 p[255] = RT_H2LE_U16(0xa5 | (uCsum << 8)); /* Integrity word */ 1394 1395 1395 1396 s->iSourceSink = ATAFN_SS_NULL; 1396 ata CmdOK(s, ATA_STAT_SEEK);1397 ataR3CmdOK(s, ATA_STAT_SEEK); 1397 1398 return false; 1398 1399 } 1399 1400 1400 1401 1401 static void ata SetSignature(ATADevState *s)1402 static void ataR3SetSignature(ATADevState *s) 1402 1403 { 1403 1404 s->uATARegSelect &= 0xf0; /* clear head */ … … 1423 1424 1424 1425 1425 static uint64_t ata GetSector(ATADevState *s)1426 static uint64_t ataR3GetSector(ATADevState *s) 1426 1427 { 1427 1428 uint64_t iLBA; … … 1456 1457 } 1457 1458 1458 static void ata SetSector(ATADevState *s, uint64_t iLBA)1459 static void ataR3SetSector(ATADevState *s, uint64_t iLBA) 1459 1460 { 1460 1461 uint32_t cyl, r; … … 1494 1495 1495 1496 1496 static void ata WarningDiskFull(PPDMDEVINS pDevIns)1497 static void ataR3WarningDiskFull(PPDMDEVINS pDevIns) 1497 1498 { 1498 1499 int rc; … … 1503 1504 } 1504 1505 1505 static void ata WarningFileTooBig(PPDMDEVINS pDevIns)1506 static void ataR3WarningFileTooBig(PPDMDEVINS pDevIns) 1506 1507 { 1507 1508 int rc; … … 1512 1513 } 1513 1514 1514 static void ata WarningISCSI(PPDMDEVINS pDevIns)1515 static void ataR3WarningISCSI(PPDMDEVINS pDevIns) 1515 1516 { 1516 1517 int rc; … … 1521 1522 } 1522 1523 1523 static bool ata IsRedoSetWarning(ATADevState *s, int rc)1524 static bool ataR3IsRedoSetWarning(ATADevState *s, int rc) 1524 1525 { 1525 1526 PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s); … … 1528 1529 { 1529 1530 pCtl->fRedoIdle = true; 1530 ata WarningDiskFull(ATADEVSTATE_2_DEVINS(s));1531 ataR3WarningDiskFull(ATADEVSTATE_2_DEVINS(s)); 1531 1532 return true; 1532 1533 } … … 1534 1535 { 1535 1536 pCtl->fRedoIdle = true; 1536 ata WarningFileTooBig(ATADEVSTATE_2_DEVINS(s));1537 ataR3WarningFileTooBig(ATADEVSTATE_2_DEVINS(s)); 1537 1538 return true; 1538 1539 } … … 1542 1543 /* iSCSI connection abort (first error) or failure to reestablish 1543 1544 * connection (second error). Pause VM. On resume we'll retry. */ 1544 ata WarningISCSI(ATADEVSTATE_2_DEVINS(s));1545 ataR3WarningISCSI(ATADEVSTATE_2_DEVINS(s)); 1545 1546 return true; 1546 1547 } … … 1556 1557 1557 1558 1558 static int ataR eadSectors(ATADevState *s, uint64_t u64Sector, void *pvBuf,1559 uint32_t cSectors, bool *pfRedo)1559 static int ataR3ReadSectors(ATADevState *s, uint64_t u64Sector, void *pvBuf, 1560 uint32_t cSectors, bool *pfRedo) 1560 1561 { 1561 1562 PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s); … … 1569 1570 s->Led.Actual.s.fReading = 0; 1570 1571 STAM_PROFILE_ADV_STOP(&s->StatReads, r); 1571 Log4(("ataR eadSectors: rc=%Rrc cSectors=%#x u64Sector=%llu\n%.*Rhxd\n",1572 Log4(("ataR3ReadSectors: rc=%Rrc cSectors=%#x u64Sector=%llu\n%.*Rhxd\n", 1572 1573 rc, cSectors, u64Sector, cSectors * s->cbSector, pvBuf)); 1573 1574 … … 1577 1578 *pfRedo = false; 1578 1579 else 1579 *pfRedo = ata IsRedoSetWarning(s, rc);1580 *pfRedo = ataR3IsRedoSetWarning(s, rc); 1580 1581 1581 1582 STAM_PROFILE_START(&pCtl->StatLockWait, a); … … 1586 1587 1587 1588 1588 static int ata WriteSectors(ATADevState *s, uint64_t u64Sector,1589 const void *pvBuf, uint32_t cSectors, bool *pfRedo)1589 static int ataR3WriteSectors(ATADevState *s, uint64_t u64Sector, 1590 const void *pvBuf, uint32_t cSectors, bool *pfRedo) 1590 1591 { 1591 1592 PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s); … … 1596 1597 STAM_PROFILE_ADV_START(&s->StatWrites, w); 1597 1598 s->Led.Asserted.s.fWriting = s->Led.Actual.s.fWriting = 1; 1598 # ifdef VBOX_INSTRUMENT_DMA_WRITES1599 # ifdef VBOX_INSTRUMENT_DMA_WRITES 1599 1600 if (s->fDMA) 1600 1601 STAM_PROFILE_ADV_START(&s->StatInstrVDWrites, vw); 1601 # endif1602 # endif 1602 1603 rc = s->pDrvBlock->pfnWrite(s->pDrvBlock, u64Sector * s->cbSector, pvBuf, cSectors * s->cbSector); 1603 # ifdef VBOX_INSTRUMENT_DMA_WRITES1604 # ifdef VBOX_INSTRUMENT_DMA_WRITES 1604 1605 if (s->fDMA) 1605 1606 STAM_PROFILE_ADV_STOP(&s->StatInstrVDWrites, vw); 1606 # endif1607 # endif 1607 1608 s->Led.Actual.s.fWriting = 0; 1608 1609 STAM_PROFILE_ADV_STOP(&s->StatWrites, w); 1609 Log4(("ata WriteSectors: rc=%Rrc cSectors=%#x u64Sector=%llu\n%.*Rhxd\n",1610 Log4(("ataR3WriteSectors: rc=%Rrc cSectors=%#x u64Sector=%llu\n%.*Rhxd\n", 1610 1611 rc, cSectors, u64Sector, cSectors * s->cbSector, pvBuf)); 1611 1612 … … 1615 1616 *pfRedo = false; 1616 1617 else 1617 *pfRedo = ata IsRedoSetWarning(s, rc);1618 *pfRedo = ataR3IsRedoSetWarning(s, rc); 1618 1619 1619 1620 STAM_PROFILE_START(&pCtl->StatLockWait, a); … … 1624 1625 1625 1626 1626 static void ataR eadWriteSectorsBT(ATADevState *s)1627 static void ataR3ReadWriteSectorsBT(ATADevState *s) 1627 1628 { 1628 1629 uint32_t cSectors; … … 1634 1635 s->cbElementaryTransfer = cSectors * s->cbSector; 1635 1636 if (s->uTxDir == PDMBLOCKTXDIR_TO_DEVICE) 1636 ata CmdOK(s, 0);1637 } 1638 1639 1640 static bool ataR eadSectorsSS(ATADevState *s)1637 ataR3CmdOK(s, 0); 1638 } 1639 1640 1641 static bool ataR3ReadSectorsSS(ATADevState *s) 1641 1642 { 1642 1643 int rc; … … 1647 1648 cSectors = s->cbElementaryTransfer / s->cbSector; 1648 1649 Assert(cSectors); 1649 iLBA = ata GetSector(s);1650 iLBA = ataR3GetSector(s); 1650 1651 Log(("%s: %d sectors at LBA %d\n", __FUNCTION__, cSectors, iLBA)); 1651 rc = ataR eadSectors(s, iLBA, s->CTX_SUFF(pbIOBuffer), cSectors, &fRedo);1652 rc = ataR3ReadSectors(s, iLBA, s->CTX_SUFF(pbIOBuffer), cSectors, &fRedo); 1652 1653 if (RT_SUCCESS(rc)) 1653 1654 { 1654 ata SetSector(s, iLBA + cSectors);1655 ataR3SetSector(s, iLBA + cSectors); 1655 1656 if (s->cbElementaryTransfer == s->cbTotalTransfer) 1656 1657 s->iSourceSink = ATAFN_SS_NULL; 1657 ata CmdOK(s, ATA_STAT_SEEK);1658 ataR3CmdOK(s, ATA_STAT_SEEK); 1658 1659 } 1659 1660 else … … 1670 1671 */ 1671 1672 if (rc != VERR_INTERRUPTED) 1672 ata CmdError(s, ID_ERR);1673 ataR3CmdError(s, ID_ERR); 1673 1674 } 1674 1675 return false; … … 1676 1677 1677 1678 1678 static bool ata WriteSectorsSS(ATADevState *s)1679 static bool ataR3WriteSectorsSS(ATADevState *s) 1679 1680 { 1680 1681 int rc; … … 1685 1686 cSectors = s->cbElementaryTransfer / s->cbSector; 1686 1687 Assert(cSectors); 1687 iLBA = ata GetSector(s);1688 iLBA = ataR3GetSector(s); 1688 1689 Log(("%s: %d sectors at LBA %d\n", __FUNCTION__, cSectors, iLBA)); 1689 rc = ata WriteSectors(s, iLBA, s->CTX_SUFF(pbIOBuffer), cSectors, &fRedo);1690 rc = ataR3WriteSectors(s, iLBA, s->CTX_SUFF(pbIOBuffer), cSectors, &fRedo); 1690 1691 if (RT_SUCCESS(rc)) 1691 1692 { 1692 ata SetSector(s, iLBA + cSectors);1693 ataR3SetSector(s, iLBA + cSectors); 1693 1694 if (!s->cbTotalTransfer) 1694 1695 s->iSourceSink = ATAFN_SS_NULL; 1695 ata CmdOK(s, ATA_STAT_SEEK);1696 ataR3CmdOK(s, ATA_STAT_SEEK); 1696 1697 } 1697 1698 else … … 1708 1709 */ 1709 1710 if (rc != VERR_INTERRUPTED) 1710 ata CmdError(s, ID_ERR);1711 ataR3CmdError(s, ID_ERR); 1711 1712 } 1712 1713 return false; … … 1714 1715 1715 1716 1716 static void atapi CmdOK(ATADevState *s)1717 static void atapiR3CmdOK(ATADevState *s) 1717 1718 { 1718 1719 s->uATARegError = 0; … … 1729 1730 1730 1731 1731 static void atapi CmdError(ATADevState *s, const uint8_t *pabATAPISense, size_t cbATAPISense)1732 static void atapiR3CmdError(ATADevState *s, const uint8_t *pabATAPISense, size_t cbATAPISense) 1732 1733 { 1733 1734 Log(("%s: sense=%#x (%s) asc=%#x ascq=%#x (%s)\n", __FUNCTION__, pabATAPISense[2] & 0x0f, SCSISenseText(pabATAPISense[2] & 0x0f), … … 1751 1752 1752 1753 /** @todo deprecated function - doesn't provide enough info. Replace by direct 1753 * calls to atapi CmdError() with full data. */1754 static void atapi CmdErrorSimple(ATADevState *s, uint8_t uATAPISenseKey, uint8_t uATAPIASC)1754 * calls to atapiR3CmdError() with full data. */ 1755 static void atapiR3CmdErrorSimple(ATADevState *s, uint8_t uATAPISenseKey, uint8_t uATAPIASC) 1755 1756 { 1756 1757 uint8_t abATAPISense[ATAPI_SENSE_SIZE]; … … 1760 1761 abATAPISense[7] = 10; 1761 1762 abATAPISense[12] = uATAPIASC; 1762 atapi CmdError(s, abATAPISense, sizeof(abATAPISense));1763 } 1764 1765 1766 static void atapi CmdBT(ATADevState *s)1763 atapiR3CmdError(s, abATAPISense, sizeof(abATAPISense)); 1764 } 1765 1766 1767 static void atapiR3CmdBT(ATADevState *s) 1767 1768 { 1768 1769 s->fATAPITransfer = true; … … 1771 1772 s->cbPIOTransferLimit = s->uATARegLCyl | (s->uATARegHCyl << 8); 1772 1773 if (s->uTxDir == PDMBLOCKTXDIR_TO_DEVICE) 1773 atapi CmdOK(s);1774 } 1775 1776 1777 static void atapi PassthroughCmdBT(ATADevState *s)1778 { 1779 /* @todo implement an algorithm for correctly determining the read and1774 atapiR3CmdOK(s); 1775 } 1776 1777 1778 static void atapiR3PassthroughCmdBT(ATADevState *s) 1779 { 1780 /** @todo implement an algorithm for correctly determining the read and 1780 1781 * write sector size without sending additional commands to the drive. 1781 1782 * This should be doable by saving processing the configuration requests 1782 1783 * and replies. */ 1783 # if 01784 # if 0 1784 1785 if (s->uTxDir == PDMBLOCKTXDIR_TO_DEVICE) 1785 1786 { … … 1807 1808 if (RT_FAILURE(rc)) 1808 1809 { 1809 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_NONE);1810 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_NONE); 1810 1811 return; 1811 1812 } … … 1848 1849 } 1849 1850 } 1850 #endif 1851 atapiCmdBT(s); 1852 } 1853 1854 1855 static bool atapiReadSS(ATADevState *s) 1851 # endif 1852 atapiR3CmdBT(s); 1853 } 1854 1855 static bool atapiR3ReadSS(ATADevState *s) 1856 1856 { 1857 1857 PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s); … … 1925 1925 if (cbTransfer >= s->cbTotalTransfer) 1926 1926 s->iSourceSink = ATAFN_SS_NULL; 1927 atapi CmdOK(s);1927 atapiR3CmdOK(s); 1928 1928 s->iATAPILBA += cSectors; 1929 1929 } … … 1938 1938 */ 1939 1939 if (rc != VERR_INTERRUPTED) 1940 atapi CmdErrorSimple(s, SCSI_SENSE_MEDIUM_ERROR, SCSI_ASC_READ_ERROR);1940 atapiR3CmdErrorSimple(s, SCSI_SENSE_MEDIUM_ERROR, SCSI_ASC_READ_ERROR); 1941 1941 } 1942 1942 return false; … … 1946 1946 * Sets the given media track type. 1947 1947 */ 1948 static uint32_t ata MediumTypeSet(ATADevState *s, uint32_t MediaTrackType)1948 static uint32_t ataR3MediumTypeSet(ATADevState *s, uint32_t MediaTrackType) 1949 1949 { 1950 1950 return ASMAtomicXchgU32(&s->MediaTrackType, MediaTrackType); 1951 1951 } 1952 1952 1953 static bool atapi PassthroughSS(ATADevState *s)1953 static bool atapiR3PassthroughSS(ATADevState *s) 1954 1954 { 1955 1955 PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s); … … 1982 1982 PDMCritSectLeave(&pCtl->lock); 1983 1983 1984 # if defined(LOG_ENABLED)1984 # if defined(LOG_ENABLED) 1985 1985 char szBuf[1024]; 1986 1986 … … 2009 2009 2010 2010 Log2(("%s\n", szBuf)); 2011 # endif2011 # endif 2012 2012 2013 2013 if (pProf) { STAM_PROFILE_ADV_START(pProf, b); } … … 2052 2052 if (s->cErrors++ < MAX_LOG_REL_ERRORS) 2053 2053 LogRel(("PIIX3 ATA: LUN#%d: CD-ROM passthrough split error\n", s->iLUN)); 2054 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);2054 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE); 2055 2055 { 2056 2056 STAM_PROFILE_START(&pCtl->StatLockWait, a); … … 2127 2127 if (s->cErrors++ < MAX_LOG_REL_ERRORS) 2128 2128 LogRel(("PIIX3 ATA: LUN#%d: CD-ROM passthrough split error\n", s->iLUN)); 2129 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);2129 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE); 2130 2130 return false; 2131 2131 } … … 2190 2190 * but only if the command wasn't split. 2191 2191 */ 2192 # if 0 //@todo:This destroys commands where cbTotalTransfer > cbIOBuffer2192 # if 0 /// @todo This destroys commands where cbTotalTransfer > cbIOBuffer 2193 2193 if (s->cbElementaryTransfer < s->cbIOBuffer) 2194 2194 s->cbTotalTransfer = cbTransfer; 2195 # endif2195 # endif 2196 2196 2197 2197 if ( s->aATAPICmd[0] == SCSI_INQUIRY … … 2202 2202 * invisible as possible to the guest. */ 2203 2203 Log3(("ATAPI PT inquiry data before (%d): %.*Rhxs\n", cbTransfer, cbTransfer, s->CTX_SUFF(pbIOBuffer))); 2204 ata SCSIPadStr(s->CTX_SUFF(pbIOBuffer) + 8, "VBOX", 8);2205 ata SCSIPadStr(s->CTX_SUFF(pbIOBuffer) + 16, "CD-ROM", 16);2206 ata SCSIPadStr(s->CTX_SUFF(pbIOBuffer) + 32, "1.0", 4);2204 ataR3PadString(s->CTX_SUFF(pbIOBuffer) + 8, "VBOX", 8); 2205 ataR3PadString(s->CTX_SUFF(pbIOBuffer) + 16, "CD-ROM", 16); 2206 ataR3PadString(s->CTX_SUFF(pbIOBuffer) + 32, "1.0", 4); 2207 2207 } 2208 2208 … … 2218 2218 { 2219 2219 s->iSourceSink = ATAFN_SS_NULL; 2220 atapi CmdOK(s);2220 atapiR3CmdOK(s); 2221 2221 } 2222 2222 } … … 2240 2240 } while (0); 2241 2241 } 2242 atapi CmdError(s, abATAPISense, sizeof(abATAPISense));2242 atapiR3CmdError(s, abATAPISense, sizeof(abATAPISense)); 2243 2243 } 2244 2244 return false; 2245 2245 } 2246 2246 2247 /** @todo :Revise ASAP. */2248 static bool atapiR eadDVDStructureSS(ATADevState *s)2247 /** @todo Revise ASAP. */ 2248 static bool atapiR3ReadDVDStructureSS(ATADevState *s) 2249 2249 { 2250 2250 uint8_t *buf = s->CTX_SUFF(pbIOBuffer); … … 2377 2377 { 2378 2378 s->iSourceSink = ATAFN_SS_NULL; 2379 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, -uASC);2379 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, -uASC); 2380 2380 return false; 2381 2381 } … … 2393 2393 default: 2394 2394 s->iSourceSink = ATAFN_SS_NULL; 2395 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST,2395 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, 2396 2396 SCSI_ASC_INV_FIELD_IN_CMD_PACKET); 2397 2397 return false; … … 2399 2399 2400 2400 s->iSourceSink = ATAFN_SS_NULL; 2401 atapi CmdOK(s);2401 atapiR3CmdOK(s); 2402 2402 return false; 2403 2403 } 2404 2404 2405 static bool atapiR eadSectors(ATADevState *s, uint32_t iATAPILBA, uint32_t cSectors, uint32_t cbSector)2405 static bool atapiR3ReadSectors(ATADevState *s, uint32_t iATAPILBA, uint32_t cSectors, uint32_t cbSector) 2406 2406 { 2407 2407 Assert(cSectors > 0); 2408 2408 s->iATAPILBA = iATAPILBA; 2409 2409 s->cbATAPISector = cbSector; 2410 ata StartTransfer(s, cSectors * cbSector, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ, true);2410 ataR3StartTransfer(s, cSectors * cbSector, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ, true); 2411 2411 return false; 2412 2412 } 2413 2413 2414 2414 2415 static bool atapiR eadCapacitySS(ATADevState *s)2415 static bool atapiR3ReadCapacitySS(ATADevState *s) 2416 2416 { 2417 2417 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2422 2422 ataH2BE_U32(pbBuf + 4, 2048); 2423 2423 s->iSourceSink = ATAFN_SS_NULL; 2424 atapi CmdOK(s);2424 atapiR3CmdOK(s); 2425 2425 return false; 2426 2426 } 2427 2427 2428 2428 2429 static bool atapiR eadDiscInformationSS(ATADevState *s)2429 static bool atapiR3ReadDiscInformationSS(ATADevState *s) 2430 2430 { 2431 2431 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2448 2448 ataH2BE_U32(pbBuf + 20, 0x00ffffff); /* last possible start time for lead-out is not available */ 2449 2449 s->iSourceSink = ATAFN_SS_NULL; 2450 atapi CmdOK(s);2450 atapiR3CmdOK(s); 2451 2451 return false; 2452 2452 } 2453 2453 2454 2454 2455 static bool atapiR eadTrackInformationSS(ATADevState *s)2455 static bool atapiR3ReadTrackInformationSS(ATADevState *s) 2456 2456 { 2457 2457 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2462 2462 if ((s->aATAPICmd[1] & 0x03) != 1 || ataBE2H_U32(&s->aATAPICmd[2]) != 1) 2463 2463 { 2464 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);2464 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET); 2465 2465 return false; 2466 2466 } … … 2477 2477 pbBuf[33] = 0; /* session number (MSB) */ 2478 2478 s->iSourceSink = ATAFN_SS_NULL; 2479 atapi CmdOK(s);2479 atapiR3CmdOK(s); 2480 2480 return false; 2481 2481 } 2482 2482 2483 static uint32_t atapi GetConfigurationFillFeatureListProfiles(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2483 static uint32_t atapiR3GetConfigurationFillFeatureListProfiles(ATADevState *s, uint8_t *pbBuf, size_t cbBuf) 2484 2484 { 2485 2485 if (cbBuf < 3*4) … … 2499 2499 } 2500 2500 2501 static uint32_t atapi GetConfigurationFillFeatureCore(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2501 static uint32_t atapiR3GetConfigurationFillFeatureCore(ATADevState *s, uint8_t *pbBuf, size_t cbBuf) 2502 2502 { 2503 2503 if (cbBuf < 12) … … 2514 2514 } 2515 2515 2516 static uint32_t atapi GetConfigurationFillFeatureMorphing(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2516 static uint32_t atapiR3GetConfigurationFillFeatureMorphing(ATADevState *s, uint8_t *pbBuf, size_t cbBuf) 2517 2517 { 2518 2518 if (cbBuf < 8) … … 2528 2528 } 2529 2529 2530 static uint32_t atapi GetConfigurationFillFeatureRemovableMedium(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2530 static uint32_t atapiR3GetConfigurationFillFeatureRemovableMedium(ATADevState *s, uint8_t *pbBuf, size_t cbBuf) 2531 2531 { 2532 2532 if (cbBuf < 8) … … 2543 2543 } 2544 2544 2545 static uint32_t atapi GetConfigurationFillFeatureRandomReadable(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2545 static uint32_t atapiR3GetConfigurationFillFeatureRandomReadable (ATADevState *s, uint8_t *pbBuf, size_t cbBuf) 2546 2546 { 2547 2547 if (cbBuf < 12) … … 2559 2559 } 2560 2560 2561 static uint32_t atapi GetConfigurationFillFeatureCDRead(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2561 static uint32_t atapiR3GetConfigurationFillFeatureCDRead(ATADevState *s, uint8_t *pbBuf, size_t cbBuf) 2562 2562 { 2563 2563 if (cbBuf < 8) … … 2573 2573 } 2574 2574 2575 static uint32_t atapi GetConfigurationFillFeaturePowerManagement(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2575 static uint32_t atapiR3GetConfigurationFillFeaturePowerManagement(ATADevState *s, uint8_t *pbBuf, size_t cbBuf) 2576 2576 { 2577 2577 if (cbBuf < 4) … … 2585 2585 } 2586 2586 2587 static uint32_t atapi GetConfigurationFillFeatureTimeout(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2587 static uint32_t atapiR3GetConfigurationFillFeatureTimeout(ATADevState *s, uint8_t *pbBuf, size_t cbBuf) 2588 2588 { 2589 2589 if (cbBuf < 8) … … 2598 2598 } 2599 2599 2600 static bool atapi GetConfigurationSS(ATADevState *s)2600 static bool atapiR3GetConfigurationSS(ATADevState *s) 2601 2601 { 2602 2602 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2610 2610 if ((s->aATAPICmd[1] & 0x03) == 3 || u16Sfn != 0) 2611 2611 { 2612 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);2612 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET); 2613 2613 return false; 2614 2614 } … … 2623 2623 pbBuf += 8; 2624 2624 2625 cbCopied = atapi GetConfigurationFillFeatureListProfiles(s, pbBuf, cbBuf);2625 cbCopied = atapiR3GetConfigurationFillFeatureListProfiles(s, pbBuf, cbBuf); 2626 2626 cbBuf -= cbCopied; 2627 2627 pbBuf += cbCopied; 2628 2628 2629 cbCopied = atapi GetConfigurationFillFeatureCore(s, pbBuf, cbBuf);2629 cbCopied = atapiR3GetConfigurationFillFeatureCore(s, pbBuf, cbBuf); 2630 2630 cbBuf -= cbCopied; 2631 2631 pbBuf += cbCopied; 2632 2632 2633 cbCopied = atapi GetConfigurationFillFeatureMorphing(s, pbBuf, cbBuf);2633 cbCopied = atapiR3GetConfigurationFillFeatureMorphing(s, pbBuf, cbBuf); 2634 2634 cbBuf -= cbCopied; 2635 2635 pbBuf += cbCopied; 2636 2636 2637 cbCopied = atapi GetConfigurationFillFeatureRemovableMedium(s, pbBuf, cbBuf);2637 cbCopied = atapiR3GetConfigurationFillFeatureRemovableMedium(s, pbBuf, cbBuf); 2638 2638 cbBuf -= cbCopied; 2639 2639 pbBuf += cbCopied; 2640 2640 2641 cbCopied = atapi GetConfigurationFillFeatureRandomReadable(s, pbBuf, cbBuf);2641 cbCopied = atapiR3GetConfigurationFillFeatureRandomReadable (s, pbBuf, cbBuf); 2642 2642 cbBuf -= cbCopied; 2643 2643 pbBuf += cbCopied; 2644 2644 2645 cbCopied = atapi GetConfigurationFillFeatureCDRead(s, pbBuf, cbBuf);2645 cbCopied = atapiR3GetConfigurationFillFeatureCDRead(s, pbBuf, cbBuf); 2646 2646 cbBuf -= cbCopied; 2647 2647 pbBuf += cbCopied; 2648 2648 2649 cbCopied = atapi GetConfigurationFillFeaturePowerManagement(s, pbBuf, cbBuf);2649 cbCopied = atapiR3GetConfigurationFillFeaturePowerManagement(s, pbBuf, cbBuf); 2650 2650 cbBuf -= cbCopied; 2651 2651 pbBuf += cbCopied; 2652 2652 2653 cbCopied = atapi GetConfigurationFillFeatureTimeout(s, pbBuf, cbBuf);2653 cbCopied = atapiR3GetConfigurationFillFeatureTimeout(s, pbBuf, cbBuf); 2654 2654 cbBuf -= cbCopied; 2655 2655 pbBuf += cbCopied; … … 2660 2660 /* Other profiles we might want to add in the future: 0x40 (BD-ROM) and 0x50 (HDDVD-ROM) */ 2661 2661 s->iSourceSink = ATAFN_SS_NULL; 2662 atapi CmdOK(s);2662 atapiR3CmdOK(s); 2663 2663 return false; 2664 2664 } 2665 2665 2666 2666 2667 static bool atapi GetEventStatusNotificationSS(ATADevState *s)2667 static bool atapiR3GetEventStatusNotificationSS(ATADevState *s) 2668 2668 { 2669 2669 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2675 2675 { 2676 2676 /* no asynchronous operation supported */ 2677 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);2677 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET); 2678 2678 return false; 2679 2679 } … … 2735 2735 2736 2736 s->iSourceSink = ATAFN_SS_NULL; 2737 atapi CmdOK(s);2737 atapiR3CmdOK(s); 2738 2738 return false; 2739 2739 } 2740 2740 2741 2741 2742 static bool atapi InquirySS(ATADevState *s)2742 static bool atapiR3InquirySS(ATADevState *s) 2743 2743 { 2744 2744 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2748 2748 pbBuf[0] = 0x05; /* CD-ROM */ 2749 2749 pbBuf[1] = 0x80; /* removable */ 2750 # if 1/*ndef VBOX*/ /** @todo implement MESN + AENC. (async notification on removal and stuff.) */2750 # if 1/*ndef VBOX*/ /** @todo implement MESN + AENC. (async notification on removal and stuff.) */ 2751 2751 pbBuf[2] = 0x00; /* ISO */ 2752 2752 pbBuf[3] = 0x21; /* ATAPI-2 (XXX: put ATAPI-4 ?) */ 2753 # else2753 # else 2754 2754 pbBuf[2] = 0x00; /* ISO */ 2755 2755 pbBuf[3] = 0x91; /* format 1, MESN=1, AENC=9 ??? */ 2756 # endif2756 # endif 2757 2757 pbBuf[4] = 31; /* additional length */ 2758 2758 pbBuf[5] = 0; /* reserved */ 2759 2759 pbBuf[6] = 0; /* reserved */ 2760 2760 pbBuf[7] = 0; /* reserved */ 2761 ata SCSIPadStr(pbBuf + 8, s->szInquiryVendorId, 8);2762 ata SCSIPadStr(pbBuf + 16, s->szInquiryProductId, 16);2763 ata SCSIPadStr(pbBuf + 32, s->szInquiryRevision, 4);2761 ataR3PadString(pbBuf + 8, s->szInquiryVendorId, 8); 2762 ataR3PadString(pbBuf + 16, s->szInquiryProductId, 16); 2763 ataR3PadString(pbBuf + 32, s->szInquiryRevision, 4); 2764 2764 s->iSourceSink = ATAFN_SS_NULL; 2765 atapi CmdOK(s);2765 atapiR3CmdOK(s); 2766 2766 return false; 2767 2767 } 2768 2768 2769 2769 2770 static bool atapi ModeSenseErrorRecoverySS(ATADevState *s)2770 static bool atapiR3ModeSenseErrorRecoverySS(ATADevState *s) 2771 2771 { 2772 2772 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2791 2791 pbBuf[15] = 0x00; 2792 2792 s->iSourceSink = ATAFN_SS_NULL; 2793 atapi CmdOK(s);2793 atapiR3CmdOK(s); 2794 2794 return false; 2795 2795 } 2796 2796 2797 2797 2798 static bool atapi ModeSenseCDStatusSS(ATADevState *s)2798 static bool atapiR3ModeSenseCDStatusSS(ATADevState *s) 2799 2799 { 2800 2800 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2839 2839 ataH2BE_U16(&pbBuf[38], 0); /* number of write speed performance descriptors */ 2840 2840 s->iSourceSink = ATAFN_SS_NULL; 2841 atapi CmdOK(s);2841 atapiR3CmdOK(s); 2842 2842 return false; 2843 2843 } 2844 2844 2845 2845 2846 static bool atapiR equestSenseSS(ATADevState *s)2846 static bool atapiR3RequestSenseSS(ATADevState *s) 2847 2847 { 2848 2848 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2852 2852 memcpy(pbBuf, s->abATAPISense, RT_MIN(s->cbElementaryTransfer, sizeof(s->abATAPISense))); 2853 2853 s->iSourceSink = ATAFN_SS_NULL; 2854 atapi CmdOK(s);2854 atapiR3CmdOK(s); 2855 2855 return false; 2856 2856 } 2857 2857 2858 2858 2859 static bool atapi MechanismStatusSS(ATADevState *s)2859 static bool atapiR3MechanismStatusSS(ATADevState *s) 2860 2860 { 2861 2861 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2871 2871 ataH2BE_U16(pbBuf + 6, 0); 2872 2872 s->iSourceSink = ATAFN_SS_NULL; 2873 atapi CmdOK(s);2873 atapiR3CmdOK(s); 2874 2874 return false; 2875 2875 } 2876 2876 2877 2877 2878 static bool atapiR eadTOCNormalSS(ATADevState *s)2878 static bool atapiR3ReadTOCNormalSS(ATADevState *s) 2879 2879 { 2880 2880 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer), *q, iStartTrack; … … 2887 2887 if (iStartTrack > 1 && iStartTrack != 0xaa) 2888 2888 { 2889 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);2889 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET); 2890 2890 return false; 2891 2891 } … … 2933 2933 s->cbTotalTransfer = cbSize; 2934 2934 s->iSourceSink = ATAFN_SS_NULL; 2935 atapi CmdOK(s);2935 atapiR3CmdOK(s); 2936 2936 return false; 2937 2937 } 2938 2938 2939 2939 2940 static bool atapiR eadTOCMultiSS(ATADevState *s)2940 static bool atapiR3ReadTOCMultiSS(ATADevState *s) 2941 2941 { 2942 2942 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer); … … 2965 2965 } 2966 2966 s->iSourceSink = ATAFN_SS_NULL; 2967 atapi CmdOK(s);2967 atapiR3CmdOK(s); 2968 2968 return false; 2969 2969 } 2970 2970 2971 2971 2972 static bool atapiR eadTOCRawSS(ATADevState *s)2972 static bool atapiR3ReadTOCRawSS(ATADevState *s) 2973 2973 { 2974 2974 uint8_t *pbBuf = s->CTX_SUFF(pbIOBuffer), *q, iStartTrack; … … 3052 3052 s->cbTotalTransfer = cbSize; 3053 3053 s->iSourceSink = ATAFN_SS_NULL; 3054 atapi CmdOK(s);3054 atapiR3CmdOK(s); 3055 3055 return false; 3056 3056 } 3057 3057 3058 3058 3059 static void atapi ParseCmdVirtualATAPI(ATADevState *s)3059 static void atapiR3ParseCmdVirtualATAPI(ATADevState *s) 3060 3060 { 3061 3061 const uint8_t *pbPacket; … … 3071 3071 { 3072 3072 if (s->cNotifiedMediaChange-- > 2) 3073 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3073 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3074 3074 else 3075 atapi CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */3075 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */ 3076 3076 } 3077 3077 else if (s->pDrvMount->pfnIsMounted(s->pDrvMount)) 3078 atapi CmdOK(s);3078 atapiR3CmdOK(s); 3079 3079 else 3080 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3080 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3081 3081 break; 3082 3082 case SCSI_GET_EVENT_STATUS_NOTIFICATION: 3083 3083 cbMax = ataBE2H_U16(pbPacket + 7); 3084 ata StartTransfer(s, RT_MIN(cbMax, 8), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true);3084 ataR3StartTransfer(s, RT_MIN(cbMax, 8), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true); 3085 3085 break; 3086 3086 case SCSI_MODE_SENSE_10: … … 3096 3096 { 3097 3097 case SCSI_MODEPAGE_ERROR_RECOVERY: 3098 ata StartTransfer(s, RT_MIN(cbMax, 16), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_ERROR_RECOVERY, true);3098 ataR3StartTransfer(s, RT_MIN(cbMax, 16), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_ERROR_RECOVERY, true); 3099 3099 break; 3100 3100 case SCSI_MODEPAGE_CD_STATUS: 3101 ata StartTransfer(s, RT_MIN(cbMax, 40), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_CD_STATUS, true);3101 ataR3StartTransfer(s, RT_MIN(cbMax, 40), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_CD_STATUS, true); 3102 3102 break; 3103 3103 default: … … 3111 3111 default: 3112 3112 case SCSI_PAGECONTROL_SAVED: 3113 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_SAVING_PARAMETERS_NOT_SUPPORTED);3113 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_SAVING_PARAMETERS_NOT_SUPPORTED); 3114 3114 break; 3115 3115 } … … 3118 3118 case SCSI_REQUEST_SENSE: 3119 3119 cbMax = pbPacket[4]; 3120 ata StartTransfer(s, RT_MIN(cbMax, 18), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true);3120 ataR3StartTransfer(s, RT_MIN(cbMax, 18), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true); 3121 3121 break; 3122 3122 case SCSI_PREVENT_ALLOW_MEDIUM_REMOVAL: … … 3127 3127 else 3128 3128 s->pDrvMount->pfnUnlock(s->pDrvMount); 3129 atapi CmdOK(s);3129 atapiR3CmdOK(s); 3130 3130 } 3131 3131 else 3132 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3132 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3133 3133 break; 3134 3134 case SCSI_READ_10: … … 3140 3140 { 3141 3141 s->cNotifiedMediaChange-- ; 3142 atapi CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */3142 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */ 3143 3143 break; 3144 3144 } 3145 3145 else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount)) 3146 3146 { 3147 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3147 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3148 3148 break; 3149 3149 } … … 3155 3155 if (cSectors == 0) 3156 3156 { 3157 atapi CmdOK(s);3157 atapiR3CmdOK(s); 3158 3158 break; 3159 3159 } … … 3170 3170 uLastLogTS = RTTimeMilliTS(); 3171 3171 } 3172 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR);3172 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR); 3173 3173 break; 3174 3174 } 3175 atapiR eadSectors(s, iATAPILBA, cSectors, 2048);3175 atapiR3ReadSectors(s, iATAPILBA, cSectors, 2048); 3176 3176 break; 3177 3177 } … … 3183 3183 { 3184 3184 s->cNotifiedMediaChange-- ; 3185 atapi CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */3185 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */ 3186 3186 break; 3187 3187 } 3188 3188 else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount)) 3189 3189 { 3190 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3190 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3191 3191 break; 3192 3192 } … … 3195 3195 if (cSectors == 0) 3196 3196 { 3197 atapi CmdOK(s);3197 atapiR3CmdOK(s); 3198 3198 break; 3199 3199 } … … 3210 3210 uLastLogTS = RTTimeMilliTS(); 3211 3211 } 3212 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR);3212 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR); 3213 3213 break; 3214 3214 } … … 3217 3217 case 0x00: 3218 3218 /* nothing */ 3219 atapi CmdOK(s);3219 atapiR3CmdOK(s); 3220 3220 break; 3221 3221 case 0x10: 3222 3222 /* normal read */ 3223 atapiR eadSectors(s, iATAPILBA, cSectors, 2048);3223 atapiR3ReadSectors(s, iATAPILBA, cSectors, 2048); 3224 3224 break; 3225 3225 case 0xf8: 3226 3226 /* read all data */ 3227 atapiR eadSectors(s, iATAPILBA, cSectors, 2352);3227 atapiR3ReadSectors(s, iATAPILBA, cSectors, 2352); 3228 3228 break; 3229 3229 default: 3230 3230 LogRel(("PIIX3 ATA: LUN#%d: CD-ROM sector format not supported (%#x)\n", s->iLUN, pbPacket[9] & 0xf8)); 3231 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);3231 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET); 3232 3232 break; 3233 3233 } … … 3240 3240 { 3241 3241 s->cNotifiedMediaChange-- ; 3242 atapi CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */3242 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */ 3243 3243 break; 3244 3244 } 3245 3245 else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount)) 3246 3246 { 3247 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3247 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3248 3248 break; 3249 3249 } … … 3261 3261 uLastLogTS = RTTimeMilliTS(); 3262 3262 } 3263 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR);3263 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR); 3264 3264 break; 3265 3265 } 3266 atapi CmdOK(s);3266 atapiR3CmdOK(s); 3267 3267 ataSetStatus(s, ATA_STAT_SEEK); /* Linux expects this. */ 3268 3268 break; … … 3307 3307 } 3308 3308 if (RT_SUCCESS(rc)) 3309 atapi CmdOK(s);3309 atapiR3CmdOK(s); 3310 3310 else 3311 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIA_LOAD_OR_EJECT_FAILED);3311 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIA_LOAD_OR_EJECT_FAILED); 3312 3312 break; 3313 3313 } … … 3315 3315 { 3316 3316 cbMax = ataBE2H_U16(pbPacket + 8); 3317 ata StartTransfer(s, RT_MIN(cbMax, 8), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MECHANISM_STATUS, true);3317 ataR3StartTransfer(s, RT_MIN(cbMax, 8), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MECHANISM_STATUS, true); 3318 3318 break; 3319 3319 } … … 3325 3325 { 3326 3326 s->cNotifiedMediaChange-- ; 3327 atapi CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */3327 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */ 3328 3328 break; 3329 3329 } 3330 3330 else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount)) 3331 3331 { 3332 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3332 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3333 3333 break; 3334 3334 } … … 3341 3341 { 3342 3342 case 0: 3343 ata StartTransfer(s, cbMax, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_NORMAL, true);3343 ataR3StartTransfer(s, cbMax, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_NORMAL, true); 3344 3344 break; 3345 3345 case 1: 3346 ata StartTransfer(s, RT_MIN(cbMax, 12), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_MULTI, true);3346 ataR3StartTransfer(s, RT_MIN(cbMax, 12), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_MULTI, true); 3347 3347 break; 3348 3348 case 2: 3349 ata StartTransfer(s, cbMax, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_RAW, true);3349 ataR3StartTransfer(s, cbMax, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_RAW, true); 3350 3350 break; 3351 3351 default: 3352 3352 error_cmd: 3353 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);3353 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET); 3354 3354 break; 3355 3355 } … … 3360 3360 { 3361 3361 s->cNotifiedMediaChange-- ; 3362 atapi CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */3362 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */ 3363 3363 break; 3364 3364 } 3365 3365 else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount)) 3366 3366 { 3367 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3367 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3368 3368 break; 3369 3369 } 3370 ata StartTransfer(s, 8, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_CAPACITY, true);3370 ataR3StartTransfer(s, 8, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_CAPACITY, true); 3371 3371 break; 3372 3372 case SCSI_READ_DISC_INFORMATION: … … 3374 3374 { 3375 3375 s->cNotifiedMediaChange-- ; 3376 atapi CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */3376 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */ 3377 3377 break; 3378 3378 } 3379 3379 else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount)) 3380 3380 { 3381 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3381 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3382 3382 break; 3383 3383 } 3384 3384 cbMax = ataBE2H_U16(pbPacket + 7); 3385 ata StartTransfer(s, RT_MIN(cbMax, 34), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DISC_INFORMATION, true);3385 ataR3StartTransfer(s, RT_MIN(cbMax, 34), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DISC_INFORMATION, true); 3386 3386 break; 3387 3387 case SCSI_READ_TRACK_INFORMATION: … … 3389 3389 { 3390 3390 s->cNotifiedMediaChange-- ; 3391 atapi CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */3391 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */ 3392 3392 break; 3393 3393 } 3394 3394 else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount)) 3395 3395 { 3396 atapi CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);3396 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT); 3397 3397 break; 3398 3398 } 3399 3399 cbMax = ataBE2H_U16(pbPacket + 7); 3400 ata StartTransfer(s, RT_MIN(cbMax, 36), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TRACK_INFORMATION, true);3400 ataR3StartTransfer(s, RT_MIN(cbMax, 36), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TRACK_INFORMATION, true); 3401 3401 break; 3402 3402 case SCSI_GET_CONFIGURATION: 3403 3403 /* No media change stuff here, it can confuse Linux guests. */ 3404 3404 cbMax = ataBE2H_U16(pbPacket + 7); 3405 ata StartTransfer(s, RT_MIN(cbMax, 80), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_CONFIGURATION, true);3405 ataR3StartTransfer(s, RT_MIN(cbMax, 80), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_CONFIGURATION, true); 3406 3406 break; 3407 3407 case SCSI_INQUIRY: 3408 3408 cbMax = ataBE2H_U16(pbPacket + 3); 3409 ata StartTransfer(s, RT_MIN(cbMax, 36), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_INQUIRY, true);3409 ataR3StartTransfer(s, RT_MIN(cbMax, 36), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_INQUIRY, true); 3410 3410 break; 3411 3411 case SCSI_READ_DVD_STRUCTURE: 3412 3412 { 3413 3413 cbMax = ataBE2H_U16(pbPacket + 8); 3414 ata StartTransfer(s, RT_MIN(cbMax, 4), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DVD_STRUCTURE, true);3414 ataR3StartTransfer(s, RT_MIN(cbMax, 4), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DVD_STRUCTURE, true); 3415 3415 break; 3416 3416 } 3417 3417 default: 3418 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);3418 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE); 3419 3419 break; 3420 3420 } … … 3425 3425 * Parse ATAPI commands, passing them directly to the CD/DVD drive. 3426 3426 */ 3427 static void atapi ParseCmdPassthrough(ATADevState *s)3427 static void atapiR3ParseCmdPassthrough(ATADevState *s) 3428 3428 { 3429 3429 const uint8_t *pbPacket; … … 3459 3459 if (ASMAtomicReadU32(&s->MediaEventStatus) != ATA_EVENT_STATUS_UNCHANGED) 3460 3460 { 3461 ata StartTransfer(s, RT_MIN(cbTransfer, 8), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true);3461 ataR3StartTransfer(s, RT_MIN(cbTransfer, 8), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true); 3462 3462 break; 3463 3463 } … … 3612 3612 if ((s->abATAPISense[2] & 0x0f) != SCSI_SENSE_NONE) 3613 3613 { 3614 ata StartTransfer(s, RT_MIN(cbTransfer, 18), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true);3614 ataR3StartTransfer(s, RT_MIN(cbTransfer, 18), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true); 3615 3615 break; 3616 3616 } … … 3694 3694 case 0x0f: /* activate deferred microcode */ 3695 3695 LogRel(("PIIX3 ATA: LUN#%d: CD-ROM passthrough command attempted to update firmware, blocked\n", s->iLUN)); 3696 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);3696 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET); 3697 3697 break; 3698 3698 default: … … 3712 3712 * opcode 0x01" in syslog) and replies with a sense code of 0, 3713 3713 * which sends cdrecord to an endless loop. */ 3714 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);3714 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE); 3715 3715 break; 3716 3716 default: 3717 3717 LogRel(("PIIX3 ATA: LUN#%d: passthrough unimplemented for command %#x\n", s->iLUN, pbPacket[0])); 3718 atapi CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);3718 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE); 3719 3719 break; 3720 3720 sendcmd: … … 3727 3727 if (cbTransfer == 0) 3728 3728 uTxDir = PDMBLOCKTXDIR_NONE; 3729 ata StartTransfer(s, cbTransfer, uTxDir, ATAFN_BT_ATAPI_PASSTHROUGH_CMD, ATAFN_SS_ATAPI_PASSTHROUGH, true);3730 } 3731 } 3732 3733 3734 static void atapi ParseCmd(ATADevState *s)3729 ataR3StartTransfer(s, cbTransfer, uTxDir, ATAFN_BT_ATAPI_PASSTHROUGH_CMD, ATAFN_SS_ATAPI_PASSTHROUGH, true); 3730 } 3731 } 3732 3733 3734 static void atapiR3ParseCmd(ATADevState *s) 3735 3735 { 3736 3736 const uint8_t *pbPacket; 3737 3737 3738 3738 pbPacket = s->aATAPICmd; 3739 # ifdef DEBUG3739 # ifdef DEBUG 3740 3740 Log(("%s: LUN#%d DMA=%d CMD=%#04x \"%s\"\n", __FUNCTION__, s->iLUN, s->fDMA, pbPacket[0], SCSICmdText(pbPacket[0]))); 3741 # else /* !DEBUG */3741 # else /* !DEBUG */ 3742 3742 Log(("%s: LUN#%d DMA=%d CMD=%#04x\n", __FUNCTION__, s->iLUN, s->fDMA, pbPacket[0])); 3743 # endif /* !DEBUG */3743 # endif /* !DEBUG */ 3744 3744 Log2(("%s: limit=%#x packet: %.*Rhxs\n", __FUNCTION__, s->uATARegLCyl | (s->uATARegHCyl << 8), ATAPI_PACKET_SIZE, pbPacket)); 3745 3745 3746 3746 if (s->fATAPIPassthrough) 3747 atapi ParseCmdPassthrough(s);3747 atapiR3ParseCmdPassthrough(s); 3748 3748 else 3749 atapi ParseCmdVirtualATAPI(s);3750 } 3751 3752 3753 static bool ata PacketSS(ATADevState *s)3749 atapiR3ParseCmdVirtualATAPI(s); 3750 } 3751 3752 3753 static bool ataR3PacketSS(ATADevState *s) 3754 3754 { 3755 3755 s->fDMA = !!(s->uATARegFeature & 1); … … 3759 3759 s->cbElementaryTransfer = 0; 3760 3760 s->cbAtapiPassthroughTransfer = 0; 3761 atapi ParseCmd(s);3761 atapiR3ParseCmd(s); 3762 3762 return false; 3763 3763 } … … 3768 3768 * from now on, regardless if there was a medium inserted or not. 3769 3769 */ 3770 static void ata MediumRemoved(ATADevState *s)3770 static void ataR3MediumRemoved(ATADevState *s) 3771 3771 { 3772 3772 ASMAtomicWriteU32(&s->MediaEventStatus, ATA_EVENT_STATUS_MEDIA_REMOVED); … … 3779 3779 * removed" event first. 3780 3780 */ 3781 static void ata MediumInserted(ATADevState *s)3781 static void ataR3MediumInserted(ATADevState *s) 3782 3782 { 3783 3783 uint32_t OldStatus, NewStatus; … … 3799 3799 } 3800 3800 3801 3801 3802 /** 3802 * Called when a media is mounted. 3803 * 3804 * @param pInterface Pointer to the interface structure containing the called function pointer. 3803 * @interface_method_impl{PDMIMOUNTNOTIFY, pfnMountNotify} 3805 3804 */ 3806 static DECLCALLBACK(void) ata MountNotify(PPDMIMOUNTNOTIFY pInterface)3805 static DECLCALLBACK(void) ataR3MountNotify(PPDMIMOUNTNOTIFY pInterface) 3807 3806 { 3808 3807 ATADevState *pIf = PDMIMOUNTNOTIFY_2_ATASTATE(pInterface); … … 3823 3822 if (pIf->cNotifiedMediaChange < 2) 3824 3823 pIf->cNotifiedMediaChange = 1; 3825 ata MediumInserted(pIf);3826 ata MediumTypeSet(pIf, ATA_MEDIA_TYPE_UNKNOWN);3824 ataR3MediumInserted(pIf); 3825 ataR3MediumTypeSet(pIf, ATA_MEDIA_TYPE_UNKNOWN); 3827 3826 } 3828 3827 3829 3828 /** 3830 * Called when a media is unmounted 3831 * @param pInterface Pointer to the interface structure containing the called function pointer. 3829 * @interface_method_impl{PDMIMOUNTNOTIFY, pfnUnmountNotify} 3832 3830 */ 3833 static DECLCALLBACK(void) ata UnmountNotify(PPDMIMOUNTNOTIFY pInterface)3831 static DECLCALLBACK(void) ataR3UnmountNotify(PPDMIMOUNTNOTIFY pInterface) 3834 3832 { 3835 3833 ATADevState *pIf = PDMIMOUNTNOTIFY_2_ATASTATE(pInterface); … … 3844 3842 */ 3845 3843 pIf->cNotifiedMediaChange = 1; 3846 ata MediumRemoved(pIf);3847 ata MediumTypeSet(pIf, ATA_MEDIA_NO_DISC);3848 } 3849 3850 static void ata PacketBT(ATADevState *s)3844 ataR3MediumRemoved(pIf); 3845 ataR3MediumTypeSet(pIf, ATA_MEDIA_NO_DISC); 3846 } 3847 3848 static void ataR3PacketBT(ATADevState *s) 3851 3849 { 3852 3850 s->cbElementaryTransfer = s->cbTotalTransfer; … … 3858 3856 3859 3857 3860 static void ataR esetDevice(ATADevState *s)3858 static void ataR3ResetDevice(ATADevState *s) 3861 3859 { 3862 3860 s->cMultSectors = ATA_MAX_MULT_SECTORS; … … 3868 3866 s->uATARegSelect = 0x20; 3869 3867 ataSetStatusValue(s, ATA_STAT_READY); 3870 ata SetSignature(s);3868 ataR3SetSignature(s); 3871 3869 s->cbTotalTransfer = 0; 3872 3870 s->cbElementaryTransfer = 0; … … 3884 3882 3885 3883 3886 static bool ata ExecuteDeviceDiagnosticSS(ATADevState *s)3887 { 3888 ata SetSignature(s);3884 static bool ataR3ExecuteDeviceDiagnosticSS(ATADevState *s) 3885 { 3886 ataR3SetSignature(s); 3889 3887 if (s->fATAPI) 3890 3888 ataSetStatusValue(s, 0); /* NOTE: READY is _not_ set */ … … 3896 3894 3897 3895 3898 static int ata TrimSectors(ATADevState *s, uint64_t u64Sector, uint32_t cSectors,3899 bool *pfRedo)3896 static int ataR3TrimSectors(ATADevState *s, uint64_t u64Sector, uint32_t cSectors, 3897 bool *pfRedo) 3900 3898 { 3901 3899 RTRANGE TrimRange; … … 3915 3913 *pfRedo = false; 3916 3914 else 3917 *pfRedo = ata IsRedoSetWarning(s, rc);3915 *pfRedo = ataR3IsRedoSetWarning(s, rc); 3918 3916 3919 3917 STAM_PROFILE_START(&pCtl->StatLockWait, a); … … 3924 3922 3925 3923 3926 static bool ata TrimSS(ATADevState *s)3924 static bool ataR3TrimSS(ATADevState *s) 3927 3925 { 3928 3926 int rc = VERR_GENERAL_FAILURE; … … 3939 3937 break; 3940 3938 3941 rc = ata TrimSectors(s, *pu64Range & ATA_RANGE_LBA_MASK,3939 rc = ataR3TrimSectors(s, *pu64Range & ATA_RANGE_LBA_MASK, 3942 3940 ATA_RANGE_LENGTH_GET(*pu64Range), &fRedo); 3943 3941 if (RT_FAILURE(rc)) … … 3950 3948 { 3951 3949 s->iSourceSink = ATAFN_SS_NULL; 3952 ata CmdOK(s, ATA_STAT_SEEK);3950 ataR3CmdOK(s, ATA_STAT_SEEK); 3953 3951 } 3954 3952 else … … 3965 3963 */ 3966 3964 if (rc != VERR_INTERRUPTED) 3967 ata CmdError(s, ID_ERR);3965 ataR3CmdError(s, ID_ERR); 3968 3966 } 3969 3967 … … 3972 3970 3973 3971 3974 static void ata ParseCmd(ATADevState *s, uint8_t cmd)3975 { 3976 # ifdef DEBUG3972 static void ataR3ParseCmd(ATADevState *s, uint8_t cmd) 3973 { 3974 # ifdef DEBUG 3977 3975 Log(("%s: LUN#%d CMD=%#04x \"%s\"\n", __FUNCTION__, s->iLUN, cmd, ATACmdText(cmd))); 3978 # else /* !DEBUG */3976 # else /* !DEBUG */ 3979 3977 Log(("%s: LUN#%d CMD=%#04x\n", __FUNCTION__, s->iLUN, cmd)); 3980 # endif /* !DEBUG */3978 # endif /* !DEBUG */ 3981 3979 s->fLBA48 = false; 3982 3980 s->fDMA = false; … … 3997 3995 case ATA_IDENTIFY_DEVICE: 3998 3996 if (s->pDrvBlock && !s->fATAPI) 3999 ata StartTransfer(s, 512, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_NULL, ATAFN_SS_IDENTIFY, false);3997 ataR3StartTransfer(s, 512, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_NULL, ATAFN_SS_IDENTIFY, false); 4000 3998 else 4001 3999 { 4002 4000 if (s->fATAPI) 4003 ata SetSignature(s);4004 ata CmdError(s, ABRT_ERR);4001 ataR3SetSignature(s); 4002 ataR3CmdError(s, ABRT_ERR); 4005 4003 ataUnsetStatus(s, ATA_STAT_READY); 4006 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4004 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4007 4005 } 4008 4006 break; … … 4012 4010 /* fall through */ 4013 4011 case ATA_INITIALIZE_DEVICE_PARAMETERS: 4014 ata CmdOK(s, ATA_STAT_SEEK);4015 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4012 ataR3CmdOK(s, ATA_STAT_SEEK); 4013 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4016 4014 break; 4017 4015 case ATA_SET_MULTIPLE_MODE: … … 4020 4018 || (s->uATARegNSector & (s->uATARegNSector - 1)) != 0)) 4021 4019 { 4022 ata CmdError(s, ABRT_ERR);4020 ataR3CmdError(s, ABRT_ERR); 4023 4021 } 4024 4022 else … … 4026 4024 Log2(("%s: set multi sector count to %d\n", __FUNCTION__, s->uATARegNSector)); 4027 4025 s->cMultSectors = s->uATARegNSector; 4028 ata CmdOK(s, 0);4026 ataR3CmdOK(s, 0); 4029 4027 } 4030 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4028 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4031 4029 break; 4032 4030 case ATA_READ_VERIFY_SECTORS_EXT: … … 4035 4033 case ATA_READ_VERIFY_SECTORS_WITHOUT_RETRIES: 4036 4034 /* do sector number check ? */ 4037 ata CmdOK(s, ATA_STAT_SEEK);4038 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4035 ataR3CmdOK(s, ATA_STAT_SEEK); 4036 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4039 4037 break; 4040 4038 case ATA_READ_SECTORS_EXT: … … 4045 4043 goto abort_cmd; 4046 4044 s->cSectorsPerIRQ = 1; 4047 ata StartTransfer(s, ataGetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);4045 ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false); 4048 4046 break; 4049 4047 case ATA_WRITE_SECTORS_EXT: … … 4054 4052 goto abort_cmd; 4055 4053 s->cSectorsPerIRQ = 1; 4056 ata StartTransfer(s, ataGetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);4054 ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false); 4057 4055 break; 4058 4056 case ATA_READ_MULTIPLE_EXT: … … 4062 4060 goto abort_cmd; 4063 4061 s->cSectorsPerIRQ = s->cMultSectors; 4064 ata StartTransfer(s, ataGetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);4062 ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false); 4065 4063 break; 4066 4064 case ATA_WRITE_MULTIPLE_EXT: … … 4070 4068 goto abort_cmd; 4071 4069 s->cSectorsPerIRQ = s->cMultSectors; 4072 ata StartTransfer(s, ataGetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);4070 ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false); 4073 4071 break; 4074 4072 case ATA_READ_DMA_EXT: … … 4080 4078 s->cSectorsPerIRQ = ATA_MAX_MULT_SECTORS; 4081 4079 s->fDMA = true; 4082 ata StartTransfer(s, ataGetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);4080 ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false); 4083 4081 break; 4084 4082 case ATA_WRITE_DMA_EXT: … … 4090 4088 s->cSectorsPerIRQ = ATA_MAX_MULT_SECTORS; 4091 4089 s->fDMA = true; 4092 ata StartTransfer(s, ataGetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);4090 ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false); 4093 4091 break; 4094 4092 case ATA_READ_NATIVE_MAX_ADDRESS_EXT: 4095 4093 s->fLBA48 = true; 4096 ata SetSector(s, s->cTotalSectors - 1);4097 ata CmdOK(s, 0);4098 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4094 ataR3SetSector(s, s->cTotalSectors - 1); 4095 ataR3CmdOK(s, 0); 4096 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4099 4097 break; 4100 4098 case ATA_SEEK: /* Used by the SCO OpenServer. Command is marked as obsolete */ 4101 ata CmdOK(s, 0);4102 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4099 ataR3CmdOK(s, 0); 4100 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4103 4101 break; 4104 4102 case ATA_READ_NATIVE_MAX_ADDRESS: 4105 ata SetSector(s, RT_MIN(s->cTotalSectors, 1 << 28) - 1);4106 ata CmdOK(s, 0);4107 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4103 ataR3SetSector(s, RT_MIN(s->cTotalSectors, 1 << 28) - 1); 4104 ataR3CmdOK(s, 0); 4105 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4108 4106 break; 4109 4107 case ATA_CHECK_POWER_MODE: 4110 4108 s->uATARegNSector = 0xff; /* drive active or idle */ 4111 ata CmdOK(s, 0);4112 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4109 ataR3CmdOK(s, 0); 4110 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4113 4111 break; 4114 4112 case ATA_SET_FEATURES: … … 4120 4118 case 0x02: /* write cache enable */ 4121 4119 Log2(("%s: write cache enable\n", __FUNCTION__)); 4122 ata CmdOK(s, ATA_STAT_SEEK);4123 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4120 ataR3CmdOK(s, ATA_STAT_SEEK); 4121 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4124 4122 break; 4125 4123 case 0xaa: /* read look-ahead enable */ 4126 4124 Log2(("%s: read look-ahead enable\n", __FUNCTION__)); 4127 ata CmdOK(s, ATA_STAT_SEEK);4128 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4125 ataR3CmdOK(s, ATA_STAT_SEEK); 4126 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4129 4127 break; 4130 4128 case 0x55: /* read look-ahead disable */ 4131 4129 Log2(("%s: read look-ahead disable\n", __FUNCTION__)); 4132 ata CmdOK(s, ATA_STAT_SEEK);4133 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4130 ataR3CmdOK(s, ATA_STAT_SEEK); 4131 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4134 4132 break; 4135 4133 case 0xcc: /* reverting to power-on defaults enable */ 4136 4134 Log2(("%s: revert to power-on defaults enable\n", __FUNCTION__)); 4137 ata CmdOK(s, ATA_STAT_SEEK);4138 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4135 ataR3CmdOK(s, ATA_STAT_SEEK); 4136 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4139 4137 break; 4140 4138 case 0x66: /* reverting to power-on defaults disable */ 4141 4139 Log2(("%s: revert to power-on defaults disable\n", __FUNCTION__)); 4142 ata CmdOK(s, ATA_STAT_SEEK);4143 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4140 ataR3CmdOK(s, ATA_STAT_SEEK); 4141 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4144 4142 break; 4145 4143 case 0x82: /* write cache disable */ … … 4147 4145 /* As per the ATA/ATAPI-6 specs, a write cache disable 4148 4146 * command MUST flush the write buffers to disc. */ 4149 ata StartTransfer(s, 0, PDMBLOCKTXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_FLUSH, false);4147 ataR3StartTransfer(s, 0, PDMBLOCKTXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_FLUSH, false); 4150 4148 break; 4151 4149 case 0x03: { /* set transfer mode */ … … 4165 4163 goto abort_cmd; 4166 4164 } 4167 ata CmdOK(s, ATA_STAT_SEEK);4168 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4165 ataR3CmdOK(s, ATA_STAT_SEEK); 4166 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4169 4167 break; 4170 4168 } … … 4184 4182 if (!s->pDrvBlock || s->fATAPI) 4185 4183 goto abort_cmd; 4186 ata StartTransfer(s, 0, PDMBLOCKTXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_FLUSH, false);4184 ataR3StartTransfer(s, 0, PDMBLOCKTXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_FLUSH, false); 4187 4185 break; 4188 4186 case ATA_STANDBY_IMMEDIATE: 4189 ata CmdOK(s, 0);4190 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4187 ataR3CmdOK(s, 0); 4188 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4191 4189 break; 4192 4190 case ATA_IDLE_IMMEDIATE: 4193 4191 LogRel(("PIIX3 ATA: LUN#%d: aborting current command\n", s->iLUN)); 4194 ata AbortCurrentCommand(s, false);4192 ataR3AbortCurrentCommand(s, false); 4195 4193 break; 4196 4194 case ATA_SLEEP: 4197 ata CmdOK(s, 0);4198 ata SetIRQ(s);4195 ataR3CmdOK(s, 0); 4196 ataR3SetIRQ(s); 4199 4197 break; 4200 4198 /* ATAPI commands */ 4201 4199 case ATA_IDENTIFY_PACKET_DEVICE: 4202 4200 if (s->fATAPI) 4203 ata StartTransfer(s, 512, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_NULL, ATAFN_SS_ATAPI_IDENTIFY, false);4201 ataR3StartTransfer(s, 512, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_NULL, ATAFN_SS_ATAPI_IDENTIFY, false); 4204 4202 else 4205 4203 { 4206 ata CmdError(s, ABRT_ERR);4207 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4204 ataR3CmdError(s, ABRT_ERR); 4205 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4208 4206 } 4209 4207 break; 4210 4208 case ATA_EXECUTE_DEVICE_DIAGNOSTIC: 4211 ata StartTransfer(s, 0, PDMBLOCKTXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_EXECUTE_DEVICE_DIAGNOSTIC, false);4209 ataR3StartTransfer(s, 0, PDMBLOCKTXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_EXECUTE_DEVICE_DIAGNOSTIC, false); 4212 4210 break; 4213 4211 case ATA_DEVICE_RESET: … … 4215 4213 goto abort_cmd; 4216 4214 LogRel(("PIIX3 ATA: LUN#%d: performing device RESET\n", s->iLUN)); 4217 ata AbortCurrentCommand(s, true);4215 ataR3AbortCurrentCommand(s, true); 4218 4216 break; 4219 4217 case ATA_PACKET: … … 4223 4221 if (s->uATARegFeature & 0x02) 4224 4222 goto abort_cmd; 4225 ata StartTransfer(s, ATAPI_PACKET_SIZE, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_PACKET, ATAFN_SS_PACKET, false);4223 ataR3StartTransfer(s, ATAPI_PACKET_SIZE, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_PACKET, ATAFN_SS_PACKET, false); 4226 4224 break; 4227 4225 case ATA_DATA_SET_MANAGEMENT: … … 4232 4230 goto abort_cmd; 4233 4231 s->fDMA = true; 4234 ata StartTransfer(s, (s->uATARegNSectorHOB << 8 | s->uATARegNSector) * s->cbSector, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_NULL, ATAFN_SS_TRIM, false);4232 ataR3StartTransfer(s, (s->uATARegNSectorHOB << 8 | s->uATARegNSector) * s->cbSector, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_NULL, ATAFN_SS_TRIM, false); 4235 4233 break; 4236 4234 default: 4237 4235 abort_cmd: 4238 ata CmdError(s, ABRT_ERR);4236 ataR3CmdError(s, ABRT_ERR); 4239 4237 if (s->fATAPI) 4240 4238 ataUnsetStatus(s, ATA_STAT_READY); 4241 ata SetIRQ(s); /* Shortcut, do not use AIO thread. */4239 ataR3SetIRQ(s); /* Shortcut, do not use AIO thread. */ 4242 4240 break; 4243 4241 } … … 4367 4365 return VINF_IOM_R3_IOPORT_WRITE; 4368 4366 #else /* IN_RING3 */ 4369 ata ParseCmd(&pCtl->aIfs[pCtl->iSelectedIf], val);4367 ataR3ParseCmd(&pCtl->aIfs[pCtl->iSelectedIf], val); 4370 4368 #endif /* !IN_RING3 */ 4371 4369 } … … 4587 4585 for (uint32_t i = 0; i < RT_ELEMENTS(pCtl->aIfs); i++) 4588 4586 { 4589 ataR esetDevice(&pCtl->aIfs[i]);4587 ataR3ResetDevice(&pCtl->aIfs[i]); 4590 4588 /* The following cannot be done using ataSetStatusValue() since the 4591 4589 * reset flag is already set, which suppresses all status changes. */ … … 4594 4592 pCtl->aIfs[i].uATARegError = 0x01; 4595 4593 } 4596 ata AsyncIOClearRequests(pCtl);4594 ataR3AsyncIOClearRequests(pCtl); 4597 4595 Log2(("%s: Ctl#%d: message to async I/O thread, resetA\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl))); 4598 4596 if (val & ATA_DEVCTL_HOB) … … 4606 4604 4607 4605 /* Issue the reset request now. */ 4608 ata AsyncIOPutRequest(pCtl, &g_ataResetARequest);4606 ataR3AsyncIOPutRequest(pCtl, &g_ataResetARequest); 4609 4607 #else /* !IN_RING3 */ 4610 4608 AssertMsgFailed(("RESET handling is too complicated for GC\n")); … … 4623 4621 Log2(("%s: ignored setting HOB\n", __FUNCTION__)); 4624 4622 } 4625 ata AsyncIOPutRequest(pCtl, &g_ataResetCRequest);4623 ataR3AsyncIOPutRequest(pCtl, &g_ataResetCRequest); 4626 4624 #else /* !IN_RING3 */ 4627 4625 AssertMsgFailed(("RESET handling is too complicated for GC\n")); … … 4667 4665 #ifdef IN_RING3 4668 4666 4669 static void ata PIOTransfer(PATACONTROLLER pCtl)4667 static void ataR3PIOTransfer(PATACONTROLLER pCtl) 4670 4668 { 4671 4669 ATADevState *s; … … 4699 4697 { 4700 4698 if (s->fATAPITransfer) 4701 ata PIOTransferLimitATAPI(s);4699 ataR3PIOTransferLimitATAPI(s); 4702 4700 4703 4701 if (s->uTxDir == PDMBLOCKTXDIR_TO_DEVICE && s->cbElementaryTransfer > s->cbTotalTransfer) … … 4708 4706 s->cbTotalTransfer, s->cbElementaryTransfer, 4709 4707 s->iIOBufferCur, s->iIOBufferEnd)); 4710 ata PIOTransferStart(s, s->iIOBufferCur, s->cbElementaryTransfer);4708 ataR3PIOTransferStart(s, s->iIOBufferCur, s->cbElementaryTransfer); 4711 4709 s->cbTotalTransfer -= s->cbElementaryTransfer; 4712 4710 s->iIOBufferCur += s->cbElementaryTransfer; … … 4716 4714 } 4717 4715 else 4718 ata PIOTransferStop(s);4719 } 4720 4721 4722 DECLINLINE(void) ata PIOTransferFinish(PATACONTROLLER pCtl, ATADevState *s)4716 ataR3PIOTransferStop(s); 4717 } 4718 4719 4720 DECLINLINE(void) ataR3PIOTransferFinish(PATACONTROLLER pCtl, ATADevState *s) 4723 4721 { 4724 4722 /* Do not interfere with RESET processing if the PIO transfer finishes … … 4741 4739 4742 4740 Log2(("%s: Ctl#%d: message to async I/O thread, continuing PIO transfer\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl))); 4743 ata AsyncIOPutRequest(pCtl, &g_ataPIORequest);4741 ataR3AsyncIOPutRequest(pCtl, &g_ataPIORequest); 4744 4742 } 4745 4743 else … … 4756 4754 /* There is more to transfer, happens usually for large ATAPI 4757 4755 * reads - the protocol limits the chunk size to 65534 bytes. */ 4758 ata PIOTransfer(pCtl);4759 ata SetIRQ(s);4756 ataR3PIOTransfer(pCtl); 4757 ataR3SetIRQ(s); 4760 4758 } 4761 4759 else … … 4763 4761 Log2(("%s: Ctl#%d: skipping message to async I/O thread, ending PIO transfer\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl))); 4764 4762 /* Finish PIO transfer. */ 4765 ata PIOTransfer(pCtl);4763 ataR3PIOTransfer(pCtl); 4766 4764 Assert(!pCtl->fRedo); 4767 4765 } … … 4794 4792 s->iIOBufferPIODataStart += cbSize; 4795 4793 if (s->iIOBufferPIODataStart >= s->iIOBufferPIODataEnd) 4796 ata PIOTransferFinish(pCtl, s);4794 ataR3PIOTransferFinish(pCtl, s); 4797 4795 #endif /* IN_RING3 */ 4798 4796 } … … 4826 4824 s->iIOBufferPIODataStart += cbSize; 4827 4825 if (s->iIOBufferPIODataStart >= s->iIOBufferPIODataEnd) 4828 ata PIOTransferFinish(pCtl, s);4826 ataR3PIOTransferFinish(pCtl, s); 4829 4827 #endif /* IN_RING3 */ 4830 4828 } … … 4840 4838 #ifdef IN_RING3 4841 4839 4842 static void ata DMATransferStop(ATADevState *s)4840 static void ataR3DMATransferStop(ATADevState *s) 4843 4841 { 4844 4842 s->cbTotalTransfer = 0; … … 4856 4854 * @param pCtl Controller for which to perform the transfer. 4857 4855 */ 4858 static void ata DMATransfer(PATACONTROLLER pCtl)4856 static void ataR3DMATransfer(PATACONTROLLER pCtl) 4859 4857 { 4860 4858 PPDMDEVINS pDevIns = CONTROLLER_2_DEVINS(pCtl); … … 5005 5003 LogRel(("PIIX3 ATA: Ctl#%d: ABORT DMA%s\n", ATACONTROLLER_IDX(pCtl), pCtl->fReset ? " due to RESET" : "")); 5006 5004 if (!pCtl->fReset) 5007 ata DMATransferStop(s);5005 ataR3DMATransferStop(s); 5008 5006 /* This forces the loop to exit immediately. */ 5009 5007 pDesc = pCtl->pLastDMADesc + 1; … … 5045 5043 5046 5044 if ( pCtl->fSignalIdle 5047 && ata AsyncIOIsIdle(pCtl, false /*fStrict*/))5045 && ataR3AsyncIOIsIdle(pCtl, false /*fStrict*/)) 5048 5046 { 5049 5047 PDMDevHlpAsyncNotificationCompleted(pCtl->pDevInsR3); … … 5107 5105 break; 5108 5106 5109 pReq = ata AsyncIOGetCurrentRequest(pCtl);5107 pReq = ataR3AsyncIOGetCurrentRequest(pCtl); 5110 5108 } 5111 5109 … … 5128 5126 { 5129 5127 /* Incorrect sequence of PIO/DMA states. Dump request queue. */ 5130 ata AsyncIODumpRequests(pCtl);5128 ataR3AsyncIODumpRequests(pCtl); 5131 5129 } 5132 5130 AssertReleaseMsg(ReqType == ATA_AIO_RESET_ASSERTED || ReqType == ATA_AIO_RESET_CLEARED || ReqType == ATA_AIO_ABORT || pCtl->uAsyncIOState == ReqType, ("I/O state inconsistent: state=%d request=%d\n", pCtl->uAsyncIOState, ReqType)); … … 5212 5210 * request. Occurs very rarely, not worth optimizing. */ 5213 5211 LogRel(("%s: Ctl#%d: redo entire operation\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl))); 5214 ata AsyncIOPutRequest(pCtl, pReq);5212 ataR3AsyncIOPutRequest(pCtl, pReq); 5215 5213 break; 5216 5214 } 5217 5215 } 5218 5216 else 5219 ata CmdOK(s, 0);5217 ataR3CmdOK(s, 0); 5220 5218 s->iIOBufferEnd = s->cbElementaryTransfer; 5221 5219 … … 5240 5238 { 5241 5239 Log2(("%s: Ctl#%d: message to async I/O thread, continuing DMA transfer immediately\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl))); 5242 ata AsyncIOPutRequest(pCtl, &g_ataDMARequest);5240 ataR3AsyncIOPutRequest(pCtl, &g_ataDMARequest); 5243 5241 } 5244 5242 } … … 5247 5245 Assert(s->uTxDir == PDMBLOCKTXDIR_NONE); /* Any transfer which has an initial transfer size of 0 must be marked as such. */ 5248 5246 /* Finish DMA transfer. */ 5249 ata DMATransferStop(s);5250 ata SetIRQ(s);5247 ataR3DMATransferStop(s); 5248 ataR3SetIRQ(s); 5251 5249 pCtl->uAsyncIOState = ATA_AIO_NEW; 5252 5250 } … … 5256 5254 if (s->cbTotalTransfer) 5257 5255 { 5258 ata PIOTransfer(pCtl);5256 ataR3PIOTransfer(pCtl); 5259 5257 Assert(!pCtl->fRedo); 5260 5258 if (s->fATAPITransfer || s->uTxDir != PDMBLOCKTXDIR_TO_DEVICE) 5261 ata SetIRQ(s);5259 ataR3SetIRQ(s); 5262 5260 5263 5261 if (s->uTxDir == PDMBLOCKTXDIR_TO_DEVICE || s->iSourceSink != ATAFN_SS_NULL) … … 5284 5282 Assert(s->uTxDir == PDMBLOCKTXDIR_NONE); /* Any transfer which has an initial transfer size of 0 must be marked as such. */ 5285 5283 /* Finish PIO transfer. */ 5286 ata PIOTransfer(pCtl);5284 ataR3PIOTransfer(pCtl); 5287 5285 Assert(!pCtl->fRedo); 5288 5286 if (!s->fATAPITransfer) 5289 ata SetIRQ(s);5287 ataR3SetIRQ(s); 5290 5288 pCtl->uAsyncIOState = ATA_AIO_NEW; 5291 5289 } … … 5311 5309 pCtl->pLastDMADesc = RT_ALIGN_32(bm->pvAddr + 1, _4K) - sizeof(BMDMADesc); 5312 5310 } 5313 ata DMATransfer(pCtl);5311 ataR3DMATransfer(pCtl); 5314 5312 5315 5313 if (RT_UNLIKELY(pCtl->fRedo && !pCtl->fReset)) 5316 5314 { 5317 5315 LogRel(("PIIX3 ATA: Ctl#%d: redo DMA operation\n", ATACONTROLLER_IDX(pCtl))); 5318 ata AsyncIOPutRequest(pCtl, &g_ataDMARequest);5316 ataR3AsyncIOPutRequest(pCtl, &g_ataDMARequest); 5319 5317 break; 5320 5318 } … … 5344 5342 s->fATAPITransfer = false; 5345 5343 } 5346 ata SetIRQ(s);5344 ataR3SetIRQ(s); 5347 5345 pCtl->uAsyncIOState = ATA_AIO_NEW; 5348 5346 break; … … 5361 5359 { 5362 5360 LogRel(("PIIX3 ATA: Ctl#%d: redo PIO operation\n", ATACONTROLLER_IDX(pCtl))); 5363 ata AsyncIOPutRequest(pCtl, &g_ataPIORequest);5361 ataR3AsyncIOPutRequest(pCtl, &g_ataPIORequest); 5364 5362 break; 5365 5363 } … … 5384 5382 if (s->cbTotalTransfer) 5385 5383 { 5386 ata PIOTransfer(pCtl);5387 ata SetIRQ(s);5384 ataR3PIOTransfer(pCtl); 5385 ataR3SetIRQ(s); 5388 5386 5389 5387 if (s->uTxDir == PDMBLOCKTXDIR_TO_DEVICE || s->iSourceSink != ATAFN_SS_NULL) … … 5409 5407 { 5410 5408 /* Finish PIO transfer. */ 5411 ata PIOTransfer(pCtl);5409 ataR3PIOTransfer(pCtl); 5412 5410 if ( !pCtl->fChainedTransfer 5413 5411 && !s->fATAPITransfer 5414 5412 && s->uTxDir != PDMBLOCKTXDIR_FROM_DEVICE) 5415 5413 { 5416 ata SetIRQ(s);5414 ataR3SetIRQ(s); 5417 5415 } 5418 5416 pCtl->uAsyncIOState = ATA_AIO_NEW; … … 5422 5420 case ATA_AIO_RESET_ASSERTED: 5423 5421 pCtl->uAsyncIOState = ATA_AIO_RESET_CLEARED; 5424 ata PIOTransferStop(&pCtl->aIfs[0]);5425 ata PIOTransferStop(&pCtl->aIfs[1]);5422 ataR3PIOTransferStop(&pCtl->aIfs[0]); 5423 ataR3PIOTransferStop(&pCtl->aIfs[1]); 5426 5424 /* Do not change the DMA registers, they are not affected by the 5427 5425 * ATA controller reset logic. It should be sufficient to issue a … … 5444 5442 else 5445 5443 ataSetStatusValue(&pCtl->aIfs[i], ATA_STAT_READY | ATA_STAT_SEEK); 5446 ata SetSignature(&pCtl->aIfs[i]);5444 ataR3SetSignature(&pCtl->aIfs[i]); 5447 5445 } 5448 5446 break; … … 5460 5458 if (pReq->u.a.fResetDrive) 5461 5459 { 5462 ataR esetDevice(s);5463 ata ExecuteDeviceDiagnosticSS(s);5460 ataR3ResetDevice(s); 5461 ataR3ExecuteDeviceDiagnosticSS(s); 5464 5462 } 5465 5463 else … … 5467 5465 /* Stop any pending DMA transfer. */ 5468 5466 s->fDMA = false; 5469 ata PIOTransferStop(s);5467 ataR3PIOTransferStop(s); 5470 5468 ataUnsetStatus(s, ATA_STAT_BUSY | ATA_STAT_DRQ | ATA_STAT_SEEK | ATA_STAT_ERR); 5471 5469 ataSetStatus(s, ATA_STAT_READY); 5472 ata SetIRQ(s);5470 ataR3SetIRQ(s); 5473 5471 } 5474 5472 break; … … 5478 5476 } 5479 5477 5480 ata AsyncIORemoveCurrentRequest(pCtl, ReqType);5481 pReq = ata AsyncIOGetCurrentRequest(pCtl);5478 ataR3AsyncIORemoveCurrentRequest(pCtl, ReqType); 5479 pReq = ataR3AsyncIOGetCurrentRequest(pCtl); 5482 5480 5483 5481 if (pCtl->uAsyncIOState == ATA_AIO_NEW && !pCtl->fChainedTransfer) … … 5596 5594 { 5597 5595 Log2(("%s: Ctl#%d: message to async I/O thread, continuing DMA transfer\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl))); 5598 ata AsyncIOPutRequest(pCtl, &g_ataDMARequest);5596 ataR3AsyncIOPutRequest(pCtl, &g_ataDMARequest); 5599 5597 } 5600 5598 #else /* !IN_RING3 */ … … 5730 5728 * @param enmType One of the PCI_ADDRESS_SPACE_* values. 5731 5729 */ 5732 static DECLCALLBACK(int) ataBMDMAIORangeMap(PPCIDEVICE pPciDev, /*unsigned*/ int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType) 5730 static DECLCALLBACK(int) ataR3BMDMAIORangeMap(PPCIDEVICE pPciDev, /*unsigned*/ int iRegion, 5731 RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType) 5733 5732 { 5734 5733 PCIATAState *pThis = PCIDEV_2_PCIATASTATE(pPciDev); … … 5742 5741 { 5743 5742 int rc2 = PDMDevHlpIOPortRegister(pPciDev->pDevIns, (RTIOPORT)GCPhysAddress + i * 8, 8, 5744 (RTHCPTR)(uintptr_t)i, ataBMDMAIOPortWrite, ataBMDMAIOPortRead, NULL, NULL, "ATA Bus Master DMA"); 5743 (RTHCPTR)(uintptr_t)i, ataBMDMAIOPortWrite, ataBMDMAIOPortRead, 5744 NULL, NULL, "ATA Bus Master DMA"); 5745 5745 AssertRC(rc2); 5746 5746 if (rc2 < rc) … … 5750 5750 { 5751 5751 rc2 = PDMDevHlpIOPortRegisterRC(pPciDev->pDevIns, (RTIOPORT)GCPhysAddress + i * 8, 8, 5752 (RTGCPTR)i, "ataBMDMAIOPortWrite", "ataBMDMAIOPortRead", NULL, NULL, "ATA Bus Master DMA"); 5752 (RTGCPTR)i, "ataBMDMAIOPortWrite", "ataBMDMAIOPortRead", 5753 NULL, NULL, "ATA Bus Master DMA"); 5753 5754 AssertRC(rc2); 5754 5755 if (rc2 < rc) … … 5758 5759 { 5759 5760 rc2 = PDMDevHlpIOPortRegisterR0(pPciDev->pDevIns, (RTIOPORT)GCPhysAddress + i * 8, 8, 5760 (RTR0PTR)i, "ataBMDMAIOPortWrite", "ataBMDMAIOPortRead", NULL, NULL, "ATA Bus Master DMA"); 5761 (RTR0PTR)i, "ataBMDMAIOPortWrite", "ataBMDMAIOPortRead", 5762 NULL, NULL, "ATA Bus Master DMA"); 5761 5763 AssertRC(rc2); 5762 5764 if (rc2 < rc) … … 5773 5775 * @interface_method_impl{PDMIBASE,pfnQueryInterface} 5774 5776 */ 5775 static DECLCALLBACK(void *) ata Status_QueryInterface(PPDMIBASE pInterface, const char *pszIID)5777 static DECLCALLBACK(void *) ataR3Status_QueryInterface(PPDMIBASE pInterface, const char *pszIID) 5776 5778 { 5777 5779 PCIATAState *pThis = PDMIBASE_2_PCIATASTATE(pInterface); … … 5792 5794 * @param ppLed Where to store the LED pointer. 5793 5795 */ 5794 static DECLCALLBACK(int) ata Status_QueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)5796 static DECLCALLBACK(int) ataR3Status_QueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed) 5795 5797 { 5796 5798 PCIATAState *pThis = PDMILEDPORTS_2_PCIATASTATE(pInterface); … … 5816 5818 * @interface_method_impl{PDMIBASE,pfnQueryInterface} 5817 5819 */ 5818 static DECLCALLBACK(void *) ataQueryInterface(PPDMIBASE pInterface, const char *pszIID)5820 static DECLCALLBACK(void *) ataR3QueryInterface(PPDMIBASE pInterface, const char *pszIID) 5819 5821 { 5820 5822 ATADevState *pIf = PDMIBASE_2_ATASTATE(pInterface); … … 5847 5849 return VINF_SUCCESS; 5848 5850 } 5851 5849 5852 #endif /* IN_RING3 */ 5850 5851 5853 5852 5854 /* -=-=-=-=-=- Wrappers -=-=-=-=-=- */ … … 5861 5863 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 5862 5864 PATACONTROLLER pCtl = &pThis->aCts[i]; 5863 int rc = VINF_SUCCESS;5864 5865 5865 5866 Assert(i < 2); 5866 5867 5867 rc = PDMCritSectEnter(&pCtl->lock, VINF_IOM_R3_IOPORT_WRITE); 5868 if (rc != VINF_SUCCESS) 5869 return rc; 5870 if (Port == pCtl->IOPortBase1) 5871 { 5872 /* Writes to the data port may be 16-bit or 32-bit. */ 5873 Assert(cb == 2 || cb == 4); 5874 rc = ataDataWrite(pCtl, Port, cb, (const uint8_t *)&u32); 5875 } 5876 else 5877 { 5878 /* Writes to the other command block ports should be 8-bit only. If they 5879 * are not, the high bits are simply discarded. Undocumented, but observed 5880 * on a real PIIX4 system. 5881 */ 5882 if (cb > 1) 5883 Log(("ataIOPortWrite1: suspect write to port %x val=%x size=%d\n", Port, u32, cb)); 5884 5885 rc = ataIOPortWriteU8(pCtl, Port, u32); 5886 } 5887 PDMCritSectLeave(&pCtl->lock); 5868 int rc = PDMCritSectEnter(&pCtl->lock, VINF_IOM_R3_IOPORT_WRITE); 5869 if (rc == VINF_SUCCESS) 5870 { 5871 if (Port == pCtl->IOPortBase1) 5872 { 5873 /* Writes to the data port may be 16-bit or 32-bit. */ 5874 Assert(cb == 2 || cb == 4); 5875 rc = ataDataWrite(pCtl, Port, cb, (const uint8_t *)&u32); 5876 } 5877 else 5878 { 5879 /* Writes to the other command block ports should be 8-bit only. If they 5880 * are not, the high bits are simply discarded. Undocumented, but observed 5881 * on a real PIIX4 system. 5882 */ 5883 if (cb > 1) 5884 Log(("ataIOPortWrite1: suspect write to port %x val=%x size=%d\n", Port, u32, cb)); 5885 5886 rc = ataIOPortWriteU8(pCtl, Port, u32); 5887 } 5888 PDMCritSectLeave(&pCtl->lock); 5889 } 5888 5890 return rc; 5889 5891 } … … 5899 5901 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 5900 5902 PATACONTROLLER pCtl = &pThis->aCts[i]; 5901 int rc = VINF_SUCCESS;5902 5903 5903 5904 Assert(i < 2); 5904 5905 5905 rc = PDMCritSectEnter(&pCtl->lock, VINF_IOM_R3_IOPORT_READ); 5906 if (rc != VINF_SUCCESS) 5907 return rc; 5908 if (Port == pCtl->IOPortBase1) 5909 { 5910 /* Reads from the data register may be 16-bit or 32-bit. */ 5911 Assert(cb == 1 || cb == 2 || cb == 4); 5912 rc = ataDataRead(pCtl, Port, cb == 1 ? 2 : cb, (uint8_t *)pu32); 5913 if (cb <= 2) 5914 *pu32 &= 0xffff >> (16 - cb * 8); 5915 } 5916 else 5917 { 5918 /* Reads from the other command block registers should be 8-bit only. 5919 * If they are not, the low byte is propagated to the high bits. 5920 * Undocumented, but observed on a real PIIX4 system. 5921 */ 5922 rc = ataIOPortReadU8(pCtl, Port, pu32); 5923 if (cb > 1) 5924 { 5925 uint32_t pad; 5926 5927 /* Replicate the 8-bit result into the upper three bytes. */ 5928 pad = *pu32 & 0xff; 5929 pad = pad | (pad << 8); 5930 pad = pad | (pad << 16); 5931 *pu32 = pad; 5932 Log(("ataIOPortRead1: suspect read from port %x size=%d\n", Port, cb)); 5933 } 5934 } 5935 PDMCritSectLeave(&pCtl->lock); 5906 int rc = PDMCritSectEnter(&pCtl->lock, VINF_IOM_R3_IOPORT_READ); 5907 if (rc == VINF_SUCCESS) 5908 { 5909 if (Port == pCtl->IOPortBase1) 5910 { 5911 /* Reads from the data register may be 16-bit or 32-bit. */ 5912 Assert(cb == 1 || cb == 2 || cb == 4); 5913 rc = ataDataRead(pCtl, Port, cb == 1 ? 2 : cb, (uint8_t *)pu32); 5914 if (cb <= 2) 5915 *pu32 &= 0xffff >> (16 - cb * 8); 5916 } 5917 else 5918 { 5919 /* Reads from the other command block registers should be 8-bit only. 5920 * If they are not, the low byte is propagated to the high bits. 5921 * Undocumented, but observed on a real PIIX4 system. 5922 */ 5923 rc = ataIOPortReadU8(pCtl, Port, pu32); 5924 if (cb > 1) 5925 { 5926 uint32_t pad; 5927 5928 /* Replicate the 8-bit result into the upper three bytes. */ 5929 pad = *pu32 & 0xff; 5930 pad = pad | (pad << 8); 5931 pad = pad | (pad << 16); 5932 *pu32 = pad; 5933 Log(("ataIOPortRead1: suspect read from port %x size=%d\n", Port, cb)); 5934 } 5935 } 5936 PDMCritSectLeave(&pCtl->lock); 5937 } 5936 5938 return rc; 5937 5939 } 5938 5940 5939 #ifndef IN_RING0 /** @todo do this in ring-0 as well. */ 5941 #ifndef IN_RING0 /** @todo do this in ring-0 as well - after IEM specific interface rewrite! */ 5942 5940 5943 /** 5941 5944 * Port I/O Handler for primary port range IN string operations. … … 5962 5965 5963 5966 cTransAvailable = (s->iIOBufferPIODataEnd - s->iIOBufferPIODataStart) / cb; 5964 # ifndef IN_RING35967 # ifndef IN_RING3 5965 5968 /* Deal with the unlikely case where no data (or not enough for the read length operation) is available; go back to ring 3. */ 5966 5969 if (!cTransAvailable) … … 5971 5974 /* The last transfer unit cannot be handled in GC, as it involves thread communication. */ 5972 5975 cTransAvailable--; 5973 # endif /* !IN_RING3 */5976 # endif /* !IN_RING3 */ 5974 5977 /* Do not handle the dummy transfer stuff here, leave it to the single-word transfers. 5975 5978 * They are not performance-critical and generally shouldn't occur at all. */ … … 5979 5982 5980 5983 rc = PGMPhysSimpleDirtyWriteGCPtr(PDMDevHlpGetVMCPU(pDevIns), GCDst, s->CTX_SUFF(pbIOBuffer) + s->iIOBufferPIODataStart, cbTransfer); 5981 # ifndef IN_RING35984 # ifndef IN_RING3 5982 5985 /* Paranoia. */ 5983 5986 if (RT_FAILURE(rc)) … … 5987 5990 return VINF_IOM_R3_IOPORT_READ; 5988 5991 } 5989 # else5992 # else 5990 5993 Assert(rc == VINF_SUCCESS); 5991 # endif5994 # endif 5992 5995 5993 5996 if (cbTransfer) … … 5996 5999 *pGCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCDst + cbTransfer); 5997 6000 *pcTransfer = cTransfer - cTransAvailable; 5998 # ifdef IN_RING36001 # ifdef IN_RING3 5999 6002 if (s->iIOBufferPIODataStart >= s->iIOBufferPIODataEnd) 6000 ata PIOTransferFinish(pCtl, s);6001 # endif /* IN_RING3 */6003 ataR3PIOTransferFinish(pCtl, s); 6004 # endif /* IN_RING3 */ 6002 6005 } 6003 6006 PDMCritSectLeave(&pCtl->lock); … … 6024 6027 if (Port == pCtl->IOPortBase1) 6025 6028 { 6026 uint32_t cTransAvailable, cTransfer = *pcTransfer, cbTransfer; 6029 uint32_t cTransfer = *pcTransfer; 6030 uint32_t cbTransfer; 6027 6031 RTGCPTR GCSrc = *pGCPtrSrc; 6028 6032 ATADevState *s = &pCtl->aIfs[pCtl->iSelectedIf]; 6029 6033 Assert(cb == 2 || cb == 4); 6030 6034 6031 cTransAvailable = (s->iIOBufferPIODataEnd - s->iIOBufferPIODataStart) / cb;6032 # ifndef IN_RING36035 uint32_t cTransAvailable = (s->iIOBufferPIODataEnd - s->iIOBufferPIODataStart) / cb; 6036 # ifndef IN_RING3 6033 6037 /* Deal with the unlikely case where no data (or not enough for the read length operation) is available; go back to ring 3. */ 6034 6038 if (!cTransAvailable) … … 6039 6043 /* The last transfer unit cannot be handled in GC, as it involves thread communication. */ 6040 6044 cTransAvailable--; 6041 # endif /* !IN_RING3 */6045 # endif /* !IN_RING3 */ 6042 6046 /* Do not handle the dummy transfer stuff here, leave it to the single-word transfers. 6043 6047 * They are not performance-critical and generally shouldn't occur at all. */ … … 6047 6051 6048 6052 rc = PGMPhysSimpleReadGCPtr(PDMDevHlpGetVMCPU(pDevIns), s->CTX_SUFF(pbIOBuffer) + s->iIOBufferPIODataStart, GCSrc, cbTransfer); 6049 # ifndef IN_RING36053 # ifndef IN_RING3 6050 6054 /* Paranoia. */ 6051 6055 if (RT_FAILURE(rc)) … … 6055 6059 return VINF_IOM_R3_IOPORT_WRITE; 6056 6060 } 6057 # else6061 # else 6058 6062 Assert(rc == VINF_SUCCESS); 6059 # endif6063 # endif 6060 6064 6061 6065 if (cbTransfer) … … 6064 6068 *pGCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCSrc + cbTransfer); 6065 6069 *pcTransfer = cTransfer - cTransAvailable; 6066 # ifdef IN_RING36070 # ifdef IN_RING3 6067 6071 if (s->iIOBufferPIODataStart >= s->iIOBufferPIODataEnd) 6068 ata PIOTransferFinish(pCtl, s);6069 # endif /* IN_RING3 */6072 ataR3PIOTransferFinish(pCtl, s); 6073 # endif /* IN_RING3 */ 6070 6074 } 6071 6075 PDMCritSectLeave(&pCtl->lock); 6072 6076 return rc; 6073 6077 } 6078 6074 6079 #endif /* !IN_RING0 */ 6075 6080 … … 6087 6092 Assert(i < 2); 6088 6093 6089 if (cb != 1) 6090 return VINF_SUCCESS; 6091 rc = PDMCritSectEnter(&pCtl->lock, VINF_IOM_R3_IOPORT_WRITE); 6092 if (rc != VINF_SUCCESS) 6093 return rc; 6094 rc = ataControlWrite(pCtl, Port, u32); 6095 PDMCritSectLeave(&pCtl->lock); 6094 if (cb == 1) 6095 { 6096 rc = PDMCritSectEnter(&pCtl->lock, VINF_IOM_R3_IOPORT_WRITE); 6097 if (rc == VINF_SUCCESS) 6098 { 6099 rc = ataControlWrite(pCtl, Port, u32); 6100 PDMCritSectLeave(&pCtl->lock); 6101 } 6102 } 6103 else 6104 rc = VINF_SUCCESS; 6096 6105 return rc; 6097 6106 } … … 6111 6120 Assert(i < 2); 6112 6121 6113 if (cb != 1) 6114 return VERR_IOM_IOPORT_UNUSED; 6115 6116 rc = PDMCritSectEnter(&pCtl->lock, VINF_IOM_R3_IOPORT_READ); 6117 if (rc != VINF_SUCCESS) 6118 return rc; 6119 *pu32 = ataStatusRead(pCtl, Port); 6120 PDMCritSectLeave(&pCtl->lock); 6121 return VINF_SUCCESS; 6122 if (cb == 1) 6123 { 6124 rc = PDMCritSectEnter(&pCtl->lock, VINF_IOM_R3_IOPORT_READ); 6125 if (rc == VINF_SUCCESS) 6126 { 6127 *pu32 = ataStatusRead(pCtl, Port); 6128 PDMCritSectLeave(&pCtl->lock); 6129 } 6130 } 6131 else 6132 rc = VERR_IOM_IOPORT_UNUSED; 6133 return rc; 6122 6134 } 6123 6135 … … 6125 6137 6126 6138 6127 DECLINLINE(void) ataR elocBuffer(PPDMDEVINS pDevIns, ATADevState *s)6139 DECLINLINE(void) ataR3RelocBuffer(PPDMDEVINS pDevIns, ATADevState *s) 6128 6140 { 6129 6141 if (s->pbIOBufferR3) … … 6173 6185 * In case there was a medium inserted. 6174 6186 */ 6175 ata MediumRemoved(pIf);6187 ataR3MediumRemoved(pIf); 6176 6188 } 6177 6189 … … 6184 6196 * @param pIf The ATA unit state. 6185 6197 */ 6186 static int ata ConfigLun(PPDMDEVINS pDevIns, ATADevState *pIf)6198 static int ataR3ConfigLun(PPDMDEVINS pDevIns, ATADevState *pIf) 6187 6199 { 6188 6200 int rc = VINF_SUCCESS; … … 6362 6374 if (RT_SUCCESS(rc)) 6363 6375 { 6364 rc = ata ConfigLun(pDevIns, pIf);6376 rc = ataR3ConfigLun(pDevIns, pIf); 6365 6377 /* 6366 6378 * In case there is a medium inserted. 6367 6379 */ 6368 ata MediumInserted(pIf);6369 ata MediumTypeSet(pIf, ATA_MEDIA_TYPE_UNKNOWN);6380 ataR3MediumInserted(pIf); 6381 ataR3MediumTypeSet(pIf, ATA_MEDIA_TYPE_UNKNOWN); 6370 6382 } 6371 6383 else … … 6419 6431 if (pThis->aCts[i].AsyncIOThread != NIL_RTTHREAD) 6420 6432 { 6421 bool fRc = ata AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/);6433 bool fRc = ataR3AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/); 6422 6434 if (!fRc) 6423 6435 { … … 6427 6439 PDMCritSectLeave(&pThis->aCts[i].AsyncIORequestLock); 6428 6440 6429 fRc = ata AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/);6441 fRc = ataR3AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/); 6430 6442 if (!fRc) 6431 6443 { … … 6450 6462 * @param pSSM SSM operation handle. 6451 6463 */ 6452 static DECLCALLBACK(int) ata SaveLoadPrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)6464 static DECLCALLBACK(int) ataR3SaveLoadPrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 6453 6465 { 6454 6466 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); … … 6456 6468 /* sanity - the suspend notification will wait on the async stuff. */ 6457 6469 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 6458 AssertLogRelMsgReturn(ata AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/),6470 AssertLogRelMsgReturn(ataR3AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/), 6459 6471 ("i=%u\n", i), 6460 6472 VERR_SSM_IDE_ASYNC_TIMEOUT); … … 6465 6477 * @copydoc FNSSMDEVLIVEEXEC 6466 6478 */ 6467 static DECLCALLBACK(int) ata LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)6479 static DECLCALLBACK(int) ataR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass) 6468 6480 { 6469 6481 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); … … 6488 6500 * @copydoc FNSSMDEVSAVEEXEC 6489 6501 */ 6490 static DECLCALLBACK(int) ata SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)6502 static DECLCALLBACK(int) ataR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 6491 6503 { 6492 6504 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 6493 6505 6494 ata LiveExec(pDevIns, pSSM, SSM_PASS_FINAL);6506 ataR3LiveExec(pDevIns, pSSM, SSM_PASS_FINAL); 6495 6507 6496 6508 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) … … 6569 6581 * Converts the LUN number into a message string. 6570 6582 */ 6571 static const char *ata StringifyLun(unsigned iLun)6583 static const char *ataR3StringifyLun(unsigned iLun) 6572 6584 { 6573 6585 switch (iLun) … … 6584 6596 * FNSSMDEVLOADEXEC 6585 6597 */ 6586 static DECLCALLBACK(int) ata LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)6598 static DECLCALLBACK(int) ataR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass) 6587 6599 { 6588 6600 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); … … 6629 6641 return SSMR3SetCfgError(pSSM, RT_SRC_POS, 6630 6642 N_("The %s VM is missing a %s device. Please make sure the source and target VMs have compatible storage configurations"), 6631 fInUse ? "target" : "source", ata StringifyLun(pIf->iLUN) );6643 fInUse ? "target" : "source", ataR3StringifyLun(pIf->iLUN) ); 6632 6644 6633 6645 char szSerialNumber[ATA_SERIAL_NUMBER_LENGTH+1]; … … 6663 6675 { 6664 6676 /* integrity check */ 6665 if (!ata AsyncIOIsIdle(&pThis->aCts[i], false))6677 if (!ataR3AsyncIOIsIdle(&pThis->aCts[i], false)) 6666 6678 { 6667 6679 AssertMsgFailed(("Async I/O for controller %d is active\n", i)); … … 6856 6868 PDMCritSectEnter(&pThis->aCts[i].lock, VERR_INTERNAL_ERROR); 6857 6869 for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++) 6858 ataR esetDevice(&pThis->aCts[i].aIfs[j]);6870 ataR3ResetDevice(&pThis->aCts[i].aIfs[j]); 6859 6871 PDMCritSectLeave(&pThis->aCts[i].lock); 6860 6872 } … … 6891 6903 pThis->aCts[i].fRedo = false; 6892 6904 pThis->aCts[i].fRedoIdle = false; 6893 ata AsyncIOClearRequests(&pThis->aCts[i]);6905 ataR3AsyncIOClearRequests(&pThis->aCts[i]); 6894 6906 Log2(("%s: Ctl#%d: message to async I/O thread, reset controller\n", __FUNCTION__, i)); 6895 ata AsyncIOPutRequest(&pThis->aCts[i], &g_ataResetARequest);6896 ata AsyncIOPutRequest(&pThis->aCts[i], &g_ataResetCRequest);6907 ataR3AsyncIOPutRequest(&pThis->aCts[i], &g_ataResetARequest); 6908 ataR3AsyncIOPutRequest(&pThis->aCts[i], &g_ataResetCRequest); 6897 6909 6898 6910 PDMCritSectLeave(&pThis->aCts[i].lock); … … 6932 6944 AssertRC(rc); 6933 6945 6934 if (!ata AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/))6946 if (!ataR3AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/)) 6935 6947 { 6936 6948 rc = RTThreadUserWait(pThis->aCts[i].AsyncIOThread, 30*1000 /*ms*/); … … 6977 6989 pThis->aCts[i].aIfs[0].pDevInsRC += offDelta; 6978 6990 pThis->aCts[i].aIfs[0].pControllerRC += offDelta; 6979 ataR elocBuffer(pDevIns, &pThis->aCts[i].aIfs[0]);6991 ataR3RelocBuffer(pDevIns, &pThis->aCts[i].aIfs[0]); 6980 6992 pThis->aCts[i].aIfs[1].pDevInsRC += offDelta; 6981 6993 pThis->aCts[i].aIfs[1].pControllerRC += offDelta; 6982 ataR elocBuffer(pDevIns, &pThis->aCts[i].aIfs[1]);6994 ataR3RelocBuffer(pDevIns, &pThis->aCts[i].aIfs[1]); 6983 6995 } 6984 6996 } … … 7082 7094 * @param penmChipset Where to store the chipset type. 7083 7095 */ 7084 static int ata ControllerFromCfg(PPDMDEVINS pDevIns, PCFGMNODE pCfg, CHIPSET *penmChipset)7096 static int ataR3ControllerFromCfg(PPDMDEVINS pDevIns, PCFGMNODE pCfg, CHIPSET *penmChipset) 7085 7097 { 7086 7098 char szType[20]; … … 7109 7121 * @interface_method_impl{PDMDEVREG,pfnConstruct} 7110 7122 */ 7111 static DECLCALLBACK(int) 7123 static DECLCALLBACK(int) ataR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg) 7112 7124 { 7113 7125 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); … … 7163 7175 7164 7176 CHIPSET enmChipset = CHIPSET_PIIX3; 7165 rc = ata ControllerFromCfg(pDevIns, pCfg, &enmChipset);7177 rc = ataR3ControllerFromCfg(pDevIns, pCfg, &enmChipset); 7166 7178 if (RT_FAILURE(rc)) 7167 7179 return rc; … … 7172 7184 */ 7173 7185 /* Status LUN. */ 7174 pThis->IBase.pfnQueryInterface = ata Status_QueryInterface;7175 pThis->ILeds.pfnQueryStatusLed = ata Status_QueryStatusLed;7186 pThis->IBase.pfnQueryInterface = ataR3Status_QueryInterface; 7187 pThis->ILeds.pfnQueryStatusLed = ataR3Status_QueryStatusLed; 7176 7188 7177 7189 /* PCI configuration space. */ … … 7243 7255 pIf->pControllerR0 = MMHyperR3ToR0(PDMDevHlpGetVM(pDevIns), &pThis->aCts[i]); 7244 7256 pIf->pControllerRC = MMHyperR3ToRC(PDMDevHlpGetVM(pDevIns), &pThis->aCts[i]); 7245 pIf->IBase.pfnQueryInterface = ata QueryInterface;7246 pIf->IMountNotify.pfnMountNotify = ata MountNotify;7247 pIf->IMountNotify.pfnUnmountNotify = ata UnmountNotify;7257 pIf->IBase.pfnQueryInterface = ataR3QueryInterface; 7258 pIf->IMountNotify.pfnMountNotify = ataR3MountNotify; 7259 pIf->IMountNotify.pfnUnmountNotify = ataR3UnmountNotify; 7248 7260 pIf->IPort.pfnQueryDeviceLocation = ataR3QueryDeviceLocation; 7249 7261 pIf->Led.u32Magic = PDMLED_MAGIC; … … 7275 7287 N_("PIIX3 cannot register PCI device")); 7276 7288 //AssertMsg(pThis->dev.devfn == 9 || iInstance != 0, ("pThis->dev.devfn=%d\n", pThis->dev.devfn)); 7277 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 4, 0x10, PCI_ADDRESS_SPACE_IO, ata BMDMAIORangeMap);7289 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 4, 0x10, PCI_ADDRESS_SPACE_IO, ataR3BMDMAIORangeMap); 7278 7290 if (RT_FAILURE(rc)) 7279 7291 return PDMDEV_SET_ERROR(pDevIns, rc, … … 7421 7433 AssertLogRelRCReturn(rc, rc); 7422 7434 7423 ata AsyncIOClearRequests(pCtl);7435 ataR3AsyncIOClearRequests(pCtl); 7424 7436 rc = RTThreadCreateF(&pCtl->AsyncIOThread, ataR3AsyncIOThread, (void *)pCtl, 128*1024 /*cbStack*/, 7425 7437 RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "ATA-%u", i); … … 7446 7458 if (RT_SUCCESS(rc)) 7447 7459 { 7448 rc = ata ConfigLun(pDevIns, pIf);7460 rc = ataR3ConfigLun(pDevIns, pIf); 7449 7461 if (RT_SUCCESS(rc)) 7450 7462 { … … 7588 7600 7589 7601 rc = PDMDevHlpSSMRegisterEx(pDevIns, ATA_SAVED_STATE_VERSION, sizeof(*pThis) + cbTotalBuffer, NULL, 7590 NULL, ata LiveExec, NULL,7591 ata SaveLoadPrep, ataSaveExec, NULL,7592 ata SaveLoadPrep, ataLoadExec, NULL);7602 NULL, ataR3LiveExec, NULL, 7603 ataR3SaveLoadPrep, ataR3SaveExec, NULL, 7604 ataR3SaveLoadPrep, ataR3LoadExec, NULL); 7593 7605 if (RT_FAILURE(rc)) 7594 7606 return PDMDEV_SET_ERROR(pDevIns, rc, N_("PIIX3 cannot register save state handlers"));
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