Changeset 56727 in vbox for trunk/src/VBox/Devices
- Timestamp:
- Jul 1, 2015 9:17:59 AM (10 years ago)
- Location:
- trunk/src/VBox/Devices/Audio
- Files:
-
- 3 edited
-
DevIchHda.cpp (modified) (2 diffs)
-
DevIchHdaCodec.cpp (modified) (14 diffs)
-
DevIchHdaCodec.h (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/Audio/DevIchHda.cpp
r56692 r56727 3300 3300 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 3301 3301 3302 if (pThis->pCodec->pfn CodecDbgListNodes)3303 pThis->pCodec->pfn CodecDbgListNodes(pThis->pCodec, pHlp, pszArgs);3302 if (pThis->pCodec->pfnDbgListNodes) 3303 pThis->pCodec->pfnDbgListNodes(pThis->pCodec, pHlp, pszArgs); 3304 3304 else 3305 3305 pHlp->pfnPrintf(pHlp, "Codec implementation doesn't provide corresponding callback\n"); … … 3314 3314 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 3315 3315 3316 if (pThis->pCodec->pfn CodecDbgSelector)3317 pThis->pCodec->pfn CodecDbgSelector(pThis->pCodec, pHlp, pszArgs);3316 if (pThis->pCodec->pfnDbgSelector) 3317 pThis->pCodec->pfnDbgSelector(pThis->pCodec, pHlp, pszArgs); 3318 3318 else 3319 3319 pHlp->pfnPrintf(pHlp, "Codec implementation doesn't provide corresponding callback\n"); -
trunk/src/VBox/Devices/Audio/DevIchHdaCodec.cpp
r56689 r56727 43 43 /* PRM 5.3.1 */ 44 44 /** Codec address mask. */ 45 #define CODEC_CAD_MASK 0xF000000045 #define CODEC_CAD_MASK 0xF0000000 46 46 /** Codec address shift. */ 47 #define CODEC_CAD_SHIFT 2848 #define CODEC_DIRECT_MASK RT_BIT(27)47 #define CODEC_CAD_SHIFT 28 48 #define CODEC_DIRECT_MASK RT_BIT(27) 49 49 /** Node ID mask. */ 50 #define CODEC_NID_MASK 0x07F0000050 #define CODEC_NID_MASK 0x07F00000 51 51 /** Node ID shift. */ 52 #define CODEC_NID_SHIFT 2053 #define CODEC_VERBDATA_MASK 0x000FFFFF54 #define CODEC_VERB_4BIT_CMD 0x000FFFF055 #define CODEC_VERB_4BIT_DATA 0x0000000F56 #define CODEC_VERB_8BIT_CMD 0x000FFF0057 #define CODEC_VERB_8BIT_DATA 0x000000FF58 #define CODEC_VERB_16BIT_CMD 0x000F000059 #define CODEC_VERB_16BIT_DATA 0x0000FFFF60 61 #define CODEC_CAD(cmd) (((cmd) & CODEC_CAD_MASK) >> CODEC_CAD_SHIFT)62 #define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK)63 #define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT)64 #define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK)65 #define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x))66 #define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4))67 #define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8))68 #define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16))69 #define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA)70 #define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA)71 #define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA)72 73 #define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15)74 #define CODEC_VERB_GET_AMP_SIDE RT_BIT(13)75 #define CODEC_VERB_GET_AMP_INDEX 0x752 #define CODEC_NID_SHIFT 20 53 #define CODEC_VERBDATA_MASK 0x000FFFFF 54 #define CODEC_VERB_4BIT_CMD 0x000FFFF0 55 #define CODEC_VERB_4BIT_DATA 0x0000000F 56 #define CODEC_VERB_8BIT_CMD 0x000FFF00 57 #define CODEC_VERB_8BIT_DATA 0x000000FF 58 #define CODEC_VERB_16BIT_CMD 0x000F0000 59 #define CODEC_VERB_16BIT_DATA 0x0000FFFF 60 61 #define CODEC_CAD(cmd) (((cmd) & CODEC_CAD_MASK) >> CODEC_CAD_SHIFT) 62 #define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK) 63 #define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT) 64 #define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK) 65 #define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x)) 66 #define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4)) 67 #define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8)) 68 #define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16)) 69 #define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA) 70 #define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA) 71 #define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA) 72 73 #define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15) 74 #define CODEC_VERB_GET_AMP_SIDE RT_BIT(13) 75 #define CODEC_VERB_GET_AMP_INDEX 0x7 76 76 77 77 /* HDA spec 7.3.3.7 NoteA */ 78 #define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15)79 #define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13)80 #define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX))78 #define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15) 79 #define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13) 80 #define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX)) 81 81 82 82 /* HDA spec 7.3.3.7 NoteC */ 83 #define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15) 84 #define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14) 85 #define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13) 86 #define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12) 87 #define CODEC_VERB_SET_AMP_INDEX (0x7 << 8) 88 89 #define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0) 90 #define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0) 91 #define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0) 92 #define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0) 93 #define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7) 83 #define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15) 84 #define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14) 85 #define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13) 86 #define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12) 87 #define CODEC_VERB_SET_AMP_INDEX (0x7 << 8) 88 #define CODEC_VERB_SET_AMP_MUTE RT_BIT(7) 89 /** Note: 7-bit value [6:0]. */ 90 #define CODEC_VERB_SET_AMP_GAIN 0x7F 91 92 #define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0) 93 #define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0) 94 #define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0) 95 #define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0) 96 #define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7) 97 #define CODEC_SET_AMP_MUTE(cmd) ((cmd) & CODEC_VERB_SET_AMP_MUTE) 98 #define CODEC_SET_AMP_GAIN(cmd) ((cmd) & CODEC_VERB_SET_AMP_GAIN) 94 99 95 100 /* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */ 96 101 /* VendorID (7.3.4.1) */ 97 #define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID))98 #define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF)99 #define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF)102 #define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID)) 103 #define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF) 104 #define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF) 100 105 /* RevisionID (7.3.4.2)*/ 101 106 #define CODEC_MAKE_F00_02(MajRev, MinRev, RevisionID, SteppingID) (((MajRev) << 20)|((MinRev) << 16)|((RevisionID) << 8)|(SteppingID)) 102 107 /* Subordinate node count (7.3.4.3)*/ 103 108 #define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF)) 104 #define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF)105 #define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF)109 #define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF) 110 #define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF) 106 111 /* 107 112 * Function Group Type (7.3.4.4) … … 109 114 * [0x80 - 0xff] are vendor defined function groups 110 115 */ 111 #define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType))112 #define CODEC_F00_05_UNSOL RT_BIT(8)113 #define CODEC_F00_05_AFG (0x1)114 #define CODEC_F00_05_MFG (0x2)115 #define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8))116 #define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff)116 #define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType)) 117 #define CODEC_F00_05_UNSOL RT_BIT(8) 118 #define CODEC_F00_05_AFG (0x1) 119 #define CODEC_F00_05_MFG (0x2) 120 #define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8)) 121 #define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff) 117 122 /* Audio Function Group capabilities (7.3.4.5) */ 118 123 #define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((((BeepGen) & 0x1) << 16)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF)) 119 #define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16)124 #define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16) 120 125 121 126 /* Widget Capabilities (7.3.4.6) */ … … 125 130 | (((chanel_count) & 0xF) << 13)) 126 131 /* note: types 0x8-0xe are reserved */ 127 #define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0)128 #define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1)129 #define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2)130 #define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3)131 #define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4)132 #define CODEC_F00_09_TYPE_POWER_WIDGET (0x5)133 #define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6)134 #define CODEC_F00_09_TYPE_BEEP_GEN (0x7)135 #define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF)136 137 #define CODEC_F00_09_CAP_CP RT_BIT(12)138 #define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11)139 #define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10)140 #define CODEC_F00_09_CAP_DIGITAL RT_BIT(9)141 #define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8)142 #define CODEC_F00_09_CAP_UNSOL RT_BIT(7)143 #define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6)144 #define CODEC_F00_09_CAP_STRIPE RT_BIT(5)145 #define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4)146 #define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3)147 #define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2)148 #define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1)149 #define CODEC_F00_09_CAP_LSB RT_BIT(0)150 151 #define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF)152 153 #define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12))154 #define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11))155 #define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10))156 #define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9))157 #define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8))158 #define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7))159 #define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6))160 #define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5))161 #define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4))162 #define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3))163 #define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2))164 #define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1))165 #define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0))132 #define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0) 133 #define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1) 134 #define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2) 135 #define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3) 136 #define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4) 137 #define CODEC_F00_09_TYPE_POWER_WIDGET (0x5) 138 #define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6) 139 #define CODEC_F00_09_TYPE_BEEP_GEN (0x7) 140 #define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF) 141 142 #define CODEC_F00_09_CAP_CP RT_BIT(12) 143 #define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11) 144 #define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10) 145 #define CODEC_F00_09_CAP_DIGITAL RT_BIT(9) 146 #define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8) 147 #define CODEC_F00_09_CAP_UNSOL RT_BIT(7) 148 #define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6) 149 #define CODEC_F00_09_CAP_STRIPE RT_BIT(5) 150 #define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4) 151 #define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3) 152 #define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2) 153 #define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1) 154 #define CODEC_F00_09_CAP_LSB RT_BIT(0) 155 156 #define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF) 157 158 #define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12)) 159 #define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11)) 160 #define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10)) 161 #define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9)) 162 #define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8)) 163 #define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7)) 164 #define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6)) 165 #define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5)) 166 #define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4)) 167 #define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3)) 168 #define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2)) 169 #define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1)) 170 #define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0)) 166 171 167 172 /* Supported PCM size, rates (7.3.4.7) */ 168 #define CODEC_F00_0A_32_BIT RT_BIT(19)169 #define CODEC_F00_0A_24_BIT RT_BIT(18)170 #define CODEC_F00_0A_16_BIT RT_BIT(17)171 #define CODEC_F00_0A_8_BIT RT_BIT(16)172 173 #define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11)174 #define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10)175 #define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9)176 #define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8)177 #define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7)178 #define CODEC_F00_0A_48KHZ RT_BIT(6)179 #define CODEC_F00_0A_44_1KHZ RT_BIT(5)173 #define CODEC_F00_0A_32_BIT RT_BIT(19) 174 #define CODEC_F00_0A_24_BIT RT_BIT(18) 175 #define CODEC_F00_0A_16_BIT RT_BIT(17) 176 #define CODEC_F00_0A_8_BIT RT_BIT(16) 177 178 #define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11) 179 #define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10) 180 #define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9) 181 #define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8) 182 #define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7) 183 #define CODEC_F00_0A_48KHZ RT_BIT(6) 184 #define CODEC_F00_0A_44_1KHZ RT_BIT(5) 180 185 /* 2/3 * 48kHz */ 181 #define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4)186 #define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4) 182 187 /* 1/2 * 44.1kHz */ 183 #define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3)188 #define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3) 184 189 /* 1/3 * 48kHz */ 185 #define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2)190 #define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2) 186 191 /* 1/4 * 44.1kHz */ 187 #define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1)192 #define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1) 188 193 /* 1/6 * 48kHz */ 189 #define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0)194 #define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0) 190 195 191 196 /* Supported streams formats (7.3.4.8) */ 192 #define CODEC_F00_0B_AC3 RT_BIT(2)193 #define CODEC_F00_0B_FLOAT32 RT_BIT(1)194 #define CODEC_F00_0B_PCM RT_BIT(0)197 #define CODEC_F00_0B_AC3 RT_BIT(2) 198 #define CODEC_F00_0B_FLOAT32 RT_BIT(1) 199 #define CODEC_F00_0B_PCM RT_BIT(0) 195 200 196 201 /* Pin Capabilities (7.3.4.9)*/ 197 202 #define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8) 198 #define CODEC_F00_0C_CAP_HBR RT_BIT(27)199 #define CODEC_F00_0C_CAP_DP RT_BIT(24)200 #define CODEC_F00_0C_CAP_EAPD RT_BIT(16)201 #define CODEC_F00_0C_CAP_HDMI RT_BIT(7)202 #define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6)203 #define CODEC_F00_0C_CAP_INPUT RT_BIT(5)204 #define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4)205 #define CODEC_F00_0C_CAP_HP RT_BIT(3)206 #define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2)207 #define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1)208 #define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0)203 #define CODEC_F00_0C_CAP_HBR RT_BIT(27) 204 #define CODEC_F00_0C_CAP_DP RT_BIT(24) 205 #define CODEC_F00_0C_CAP_EAPD RT_BIT(16) 206 #define CODEC_F00_0C_CAP_HDMI RT_BIT(7) 207 #define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6) 208 #define CODEC_F00_0C_CAP_INPUT RT_BIT(5) 209 #define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4) 210 #define CODEC_F00_0C_CAP_HP RT_BIT(3) 211 #define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2) 212 #define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1) 213 #define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0) 209 214 210 215 #define CODEC_F00_0C_IS_CAP_HBR(f00_0c) ((f00_0c) & RT_BIT(27)) … … 227 232 | ((offset) & 0xFF)) 228 233 234 #define CODEC_F00_0D_CAP_MUTE RT_BIT(7) 235 236 #define CODEC_F00_0D_IS_CAP_MUTE(f00_0d) ( ( f00_0d) & RT_BIT(31)) 237 #define CODEC_F00_0D_STEP_SIZE(f00_0d) ((( f00_0d) & (0x7F << 16)) >> 16) 238 #define CODEC_F00_0D_NUM_STEPS(f00_0d) ((((f00_0d) & (0x7F << 8)) >> 8) + 1) 239 #define CODEC_F00_0D_OFFSET(f00_0d) ( (f00_0d) & 0x7F) 240 229 241 /* Output Amplifier capabilities (7.3.4.10) */ 230 #define CODEC_MAKE_F00_12 CODEC_MAKE_F00_0D 242 #define CODEC_MAKE_F00_12 CODEC_MAKE_F00_0D 243 244 #define CODEC_F00_12_IS_CAP_MUTE(f00_12) CODEC_F00_0D_IS_CAP_MUTE(f00_12) 245 #define CODEC_F00_12_STEP_SIZE(f00_12) CODEC_F00_0D_STEP_SIZE(f00_12) 246 #define CODEC_F00_12_NUM_STEPS(f00_12) CODEC_F00_0D_NUM_STEPS(f00_12) 247 #define CODEC_F00_12_OFFSET(f00_12) CODEC_F00_0D_OFFSET(f00_12) 231 248 232 249 /* Connection list lenght (7.3.4.11) */ … … 234 251 ( (((long_form) & 0x1) << 7) \ 235 252 | ((length) & 0x7F)) 236 #define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7)) 237 #define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F) 253 /* Indicates short-form NIDs. */ 254 #define CODEC_F00_0E_LIST_NID_SHORT 0 255 /* Indicates long-form NIDs. */ 256 #define CODEC_F00_0E_LIST_NID_LONG 1 257 #define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7)) 258 #define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F) 238 259 /* Supported Power States (7.3.4.12) */ 239 #define CODEC_F00_0F_EPSS RT_BIT(31)240 #define CODEC_F00_0F_CLKSTOP RT_BIT(30)241 #define CODEC_F00_0F_S3D3 RT_BIT(29)242 #define CODEC_F00_0F_D3COLD RT_BIT(4)243 #define CODEC_F00_0F_D3 RT_BIT(3)244 #define CODEC_F00_0F_D2 RT_BIT(2)245 #define CODEC_F00_0F_D1 RT_BIT(1)246 #define CODEC_F00_0F_D0 RT_BIT(0)260 #define CODEC_F00_0F_EPSS RT_BIT(31) 261 #define CODEC_F00_0F_CLKSTOP RT_BIT(30) 262 #define CODEC_F00_0F_S3D3 RT_BIT(29) 263 #define CODEC_F00_0F_D3COLD RT_BIT(4) 264 #define CODEC_F00_0F_D3 RT_BIT(3) 265 #define CODEC_F00_0F_D2 RT_BIT(2) 266 #define CODEC_F00_0F_D1 RT_BIT(1) 267 #define CODEC_F00_0F_D0 RT_BIT(0) 247 268 248 269 /* Processing capabilities 7.3.4.13 */ 249 #define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1))250 #define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8)251 #define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1)270 #define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1)) 271 #define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8) 272 #define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1) 252 273 253 274 /* CP/IO Count (7.3.4.14) */ … … 260 281 261 282 /* Processing States (7.3.3.4) */ 262 #define CODEC_F03_OFF (0)263 #define CODEC_F03_ON RT_BIT(0)264 #define CODEC_F03_BENING RT_BIT(1)283 #define CODEC_F03_OFF (0) 284 #define CODEC_F03_ON RT_BIT(0) 285 #define CODEC_F03_BENING RT_BIT(1) 265 286 /* Power States (7.3.3.10) */ 266 287 #define CODEC_MAKE_F05(reset, stopok, error, act, set) \ … … 270 291 | (((act) & 0x7) << 4) \ 271 292 | ((set) & 0x7)) 272 #define CODEC_F05_D3COLD (4)273 #define CODEC_F05_D3 (3)274 #define CODEC_F05_D2 (2)275 #define CODEC_F05_D1 (1)276 #define CODEC_F05_D0 (0)277 278 #define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0)279 #define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0)280 #define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0)281 #define CODEC_F05_ACT(value) (((value) & 0x7) >> 4)282 #define CODEC_F05_SET(value) (((value) & 0x7))283 284 #define CODEC_F05_GE(p0, p1) ((p0) <= (p1))285 #define CODEC_F05_LE(p0, p1) ((p0) >= (p1))293 #define CODEC_F05_D3COLD (4) 294 #define CODEC_F05_D3 (3) 295 #define CODEC_F05_D2 (2) 296 #define CODEC_F05_D1 (1) 297 #define CODEC_F05_D0 (0) 298 299 #define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0) 300 #define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0) 301 #define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0) 302 #define CODEC_F05_ACT(value) (((value) & 0x7) >> 4) 303 #define CODEC_F05_SET(value) (((value) & 0x7)) 304 305 #define CODEC_F05_GE(p0, p1) ((p0) <= (p1)) 306 #define CODEC_F05_LE(p0, p1) ((p0) >= (p1)) 286 307 287 308 /* Pin Widged Control (7.3.3.13) */ 288 #define CODEC_F07_VREF_HIZ (0)289 #define CODEC_F07_VREF_50 (0x1)290 #define CODEC_F07_VREF_GROUND (0x2)291 #define CODEC_F07_VREF_80 (0x4)292 #define CODEC_F07_VREF_100 (0x5)293 #define CODEC_F07_IN_ENABLE RT_BIT(5)294 #define CODEC_F07_OUT_ENABLE RT_BIT(6)295 #define CODEC_F07_OUT_H_ENABLE RT_BIT(7)309 #define CODEC_F07_VREF_HIZ (0) 310 #define CODEC_F07_VREF_50 (0x1) 311 #define CODEC_F07_VREF_GROUND (0x2) 312 #define CODEC_F07_VREF_80 (0x4) 313 #define CODEC_F07_VREF_100 (0x5) 314 #define CODEC_F07_IN_ENABLE RT_BIT(5) 315 #define CODEC_F07_OUT_ENABLE RT_BIT(6) 316 #define CODEC_F07_OUT_H_ENABLE RT_BIT(7) 296 317 297 318 /* Unsolicited enabled (7.3.3.14) */ … … 307 328 | ((chan) & 0xF)) 308 329 309 #define CODEC_A_MULT_1X (0) 310 #define CODEC_A_MULT_2X (1) 311 #define CODEC_A_MULT_3X (2) 312 #define CODEC_A_MULT_4X (3) 313 314 #define CODEC_A_DIV_1X (0) 315 #define CODEC_A_DIV_2X (1) 316 #define CODEC_A_DIV_3X (2) 317 #define CODEC_A_DIV_4X (3) 318 #define CODEC_A_DIV_5X (4) 319 #define CODEC_A_DIV_6X (5) 320 #define CODEC_A_DIV_7X (6) 321 #define CODEC_A_DIV_8X (7) 322 323 #define CODEC_A_8_BIT (0) 324 #define CODEC_A_16_BIT (1) 325 #define CODEC_A_20_BIT (2) 326 #define CODEC_A_24_BIT (3) 327 #define CODEC_A_32_BIT (4) 330 #define CODEC_A_TYPE RT_BIT(15) 331 #define CODEC_A_TYPE_PCM (0) 332 #define CODEC_A_TYPE_NON_PCM (1) 333 334 #define CODEC_A_BASE RT_BIT(14) 335 #define CODEC_A_BASE_48KHZ (0) 336 #define CODEC_A_BASE_44KHZ (1) 337 338 #define CODEC_A_MULT_1X (0) 339 #define CODEC_A_MULT_2X (1) 340 #define CODEC_A_MULT_3X (2) 341 #define CODEC_A_MULT_4X (3) 342 343 #define CODEC_A_DIV_1X (0) 344 #define CODEC_A_DIV_2X (1) 345 #define CODEC_A_DIV_3X (2) 346 #define CODEC_A_DIV_4X (3) 347 #define CODEC_A_DIV_5X (4) 348 #define CODEC_A_DIV_6X (5) 349 #define CODEC_A_DIV_7X (6) 350 #define CODEC_A_DIV_8X (7) 351 352 #define CODEC_A_8_BIT (0) 353 #define CODEC_A_16_BIT (1) 354 #define CODEC_A_20_BIT (2) 355 #define CODEC_A_24_BIT (3) 356 #define CODEC_A_32_BIT (4) 357 358 #define CODEC_A_CHAN_MONO (0) 359 #define CODEC_A_CHAN_STEREO (1) 328 360 329 361 /* Pin Sense (7.3.3.15) */ … … 337 369 338 370 #define CODEC_MAKE_F0C(lrswap, eapd, btl) ((((lrswap) & 1) << 2) | (((eapd) & 1) << 1) | ((btl) & 1)) 339 #define CODEC_FOC_IS_LRSWAP(f0c) RT_BOOL((f0c) & RT_BIT(2))340 #define CODEC_FOC_IS_EAPD(f0c) RT_BOOL((f0c) & RT_BIT(1))341 #define CODEC_FOC_IS_BTL(f0c) RT_BOOL((f0c) & RT_BIT(0))371 #define CODEC_FOC_IS_LRSWAP(f0c) RT_BOOL((f0c) & RT_BIT(2)) 372 #define CODEC_FOC_IS_EAPD(f0c) RT_BOOL((f0c) & RT_BIT(1)) 373 #define CODEC_FOC_IS_BTL(f0c) RT_BOOL((f0c) & RT_BIT(0)) 342 374 /* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */ 343 375 /* Configuration's port connection */ 344 #define CODEC_F1C_PORT_MASK (0x3) 345 #define CODEC_F1C_PORT_SHIFT (30) 346 347 #define CODEC_F1C_PORT_COMPLEX (0x0) 348 #define CODEC_F1C_PORT_NO_PHYS (0x1) 349 #define CODEC_F1C_PORT_FIXED (0x2) 350 #define CODEC_F1C_BOTH (0x3) 351 352 /* Configuration's location */ 353 #define CODEC_F1C_LOCATION_MASK (0x3F) 354 #define CODEC_F1C_LOCATION_SHIFT (24) 376 #define CODEC_F1C_PORT_MASK (0x3) 377 #define CODEC_F1C_PORT_SHIFT (30) 378 379 #define CODEC_F1C_PORT_COMPLEX (0x0) 380 #define CODEC_F1C_PORT_NO_PHYS (0x1) 381 #define CODEC_F1C_PORT_FIXED (0x2) 382 #define CODEC_F1C_BOTH (0x3) 383 384 /* Configuration default: connection */ 385 #define CODEC_F1C_PORT_MASK (0x3) 386 #define CODEC_F1C_PORT_SHIFT (30) 387 388 /* Connected to a jack (1/8", ATAPI, ...). */ 389 #define CODEC_F1C_PORT_COMPLEX (0x0) 390 /* No physical connection. */ 391 #define CODEC_F1C_PORT_NO_PHYS (0x1) 392 /* Fixed function device (integrated speaker, integrated mic, ...). */ 393 #define CODEC_F1C_PORT_FIXED (0x2) 394 /* Both, a jack and an internal device are attached. */ 395 #define CODEC_F1C_BOTH (0x3) 396 397 /* Configuration default: Location */ 398 #define CODEC_F1C_LOCATION_MASK (0x3F) 399 #define CODEC_F1C_LOCATION_SHIFT (24) 400 355 401 /* [4:5] bits of location region means chassis attachment */ 356 #define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0)357 #define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4)358 #define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5)359 #define CODEC_F1C_LOCATION_OTHER (RT_BIT(5))402 #define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0) 403 #define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4) 404 #define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5) 405 #define CODEC_F1C_LOCATION_OTHER RT_BIT(5) 360 406 361 407 /* [0:3] bits of location region means geometry location attachment */ 362 #define CODEC_F1C_LOCATION_NA (0)363 #define CODEC_F1C_LOCATION_REAR (0x1)364 #define CODEC_F1C_LOCATION_FRONT (0x2)365 #define CODEC_F1C_LOCATION_LEFT (0x3)366 #define CODEC_F1C_LOCATION_RIGTH (0x4)367 #define CODEC_F1C_LOCATION_TOP (0x5)368 #define CODEC_F1C_LOCATION_BOTTOM (0x6)369 #define CODEC_F1C_LOCATION_SPECIAL_0 (0x7)370 #define CODEC_F1C_LOCATION_SPECIAL_1 (0x8)371 #define CODEC_F1C_LOCATION_SPECIAL_2 (0x9)372 373 /* Configuration 's devices*/374 #define CODEC_F1C_DEVICE_MASK (0xF)375 #define CODEC_F1C_DEVICE_SHIFT (20)376 #define CODEC_F1C_DEVICE_LINE_OUT (0)377 #define CODEC_F1C_DEVICE_SPEAKER (0x1)378 #define CODEC_F1C_DEVICE_HP (0x2)379 #define CODEC_F1C_DEVICE_CD (0x3)380 #define CODEC_F1C_DEVICE_SPDIF_OUT (0x4)381 #define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5)382 #define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6)383 #define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7)384 #define CODEC_F1C_DEVICE_LINE_IN (0x8)385 #define CODEC_F1C_DEVICE_AUX (0x9)386 #define CODEC_F1C_DEVICE_MIC (0xA)387 #define CODEC_F1C_DEVICE_PHONE (0xB)388 #define CODEC_F1C_DEVICE_SPDIF_IN (0xC)389 #define CODEC_F1C_DEVICE_RESERVED (0xE)390 #define CODEC_F1C_DEVICE_OTHER (0xF)391 392 /* Configuration 'sConnection type */393 #define CODEC_F1C_CONNECTION_TYPE_MASK (0xF)394 #define CODEC_F1C_CONNECTION_TYPE_SHIFT (16)395 396 #define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0)397 #define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1)398 #define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2)399 #define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3)400 #define CODEC_F1C_CONNECTION_TYPE_RCA (0x4)401 #define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5)402 #define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6)403 #define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7)404 #define CODEC_F1C_CONNECTION_TYPE_DIN (0x8)405 #define CODEC_F1C_CONNECTION_TYPE_XLR (0x9)406 #define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA)407 #define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB)408 #define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF)408 #define CODEC_F1C_LOCATION_NA (0) 409 #define CODEC_F1C_LOCATION_REAR (0x1) 410 #define CODEC_F1C_LOCATION_FRONT (0x2) 411 #define CODEC_F1C_LOCATION_LEFT (0x3) 412 #define CODEC_F1C_LOCATION_RIGTH (0x4) 413 #define CODEC_F1C_LOCATION_TOP (0x5) 414 #define CODEC_F1C_LOCATION_BOTTOM (0x6) 415 #define CODEC_F1C_LOCATION_SPECIAL_0 (0x7) 416 #define CODEC_F1C_LOCATION_SPECIAL_1 (0x8) 417 #define CODEC_F1C_LOCATION_SPECIAL_2 (0x9) 418 419 /* Configuration default: Device type */ 420 #define CODEC_F1C_DEVICE_MASK (0xF) 421 #define CODEC_F1C_DEVICE_SHIFT (20) 422 #define CODEC_F1C_DEVICE_LINE_OUT (0) 423 #define CODEC_F1C_DEVICE_SPEAKER (0x1) 424 #define CODEC_F1C_DEVICE_HP (0x2) 425 #define CODEC_F1C_DEVICE_CD (0x3) 426 #define CODEC_F1C_DEVICE_SPDIF_OUT (0x4) 427 #define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5) 428 #define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6) 429 #define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7) 430 #define CODEC_F1C_DEVICE_LINE_IN (0x8) 431 #define CODEC_F1C_DEVICE_AUX (0x9) 432 #define CODEC_F1C_DEVICE_MIC (0xA) 433 #define CODEC_F1C_DEVICE_PHONE (0xB) 434 #define CODEC_F1C_DEVICE_SPDIF_IN (0xC) 435 #define CODEC_F1C_DEVICE_RESERVED (0xE) 436 #define CODEC_F1C_DEVICE_OTHER (0xF) 437 438 /* Configuration default: Connection type */ 439 #define CODEC_F1C_CONNECTION_TYPE_MASK (0xF) 440 #define CODEC_F1C_CONNECTION_TYPE_SHIFT (16) 441 442 #define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0) 443 #define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1) 444 #define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2) 445 #define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3) 446 #define CODEC_F1C_CONNECTION_TYPE_RCA (0x4) 447 #define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5) 448 #define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6) 449 #define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7) 450 #define CODEC_F1C_CONNECTION_TYPE_DIN (0x8) 451 #define CODEC_F1C_CONNECTION_TYPE_XLR (0x9) 452 #define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA) 453 #define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB) 454 #define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF) 409 455 410 456 /* Configuration's color */ 411 #define CODEC_F1C_COLOR_MASK (0xF)412 #define CODEC_F1C_COLOR_SHIFT (12)413 #define CODEC_F1C_COLOR_UNKNOWN (0)414 #define CODEC_F1C_COLOR_BLACK (0x1)415 #define CODEC_F1C_COLOR_GREY (0x2)416 #define CODEC_F1C_COLOR_BLUE (0x3)417 #define CODEC_F1C_COLOR_GREEN (0x4)418 #define CODEC_F1C_COLOR_RED (0x5)419 #define CODEC_F1C_COLOR_ORANGE (0x6)420 #define CODEC_F1C_COLOR_YELLOW (0x7)421 #define CODEC_F1C_COLOR_PURPLE (0x8)422 #define CODEC_F1C_COLOR_PINK (0x9)423 #define CODEC_F1C_COLOR_RESERVED_0 (0xA)424 #define CODEC_F1C_COLOR_RESERVED_1 (0xB)425 #define CODEC_F1C_COLOR_RESERVED_2 (0xC)426 #define CODEC_F1C_COLOR_RESERVED_3 (0xD)427 #define CODEC_F1C_COLOR_WHITE (0xE)428 #define CODEC_F1C_COLOR_OTHER (0xF)457 #define CODEC_F1C_COLOR_MASK (0xF) 458 #define CODEC_F1C_COLOR_SHIFT (12) 459 #define CODEC_F1C_COLOR_UNKNOWN (0) 460 #define CODEC_F1C_COLOR_BLACK (0x1) 461 #define CODEC_F1C_COLOR_GREY (0x2) 462 #define CODEC_F1C_COLOR_BLUE (0x3) 463 #define CODEC_F1C_COLOR_GREEN (0x4) 464 #define CODEC_F1C_COLOR_RED (0x5) 465 #define CODEC_F1C_COLOR_ORANGE (0x6) 466 #define CODEC_F1C_COLOR_YELLOW (0x7) 467 #define CODEC_F1C_COLOR_PURPLE (0x8) 468 #define CODEC_F1C_COLOR_PINK (0x9) 469 #define CODEC_F1C_COLOR_RESERVED_0 (0xA) 470 #define CODEC_F1C_COLOR_RESERVED_1 (0xB) 471 #define CODEC_F1C_COLOR_RESERVED_2 (0xC) 472 #define CODEC_F1C_COLOR_RESERVED_3 (0xD) 473 #define CODEC_F1C_COLOR_WHITE (0xE) 474 #define CODEC_F1C_COLOR_OTHER (0xF) 429 475 430 476 /* Configuration's misc */ 431 #define CODEC_F1C_MISC_MASK (0xF) 432 #define CODEC_F1C_MISC_SHIFT (8) 433 #define CODEC_F1C_MISC_JACK_DETECT (0) 434 #define CODEC_F1C_MISC_RESERVED_0 (1) 435 #define CODEC_F1C_MISC_RESERVED_1 (2) 436 #define CODEC_F1C_MISC_RESERVED_2 (3) 437 438 /* Configuration's association */ 439 #define CODEC_F1C_ASSOCIATION_MASK (0xF) 440 #define CODEC_F1C_ASSOCIATION_SHIFT (4) 441 /* Connection's sequence */ 442 #define CODEC_F1C_SEQ_MASK (0xF) 443 #define CODEC_F1C_SEQ_SHIFT (0) 477 #define CODEC_F1C_MISC_MASK (0xF) 478 #define CODEC_F1C_MISC_SHIFT (8) 479 #define CODEC_F1C_MISC_JACK_DETECT (0) 480 #define CODEC_F1C_MISC_RESERVED_0 (1) 481 #define CODEC_F1C_MISC_RESERVED_1 (2) 482 #define CODEC_F1C_MISC_RESERVED_2 (3) 483 484 /* Configuration default: Association */ 485 #define CODEC_F1C_ASSOCIATION_MASK (0xF) 486 #define CODEC_F1C_ASSOCIATION_SHIFT (4) 487 488 /* Reserved; don't use. */ 489 #define CODEC_F1C_ASSOCIATION_INVALID 0x0 490 #define CODEC_F1C_ASSOCIATION_GROUP_0 0x1 491 #define CODEC_F1C_ASSOCIATION_GROUP_1 0x2 492 #define CODEC_F1C_ASSOCIATION_GROUP_2 0x3 493 #define CODEC_F1C_ASSOCIATION_GROUP_3 0x4 494 #define CODEC_F1C_ASSOCIATION_GROUP_4 0x5 495 #define CODEC_F1C_ASSOCIATION_GROUP_5 0x6 496 #define CODEC_F1C_ASSOCIATION_GROUP_6 0x7 497 #define CODEC_F1C_ASSOCIATION_GROUP_7 0x8 498 #define CODEC_F1C_ASSOCIATION_GROUP_15 0xF 499 500 /* Configuration default: Association Sequence */ 501 #define CODEC_F1C_SEQ_MASK (0xF) 502 #define CODEC_F1C_SEQ_SHIFT (0) 444 503 445 504 /* Implementation identification (7.3.3.30) */ … … 701 760 * Global Variables * 702 761 *******************************************************************************/ 762 /* STAC9220 - Nodes IDs / names. */ 763 #define STAC9220_NID_ROOT 0x0 /* Root node */ 764 #define STAC9220_NID_AFG 0x1 /* Audio Configuration Group */ 765 #define STAC9220_NID_DAC0 0x2 /* Out */ 766 #define STAC9220_NID_DAC1 0x3 /* Out */ 767 #define STAC9220_NID_DAC2 0x4 /* Out */ 768 #define STAC9220_NID_DAC3 0x5 /* Out */ 769 #define STAC9220_NID_ADC0 0x6 /* In */ 770 #define STAC9220_NID_ADC1 0x7 /* In */ 771 #define STAC9220_NID_SPDIF_OUT 0x8 /* Out */ 772 #define STAC9220_NID_SPDIF_IN 0x9 /* In */ 773 #define STAC9220_NID_PIN_HEADPHONE0 0xA /* In, Out */ 774 #define STAC9220_NID_PIN_B 0xB /* In, Out */ 775 #define STAC9220_NID_PIN_C 0xC /* In, Out */ 776 #define STAC9220_NID_PIN_HEADPHONE1 0xD /* In, Out */ 777 #define STAC9220_NID_PIN_E 0xE /* In */ 778 #define STAC9220_NID_PIN_F 0xF /* In, Out */ 779 #define STAC9220_NID_PIN_SPDIF_OUT 0x10 /* Out */ 780 #define STAC9220_NID_PIN_SPDIF_IN 0x11 /* In */ 781 #define STAC9220_NID_ADC0_MUX 0x12 /* In */ 782 #define STAC9220_NID_ADC1_MUX 0x13 /* In */ 783 #define STAC9220_NID_PCBEEP 0x14 /* Out */ 784 #define STAC9220_NID_PIN_CD 0x15 /* In */ 785 #define STAC9220_NID_VOL_KNOB 0x16 786 #define STAC9220_NID_AMP_ADC0 0x17 /* In */ 787 #define STAC9220_NID_AMP_ADC1 0x18 /* In */ 788 /* STAC9221. */ 789 #define STAC9221_NID_ADAT_OUT 0x19 /* Out */ 790 #define STAC9221_NID_I2S_OUT 0x1A /* Out */ 791 #define STAC9221_NID_PIN_I2S_OUT 0x1B /* Out */ 792 793 #if 1 703 794 /* STAC9220 - Referenced thru STAC9220WIDGET in the constructor below. */ 704 795 static uint8_t const g_abStac9220Ports[] = { 0x0A, 0xB, 0xC, 0xD, 0xE, 0xF, 0}; … … 715 806 static uint8_t const g_abStac9220VolKnobs[] = { 0x16, 0 }; 716 807 static uint8_t const g_abStac9220Reserveds[] = { 0x09, 0x19, 0x1a, 0x1b, 0 }; 717 808 #else /** @todo Enable this after 5.0 -- needs more testing first. */ 809 static uint8_t const g_abStac9220Ports[] = { STAC9220_NID_PIN_HEADPHONE0, STAC9220_NID_PIN_B, STAC9220_NID_PIN_C, STAC9220_NID_PIN_HEADPHONE1, STAC9220_NID_PIN_E, STAC9220_NID_PIN_F, 0}; 810 static uint8_t const g_abStac9220Dacs[] = { STAC9220_NID_DAC0, STAC9220_NID_DAC1, STAC9220_NID_DAC2, STAC9220_NID_DAC3, 0}; 811 static uint8_t const g_abStac9220Adcs[] = { STAC9220_NID_ADC0, STAC9220_NID_ADC1, 0}; 812 static uint8_t const g_abStac9220SpdifOuts[] = { STAC9220_NID_SPDIF_OUT, 0 }; 813 static uint8_t const g_abStac9220SpdifIns[] = { STAC9220_NID_SPDIF_IN, 0 }; 814 static uint8_t const g_abStac9220DigOutPins[] = { STAC9220_NID_PIN_SPDIF_OUT, 0 }; 815 static uint8_t const g_abStac9220DigInPins[] = { STAC9220_NID_PIN_SPDIF_IN, 0 }; 816 static uint8_t const g_abStac9220AdcVols[] = { STAC9220_NID_AMP_ADC0, STAC9220_NID_AMP_ADC1, 0}; 817 static uint8_t const g_abStac9220AdcMuxs[] = { STAC9220_NID_ADC0_MUX, STAC9220_NID_ADC1_MUX, 0}; 818 static uint8_t const g_abStac9220Pcbeeps[] = { STAC9220_NID_PCBEEP, 0 }; 819 static uint8_t const g_abStac9220Cds[] = { STAC9220_NID_PIN_CD, 0 }; 820 static uint8_t const g_abStac9220VolKnobs[] = { STAC9220_NID_VOL_KNOB, 0 }; 821 /* STAC 9221. */ 822 /** @todo Is STAC9220_NID_SPDIF_IN really correct for reserved nodes? */ 823 +static uint8_t const g_abStac9220Reserveds[] = { STAC9220_NID_SPDIF_IN, STAC9221_NID_ADAT_OUT, STAC9221_NID_I2S_OUT, STAC9221_NID_PIN_I2S_OUT, 0 }; 824 #endif 718 825 719 826 /** SSM description of a CODECNODE. */ … … 1103 1210 unconst(pThis->cTotalNodes) = 0x1C; 1104 1211 pThis->pfnCodecNodeReset = stac9220ResetNode; 1105 pThis->pfn CodecDbgListNodes= stac9220DbgNodes;1212 pThis->pfnDbgListNodes = stac9220DbgNodes; 1106 1213 pThis->u16VendorId = 0x8384; 1107 1214 pThis->u16DeviceId = 0x7680; … … 2230 2337 }; 2231 2338 2339 #ifdef DEBUG 2340 typedef struct CODECDBGINFO 2341 { 2342 /** DBGF info helpers. */ 2343 PCDBGFINFOHLP pHlp; 2344 /** Current recursion level. */ 2345 uint8_t uLevel; 2346 /** Pointer to codec state. */ 2347 PHDACODEC pThis; 2348 2349 } CODECDBGINFO, *PCODECDBGINFO; 2350 2351 #define CODECDBG_INDENT pInfo->uLevel++; 2352 #define CODECDBG_UNINDENT if (pInfo->uLevel) pInfo->uLevel--; 2353 2354 #define CODECDBG_PRINT(x, ...) pInfo->pHlp->pfnPrintf(pInfo->pHlp, x); 2355 #define CODECDBG_PRINTI(x, ...) codecDbgPrintf(pInfo, x); 2356 2357 static void codecDbgPrintfIndentV(PCODECDBGINFO pInfo, uint16_t uIndent, const char *pszFormat, va_list va) 2358 { 2359 char *pszValueFormat; 2360 if (RTStrAPrintfV(&pszValueFormat, pszFormat, va)) 2361 { 2362 pInfo->pHlp->pfnPrintf(pInfo->pHlp, "%*s%s", uIndent, "", pszValueFormat); 2363 RTStrFree(pszValueFormat); 2364 } 2365 } 2366 2367 static void codecDbgPrintf(PCODECDBGINFO pInfo, const char *pszFormat, ...) 2368 { 2369 va_list va; 2370 va_start(va, pszFormat); 2371 codecDbgPrintfIndentV(pInfo, pInfo->uLevel * 4, pszFormat, va); 2372 va_end(va); 2373 } 2374 2375 /* Power state */ 2376 static void codecDbgPrintNodeRegF05(PCODECDBGINFO pInfo, uint32_t u32Reg) 2377 { 2378 codecDbgPrintf(pInfo, "Power (F05): fReset=%RTbool, fStopOk=%RTbool, Set=%RU8, Act=%RU8\n", 2379 CODEC_F05_IS_RESET(u32Reg), CODEC_F05_IS_STOPOK(u32Reg), CODEC_F05_SET(u32Reg), CODEC_F05_ACT(u32Reg)); 2380 } 2381 2382 static void codecDbgPrintNodeRegA(PCODECDBGINFO pInfo, uint32_t u32Reg) 2383 { 2384 codecDbgPrintf(pInfo, "RegA: %x\n", u32Reg); 2385 } 2386 2387 static void codecDbgPrintNodeRegF00(PCODECDBGINFO pInfo, uint32_t *paReg00) 2388 { 2389 codecDbgPrintf(pInfo, "Parameters (F00):\n"); 2390 2391 CODECDBG_INDENT 2392 codecDbgPrintf(pInfo, "Amplifier Caps:\n"); 2393 uint32_t uReg = paReg00[0xD]; 2394 CODECDBG_INDENT 2395 codecDbgPrintf(pInfo, "Input Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n", 2396 CODEC_F00_0D_NUM_STEPS(uReg), 2397 CODEC_F00_0D_STEP_SIZE(uReg), 2398 CODEC_F00_0D_OFFSET(uReg), 2399 RT_BOOL(CODEC_F00_0D_IS_CAP_MUTE(uReg))); 2400 2401 uReg = paReg00[0x12]; 2402 codecDbgPrintf(pInfo, "Output Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n", 2403 CODEC_F00_12_NUM_STEPS(uReg), 2404 CODEC_F00_12_STEP_SIZE(uReg), 2405 CODEC_F00_12_OFFSET(uReg), 2406 RT_BOOL(CODEC_F00_0D_IS_CAP_MUTE(uReg))); 2407 CODECDBG_UNINDENT 2408 CODECDBG_UNINDENT 2409 } 2410 2411 static void codecDbgPrintNodeAmp(PCODECDBGINFO pInfo, uint32_t *paReg, uint8_t uIdx, uint8_t uDir) 2412 { 2413 #define CODECDBG_AMP(reg, chan) \ 2414 codecDbgPrintf(pInfo, "Amp %RU8 %s %s: In=%RTbool, Out=%RTbool, Left=%RTbool, Right=%RTbool, Idx=%RU8, fMute=%RTbool, uGain=%RU8\n", \ 2415 uIdx, chan, uDir == AMPLIFIER_IN ? "In" : "Out", \ 2416 RT_BOOL(CODEC_SET_AMP_IS_IN_DIRECTION(reg)), RT_BOOL(CODEC_SET_AMP_IS_OUT_DIRECTION(reg)), \ 2417 RT_BOOL(CODEC_SET_AMP_IS_LEFT_SIDE(reg)), RT_BOOL(CODEC_SET_AMP_IS_RIGHT_SIDE(reg)), \ 2418 CODEC_SET_AMP_INDEX(reg), RT_BOOL(CODEC_SET_AMP_MUTE(reg)), CODEC_SET_AMP_GAIN(reg)); 2419 2420 uint32_t regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_LEFT, uIdx); 2421 CODECDBG_AMP(regAmp, "Left"); 2422 regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_RIGHT, uIdx); 2423 CODECDBG_AMP(regAmp, "Right"); 2424 2425 #undef CODECDBG_AMP 2426 } 2427 2428 static void codecDbgPrintNodeConnections(PCODECDBGINFO pInfo, PCODECNODE pNode) 2429 { 2430 if (pNode->node.au32F00_param[0xE] == 0) /* Directly connected to HDA link. */ 2431 { 2432 codecDbgPrintf(pInfo, "[HDA LINK]\n"); 2433 return; 2434 } 2435 } 2436 2437 static void codecDbgPrintNode(PCODECDBGINFO pInfo, PCODECNODE pNode) 2438 { 2439 codecDbgPrintf(pInfo, "Node 0x%02x (%02RU8): ", pNode->node.id, pNode->node.id); 2440 2441 if (pNode->node.id == STAC9220_NID_ROOT) 2442 { 2443 CODECDBG_PRINT("ROOT\n") 2444 } 2445 else if (pNode->node.id == STAC9220_NID_AFG) 2446 { 2447 CODECDBG_PRINT("AFG\n") 2448 CODECDBG_INDENT 2449 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param); 2450 codecDbgPrintNodeRegF05(pInfo, pNode->afg.u32F05_param); 2451 CODECDBG_UNINDENT 2452 } 2453 else if (hdaCodecIsPortNode(pInfo->pThis, pNode->node.id)) 2454 { 2455 CODECDBG_PRINT("PORT\n") 2456 } 2457 else if (hdaCodecIsDacNode(pInfo->pThis, pNode->node.id)) 2458 { 2459 CODECDBG_PRINT("DAC\n") 2460 CODECDBG_INDENT 2461 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param); 2462 codecDbgPrintNodeRegF05(pInfo, pNode->dac.u32F05_param); 2463 codecDbgPrintNodeRegA (pInfo, pNode->dac.u32A_param); 2464 codecDbgPrintNodeAmp (pInfo, pNode->dac.B_params, 0, AMPLIFIER_OUT); 2465 CODECDBG_UNINDENT 2466 } 2467 else if (hdaCodecIsAdcVolNode(pInfo->pThis, pNode->node.id)) 2468 { 2469 CODECDBG_PRINT("ADC VOLUME\n") 2470 CODECDBG_INDENT 2471 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param); 2472 codecDbgPrintNodeRegA (pInfo, pNode->adcvol.u32A_params); 2473 codecDbgPrintNodeAmp (pInfo, pNode->adcvol.B_params, 0, AMPLIFIER_IN); 2474 CODECDBG_UNINDENT 2475 } 2476 else if (hdaCodecIsAdcNode(pInfo->pThis, pNode->node.id)) 2477 { 2478 CODECDBG_PRINT("ADC\n") 2479 CODECDBG_INDENT 2480 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param); 2481 codecDbgPrintNodeRegF05(pInfo, pNode->adc.u32F05_param); 2482 codecDbgPrintNodeRegA (pInfo, pNode->adc.u32A_param); 2483 codecDbgPrintNodeAmp (pInfo, pNode->adc.B_params, 0, AMPLIFIER_IN); 2484 CODECDBG_UNINDENT 2485 } 2486 else if (hdaCodecIsAdcMuxNode(pInfo->pThis, pNode->node.id)) 2487 { 2488 CODECDBG_PRINT("ADC MUX\n") 2489 CODECDBG_INDENT 2490 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param); 2491 codecDbgPrintNodeRegA (pInfo, pNode->adcmux.u32A_param); 2492 codecDbgPrintNodeAmp (pInfo, pNode->adcmux.B_params, 0, AMPLIFIER_IN); 2493 CODECDBG_UNINDENT 2494 } 2495 else if (hdaCodecIsPcbeepNode(pInfo->pThis, pNode->node.id)) 2496 { 2497 CODECDBG_PRINT("PC BEEP\n") 2498 } 2499 else if (hdaCodecIsSpdifOutNode(pInfo->pThis, pNode->node.id)) 2500 { 2501 CODECDBG_PRINT("SPDIF OUT\n") 2502 } 2503 else if (hdaCodecIsSpdifInNode(pInfo->pThis, pNode->node.id)) 2504 { 2505 CODECDBG_PRINT("SPDIF IN\n") 2506 } 2507 else if (hdaCodecIsDigInPinNode(pInfo->pThis, pNode->node.id)) 2508 { 2509 CODECDBG_PRINT("DIGITAL IN PIN\n") 2510 } 2511 else if (hdaCodecIsDigOutPinNode(pInfo->pThis, pNode->node.id)) 2512 { 2513 CODECDBG_PRINT("DIGITAL OUT PIN\n") 2514 } 2515 else if (hdaCodecIsCdNode(pInfo->pThis, pNode->node.id)) 2516 { 2517 CODECDBG_PRINT("CD\n") 2518 } 2519 else if (hdaCodecIsVolKnobNode(pInfo->pThis, pNode->node.id)) 2520 { 2521 CODECDBG_PRINT("VOLUME KNOB\n") 2522 } 2523 else if (hdaCodecIsReservedNode(pInfo->pThis, pNode->node.id)) 2524 { 2525 CODECDBG_PRINT("RESERVED\n") 2526 } 2527 else 2528 CODECDBG_PRINT("UNKNOWN TYPE 0x%x\n", pNode->node.id); 2529 } 2530 2531 static DECLCALLBACK(void) codecDbgListNodes(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs) 2532 { 2533 pHlp->pfnPrintf(pHlp, "HDA LINK\n"); 2534 2535 CODECDBGINFO dbgInfo; 2536 dbgInfo.pHlp = pHlp; 2537 dbgInfo.pThis = pThis; 2538 dbgInfo.uLevel = 0; 2539 2540 PCODECDBGINFO pInfo = &dbgInfo; 2541 2542 CODECDBG_INDENT 2543 for (uint8_t i = 0; i < pThis->cTotalNodes; i++) 2544 { 2545 PCODECNODE pNode = &pThis->paNodes[i]; 2546 if (pNode->node.au32F00_param[0xE] == 0) /* Start with all nodes connected directly to the HDA (Azalia) link. */ 2547 codecDbgPrintNode(&dbgInfo, pNode); 2548 } 2549 CODECDBG_UNINDENT 2550 } 2551 2552 static DECLCALLBACK(void) codecDbgSelector(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs) 2553 { 2554 2555 } 2556 #endif 2557 2232 2558 static int codecLookup(PHDACODEC pThis, uint32_t cmd, PPFNHDACODECVERBPROCESSOR pfn) 2233 2559 { … … 2397 2723 pThis->paVerbs = &g_aCodecVerbs[0]; 2398 2724 pThis->cVerbs = RT_ELEMENTS(g_aCodecVerbs); 2399 pThis->pfnLookup = codecLookup; 2725 pThis->pfnLookup = codecLookup; 2726 #ifdef DEBUG 2727 pThis->pfnDbgSelector = codecDbgSelector; 2728 pThis->pfnDbgListNodes = codecDbgListNodes; 2729 #endif 2400 2730 int rc = stac9220Construct(pThis); 2401 2731 AssertRC(rc); -
trunk/src/VBox/Devices/Audio/DevIchHdaCodec.h
r56292 r56727 110 110 const uint8_t u8DacLineOut; 111 111 #endif 112 /* Callbacks to the HDA controller, mostly used for multiplexing to the various host backends. */112 /** Callbacks to the HDA controller, mostly used for multiplexing to the various host backends. */ 113 113 DECLR3CALLBACKMEMBER(void, pfnCloseIn, (PHDASTATE pThis, PDMAUDIORECSOURCE enmRecSource)); 114 114 DECLR3CALLBACKMEMBER(void, pfnCloseOut, (PHDASTATE pThis)); … … 116 116 DECLR3CALLBACKMEMBER(int, pfnOpenOut, (PHDASTATE pThis, const char *pszName, PPDMAUDIOSTREAMCFG pCfg)); 117 117 DECLR3CALLBACKMEMBER(int, pfnSetVolume, (PHDASTATE pThis, ENMSOUNDSOURCE enmSource, bool fMute, uint8_t uVolLeft, uint8_t uVolRight)); 118 /* Callbacks by codec implementation. */118 /** Callbacks by codec implementation. */ 119 119 DECLR3CALLBACKMEMBER(int, pfnLookup, (PHDACODEC pThis, uint32_t verb, PPFNHDACODECVERBPROCESSOR)); 120 120 DECLR3CALLBACKMEMBER(int, pfnReset, (PHDACODEC pThis)); 121 121 DECLR3CALLBACKMEMBER(int, pfnCodecNodeReset, (PHDACODEC pThis, uint8_t, PCODECNODE)); 122 /* Callbacksby codec implementation to answer debugger requests. */123 DECLR3CALLBACKMEMBER(void, pfn CodecDbgListNodes, (PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs));124 DECLR3CALLBACKMEMBER(void, pfn CodecDbgSelector, (PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs));122 /** These callbacks are set by codec implementation to answer debugger requests. */ 123 DECLR3CALLBACKMEMBER(void, pfnDbgListNodes, (PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)); 124 DECLR3CALLBACKMEMBER(void, pfnDbgSelector, (PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)); 125 125 } CODECState; 126 126
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