Changeset 57107 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Jul 28, 2015 11:13:18 AM (9 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR3/TM.cpp
r57078 r57107 1360 1360 * switches during VM runtime (e.g. by GIM). 1361 1361 */ 1362 uint64_t uGipCpuHz; 1363 bool fRelax = RTSystemIsInsideVM(); 1364 bool fCompat = SUPIsTscFreqCompatible(pVM->tm.s.cTSCTicksPerSecond, &uGipCpuHz, fRelax); 1365 if (!fCompat) 1366 { 1367 pVM->tm.s.enmTSCMode = TMTSCMODE_VIRT_TSC_EMULATED; 1368 pVM->tm.s.fTSCModeSwitchAllowed = false; 1369 if (g_pSUPGlobalInfoPage->u32Mode != SUPGIPMODE_ASYNC_TSC) 1362 if ( GIMIsEnabled(pVM) 1363 || pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET) 1364 { 1365 uint64_t uGipCpuHz; 1366 bool fRelax = RTSystemIsInsideVM(); 1367 bool fCompat = SUPIsTscFreqCompatible(pVM->tm.s.cTSCTicksPerSecond, &uGipCpuHz, fRelax); 1368 if (!fCompat) 1370 1369 { 1371 LogRel(("TM: TSC frequency incompatible! uGipCpuHz=%#RX64 (%'RU64) enmTSCMode=%d (%s) fTSCModeSwitchAllowed=%RTbool (state load)\n", 1372 uGipCpuHz, uGipCpuHz, pVM->tm.s.enmTSCMode, tmR3GetTSCModeName(pVM), pVM->tm.s.fTSCModeSwitchAllowed)); 1373 } 1374 else 1375 { 1376 LogRel(("TM: GIP is async, enmTSCMode=%d (%s) fTSCModeSwitchAllowed=%RTbool (state load)\n", 1377 uGipCpuHz, uGipCpuHz, pVM->tm.s.enmTSCMode, tmR3GetTSCModeName(pVM), pVM->tm.s.fTSCModeSwitchAllowed)); 1370 pVM->tm.s.enmTSCMode = TMTSCMODE_VIRT_TSC_EMULATED; 1371 pVM->tm.s.fTSCModeSwitchAllowed = false; 1372 if (g_pSUPGlobalInfoPage->u32Mode != SUPGIPMODE_ASYNC_TSC) 1373 { 1374 LogRel(("TM: TSC frequency incompatible! uGipCpuHz=%#RX64 (%'RU64) enmTSCMode=%d (%s) fTSCModeSwitchAllowed=%RTbool (state load)\n", 1375 uGipCpuHz, uGipCpuHz, pVM->tm.s.enmTSCMode, tmR3GetTSCModeName(pVM), pVM->tm.s.fTSCModeSwitchAllowed)); 1376 } 1377 else 1378 { 1379 LogRel(("TM: GIP is async, enmTSCMode=%d (%s) fTSCModeSwitchAllowed=%RTbool (state load)\n", 1380 uGipCpuHz, uGipCpuHz, pVM->tm.s.enmTSCMode, tmR3GetTSCModeName(pVM), pVM->tm.s.fTSCModeSwitchAllowed)); 1381 } 1378 1382 } 1379 1383 }
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