Changeset 57270 in vbox for trunk/include/VBox
- Timestamp:
- Aug 11, 2015 9:55:44 AM (10 years ago)
- svn:sync-xref-src-repo-rev:
- 102025
- File:
-
- 1 edited
-
trunk/include/VBox/vmm/hm_vmx.h (modified) (28 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/include/VBox/vmm/hm_vmx.h
r57243 r57270 383 383 /** Interruptibility state block-by-SMI invalid when trying to enter SMM. */ 384 384 #define VMX_IGS_INTERRUPTIBILITY_STATE_SMI_SMM_INVALID 99 385 /** Interruptibil ty state block-by-STI (maybe) invalid when trying to deliver386 * an NMI. */385 /** Interruptibility state block-by-STI (maybe) invalid when trying to 386 * deliver an NMI. */ 387 387 #define VMX_IGS_INTERRUPTIBILITY_STATE_STI_INVALID 100 388 388 /** Interruptibility state block-by-NMI invalid when virtual-NMIs control is … … 484 484 /** Physical address of the next level (PD). Restricted by maximum physical address width of the cpu. */ 485 485 uint64_t u40PhysAddr : 40; 486 /** Availab e for software. */486 /** Available for software. */ 487 487 uint64_t u12Available : 12; 488 488 } EPTPML4EBITS; … … 546 546 /** Physical address of the next level (PD). Restricted by maximum physical address width of the cpu. */ 547 547 uint64_t u40PhysAddr : 40; 548 /** Availab e for software. */548 /** Available for software. */ 549 549 uint64_t u12Available : 12; 550 550 } EPTPDPTEBITS; … … 611 611 /** Physical address of page table. Restricted by maximum physical address width of the cpu. */ 612 612 uint64_t u40PhysAddr : 40; 613 /** Availab e for software. */613 /** Available for software. */ 614 614 uint64_t u12Available : 12; 615 615 } EPTPDEBITS; … … 646 646 /** Physical address of the 2MB page. Restricted by maximum physical address width of the cpu. */ 647 647 uint64_t u31PhysAddr : 31; 648 /** Availab e for software. */648 /** Available for software. */ 649 649 uint64_t u12Available : 12; 650 650 } EPTPDE2MBITS; … … 823 823 struct 824 824 { 825 /** Bits set here -must- be set in the corre psonding VM-execution controls. */825 /** Bits set here -must- be set in the corresponding VM-execution controls. */ 826 826 uint32_t disallowed0; 827 827 /** Bits cleared here -must- be cleared in the corresponding VM-execution … … 1089 1089 /** Number of CR3 target values supported by the processor. (0-256) */ 1090 1090 #define MSR_IA32_VMX_MISC_CR3_TARGET(a) (((a) >> 16) & 0x1FF) 1091 /** Maximum n r of MSRs in the VMCS. (N+1)*512. */1091 /** Maximum number of MSRs in the VMCS. (N+1)*512. */ 1092 1092 #define MSR_IA32_VMX_MISC_MAX_MSR(a) (((((a) >> 25) & 0x7) + 1) * 512) 1093 1093 /** Whether RDMSR can be used to read IA32_SMBASE_MSR in SMM. */ … … 1241 1241 #define VMX_VMCS64_CTRL_EPTP_LIST_HIGH 0x2025 1242 1242 1243 /** VM-exit guest phy iscal address. */1243 /** VM-exit guest physical address. */ 1244 1244 #define VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL 0x2400 1245 1245 #define VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_HIGH 0x2401 … … 1373 1373 /** Unrestricted guest execution. */ 1374 1374 #define VMX_VMCS_CTRL_PROC_EXEC2_UNRESTRICTED_GUEST RT_BIT(7) 1375 /** A specified n r of pause loops cause a VM-exit. */1375 /** A specified number of pause loops cause a VM-exit. */ 1376 1376 #define VMX_VMCS_CTRL_PROC_EXEC2_PAUSE_LOOP_EXIT RT_BIT(10) 1377 1377 /** VM-exit when executing RDRAND instructions. */ … … 1387 1387 /** Controls whether EPT-violations may cause \#VE instead of exits. */ 1388 1388 #define VMX_VMCS_CTRL_PROC_EXEC2_EPT_VE RT_BIT_64(18) 1389 /** Enables XSAVES/ SRSTORS. */1389 /** Enables XSAVES/XRSTORS. */ 1390 1390 #define VMX_VMCS_CTRL_PROC_EXEC2_XSAVES RT_BIT_64(20) 1391 1391 … … 1684 1684 /** Set if the violation was caused by a data write. */ 1685 1685 #define VMX_EXIT_QUALIFICATION_EPT_DATA_WRITE RT_BIT(1) 1686 /** Set if the violation was caused by an ins ruction fetch. */1686 /** Set if the violation was caused by an instruction fetch. */ 1687 1687 #define VMX_EXIT_QUALIFICATION_EPT_INSTR_FETCH RT_BIT(2) 1688 1688 /** AND of the present bit of all EPT structures. */ … … 1848 1848 1849 1849 /** 1850 * Executes VMXON 1851 * 1852 * @returns VBox status code 1853 * @param pVMXOn Physical address of VMXON structure1850 * Executes VMXON. 1851 * 1852 * @returns VBox status code. 1853 * @param HCPhysVmxOn Physical address of VMXON structure. 1854 1854 */ 1855 1855 #if ((RT_INLINE_ASM_EXTERNAL || !defined(RT_ARCH_X86)) && !VMX_USE_MSC_INTRINSICS) || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 1856 DECLASM(int) VMXEnable(RTHCPHYS pVMXOn);1856 DECLASM(int) VMXEnable(RTHCPHYS HCPhysVmxOn); 1857 1857 #else 1858 DECLINLINE(int) VMXEnable(RTHCPHYS pVMXOn)1858 DECLINLINE(int) VMXEnable(RTHCPHYS HCPhysVmxOn) 1859 1859 { 1860 1860 # if RT_INLINE_ASM_GNU_STYLE … … 1874 1874 :"=rm"(rc) 1875 1875 :"0"(VINF_SUCCESS), 1876 "ir"((uint32_t) pVMXOn), /* don't allow direct memory reference here, */1877 "ir"((uint32_t)( pVMXOn >> 32)) /* this would not work with -fomit-frame-pointer */1876 "ir"((uint32_t)HCPhysVmxOn), /* don't allow direct memory reference here, */ 1877 "ir"((uint32_t)(HCPhysVmxOn >> 32)) /* this would not work with -fomit-frame-pointer */ 1878 1878 :"memory" 1879 1879 ); … … 1881 1881 1882 1882 # elif VMX_USE_MSC_INTRINSICS 1883 unsigned char rcMsc = __vmx_on(& pVMXOn);1883 unsigned char rcMsc = __vmx_on(&HCPhysVmxOn); 1884 1884 if (RT_LIKELY(rcMsc == 0)) 1885 1885 return VINF_SUCCESS; … … 1890 1890 __asm 1891 1891 { 1892 push dword ptr [ pVMXOn+4]1893 push dword ptr [ pVMXOn]1892 push dword ptr [HCPhysVmxOn + 4] 1893 push dword ptr [HCPhysVmxOn] 1894 1894 _emit 0xF3 1895 1895 _emit 0x0F … … 1914 1914 1915 1915 /** 1916 * Executes VMXOFF 1916 * Executes VMXOFF. 1917 1917 */ 1918 1918 #if ((RT_INLINE_ASM_EXTERNAL || !defined(RT_ARCH_X86)) && !VMX_USE_MSC_INTRINSICS) || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) … … 1942 1942 1943 1943 /** 1944 * Executes VMCLEAR 1945 * 1946 * @returns VBox status code 1947 * @param pVMCS Physical address of VM control structure1944 * Executes VMCLEAR. 1945 * 1946 * @returns VBox status code. 1947 * @param HCPhysVmcs Physical address of VM control structure. 1948 1948 */ 1949 1949 #if ((RT_INLINE_ASM_EXTERNAL || !defined(RT_ARCH_X86)) && !VMX_USE_MSC_INTRINSICS) || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 1950 DECLASM(int) VMXClearVmcs(RTHCPHYS pVMCS);1950 DECLASM(int) VMXClearVmcs(RTHCPHYS HCPhysVmcs); 1951 1951 #else 1952 DECLINLINE(int) VMXClearVmcs(RTHCPHYS pVMCS)1952 DECLINLINE(int) VMXClearVmcs(RTHCPHYS HCPhysVmcs) 1953 1953 { 1954 1954 # if RT_INLINE_ASM_GNU_STYLE … … 1964 1964 :"=rm"(rc) 1965 1965 :"0"(VINF_SUCCESS), 1966 "ir"((uint32_t) pVMCS), /* don't allow direct memory reference here, */1967 "ir"((uint32_t)( pVMCS>> 32)) /* this would not work with -fomit-frame-pointer */1966 "ir"((uint32_t)HCPhysVmcs), /* don't allow direct memory reference here, */ 1967 "ir"((uint32_t)(HCPhysVmcs >> 32)) /* this would not work with -fomit-frame-pointer */ 1968 1968 :"memory" 1969 1969 ); … … 1971 1971 1972 1972 # elif VMX_USE_MSC_INTRINSICS 1973 unsigned char rcMsc = __vmx_vmclear(& pVMCS);1973 unsigned char rcMsc = __vmx_vmclear(&HCPhysVmcs); 1974 1974 if (RT_LIKELY(rcMsc == 0)) 1975 1975 return VINF_SUCCESS; … … 1980 1980 __asm 1981 1981 { 1982 push dword ptr [ pVMCS+4]1983 push dword ptr [ pVMCS]1982 push dword ptr [HCPhysVmcs + 4] 1983 push dword ptr [HCPhysVmcs] 1984 1984 _emit 0x66 1985 1985 _emit 0x0F … … 1999 1999 2000 2000 /** 2001 * Executes VMPTRLD 2002 * 2003 * @returns VBox status code 2004 * @param pVMCS Physical address of VMCS structure2001 * Executes VMPTRLD. 2002 * 2003 * @returns VBox status code. 2004 * @param HCPhysVmcs Physical address of VMCS structure. 2005 2005 */ 2006 2006 #if ((RT_INLINE_ASM_EXTERNAL || !defined(RT_ARCH_X86)) && !VMX_USE_MSC_INTRINSICS) || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 2007 DECLASM(int) VMXActivateVmcs(RTHCPHYS pVMCS);2007 DECLASM(int) VMXActivateVmcs(RTHCPHYS HCPhysVmcs); 2008 2008 #else 2009 DECLINLINE(int) VMXActivateVmcs(RTHCPHYS pVMCS)2009 DECLINLINE(int) VMXActivateVmcs(RTHCPHYS HCPhysVmcs) 2010 2010 { 2011 2011 # if RT_INLINE_ASM_GNU_STYLE … … 2021 2021 :"=rm"(rc) 2022 2022 :"0"(VINF_SUCCESS), 2023 "ir"((uint32_t) pVMCS), /* don't allow direct memory reference here, */2024 "ir"((uint32_t)( pVMCS>> 32)) /* this will not work with -fomit-frame-pointer */2023 "ir"((uint32_t)HCPhysVmcs), /* don't allow direct memory reference here, */ 2024 "ir"((uint32_t)(HCPhysVmcs >> 32)) /* this will not work with -fomit-frame-pointer */ 2025 2025 ); 2026 2026 return rc; 2027 2027 2028 2028 # elif VMX_USE_MSC_INTRINSICS 2029 unsigned char rcMsc = __vmx_vmptrld(& pVMCS);2029 unsigned char rcMsc = __vmx_vmptrld(&HCPhysVmcs); 2030 2030 if (RT_LIKELY(rcMsc == 0)) 2031 2031 return VINF_SUCCESS; … … 2036 2036 __asm 2037 2037 { 2038 push dword ptr [ pVMCS+4]2039 push dword ptr [ pVMCS]2038 push dword ptr [HCPhysVmcs + 4] 2039 push dword ptr [HCPhysVmcs] 2040 2040 _emit 0x0F 2041 2041 _emit 0xC7 … … 2054 2054 2055 2055 /** 2056 * Executes VMPTRST 2057 * 2058 * @returns VBox status code 2059 * @param pVMCS Address that will receive the current pointer 2060 */ 2061 DECLASM(int) VMXGetActivatedVmcs(RTHCPHYS *pVMCS); 2062 2063 /** 2064 * Executes VMWRITE 2065 * 2066 * @returns VBox status code 2067 * @retval VINF_SUCCESS 2068 * @retval VERR_VMX_INVALID_VMCS_PTR 2069 * @retval VERR_VMX_INVALID_VMCS_FIELD 2070 * 2071 * @param idxField VMCS index 2072 * @param u32Val 32 bits value 2073 * 2074 * @remarks The values of the two status codes can be ORed together, the result 2056 * Executes VMPTRST. 2057 * 2058 * @returns VBox status code. 2059 * @param pHCPhysVmcs Where to store the physical address of the current 2060 * VMCS. 2061 */ 2062 DECLASM(int) VMXGetActivatedVmcs(RTHCPHYS *pHCPhysVmcs); 2063 2064 /** 2065 * Executes VMWRITE. 2066 * 2067 * @returns VBox status code. 2068 * @retval VINF_SUCCESS. 2069 * @retval VERR_VMX_INVALID_VMCS_PTR. 2070 * @retval VERR_VMX_INVALID_VMCS_FIELD. 2071 * 2072 * @param idxField VMCS index. 2073 * @param u32Val 32-bit value. 2074 * 2075 * @remarks The values of the two status codes can be OR'ed together, the result 2075 2076 * will be VERR_VMX_INVALID_VMCS_PTR. 2076 2077 */ … … 2130 2131 2131 2132 /** 2132 * Executes VMWRITE 2133 * 2134 * @returns VBox status code 2135 * @retval VINF_SUCCESS 2136 * @retval VERR_VMX_INVALID_VMCS_PTR 2137 * @retval VERR_VMX_INVALID_VMCS_FIELD 2138 * 2139 * @param idxField VMCS index 2140 * @param u64Val 16, 32 or 64 bits value2141 * 2142 * @remarks The values of the two status codes can be OR ed together, the result2133 * Executes VMWRITE. 2134 * 2135 * @returns VBox status code. 2136 * @retval VINF_SUCCESS. 2137 * @retval VERR_VMX_INVALID_VMCS_PTR. 2138 * @retval VERR_VMX_INVALID_VMCS_FIELD. 2139 * 2140 * @param idxField VMCS index. 2141 * @param u64Val 16, 32 or 64-bit value. 2142 * 2143 * @remarks The values of the two status codes can be OR'ed together, the result 2143 2144 * will be VERR_VMX_INVALID_VMCS_PTR. 2144 2145 */ … … 2177 2178 2178 2179 /** 2179 * Invalidate a page using invept 2180 * @returns VBox status code 2181 * @param enmFlush Type of flush 2182 * @param pDescriptor Descriptor 2180 * Invalidate a page using INVEPT. 2181 * 2182 * @returns VBox status code. 2183 * @param enmFlush Type of flush. 2184 * @param pDescriptor Pointer to the descriptor. 2183 2185 */ 2184 2186 DECLASM(int) VMXR0InvEPT(VMXFLUSHEPT enmFlush, uint64_t *pDescriptor); 2185 2187 2186 2188 /** 2187 * Invalidate a page using invvpid 2188 * @returns VBox status code 2189 * @param enmFlush Type of flush 2190 * @param pDescriptor Descriptor 2189 * Invalidate a page using INVVPID. 2190 * 2191 * @returns VBox status code. 2192 * @param enmFlush Type of flush. 2193 * @param pDescriptor Pointer to the descriptor. 2191 2194 */ 2192 2195 DECLASM(int) VMXR0InvVPID(VMXFLUSHVPID enmFlush, uint64_t *pDescriptor); 2193 2196 2194 2197 /** 2195 * Executes VMREAD 2196 * 2197 * @returns VBox status code 2198 * @retval VINF_SUCCESS 2199 * @retval VERR_VMX_INVALID_VMCS_PTR 2200 * @retval VERR_VMX_INVALID_VMCS_FIELD 2201 * 2202 * @param idxField VMCS index 2203 * @param pData Ptr to store VM field value2204 * 2205 * @remarks The values of the two status codes can be OR ed together, the result2198 * Executes VMREAD. 2199 * 2200 * @returns VBox status code. 2201 * @retval VINF_SUCCESS. 2202 * @retval VERR_VMX_INVALID_VMCS_PTR. 2203 * @retval VERR_VMX_INVALID_VMCS_FIELD. 2204 * 2205 * @param idxField VMCS index. 2206 * @param pData Where to store VM field value. 2207 * 2208 * @remarks The values of the two status codes can be OR'ed together, the result 2206 2209 * will be VERR_VMX_INVALID_VMCS_PTR. 2207 2210 */ … … 2271 2274 2272 2275 /** 2273 * Executes VMREAD 2274 * 2275 * @returns VBox status code 2276 * @retval VINF_SUCCESS 2277 * @retval VERR_VMX_INVALID_VMCS_PTR 2278 * @retval VERR_VMX_INVALID_VMCS_FIELD 2279 * 2280 * @param idxField VMCS index 2281 * @param pData Ptr to store VM field value2282 * 2283 * @remarks The values of the two status codes can be OR ed together, the result2276 * Executes VMREAD. 2277 * 2278 * @returns VBox status code. 2279 * @retval VINF_SUCCESS. 2280 * @retval VERR_VMX_INVALID_VMCS_PTR. 2281 * @retval VERR_VMX_INVALID_VMCS_FIELD. 2282 * 2283 * @param idxField VMCS index. 2284 * @param pData Where to store VM field value. 2285 * 2286 * @remarks The values of the two status codes can be OR'ed together, the result 2284 2287 * will be VERR_VMX_INVALID_VMCS_PTR. 2285 2288 */ … … 2320 2323 2321 2324 /** 2322 * Gets the last instruction error value from the current VMCS 2323 * 2324 * @returns error value2325 * Gets the last instruction error value from the current VMCS. 2326 * 2327 * @returns VBox status code. 2325 2328 */ 2326 2329 DECLINLINE(uint32_t) VMXGetLastError(void)
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