- Timestamp:
- Sep 22, 2015 1:47:01 PM (9 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r57851 r57854 1057 1057 Assert(enmOp > HM64ON32OP_INVALID && enmOp < HM64ON32OP_END); 1058 1058 1059 NOREF(pCtx); 1060 1059 1061 /* Disable interrupts. */ 1060 1062 RTHCUINTREG uOldEFlags = ASMIntDisableFlags(); -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r57733 r57854 2988 2988 } 2989 2989 #else 2990 NOREF(pVM); 2990 2991 uintptr_t uTRBase = X86DESC_BASE(pDesc); 2991 2992 #endif … … 5077 5078 uint32_t cParams, uint32_t *paParam) 5078 5079 { 5079 int rc, rc2; 5080 PHMGLOBALCPUINFO pCpu; 5081 RTHCPHYS HCPhysCpuPage; 5082 RTCCUINTREG fOldEFlags; 5080 NOREF(pCtx); 5083 5081 5084 5082 AssertReturn(pVM->hm.s.pfnHost32ToGuest64R0, VERR_HM_NO_32_TO_64_SWITCHER); … … 5096 5094 5097 5095 /* Disable interrupts. */ 5098 fOldEFlags = ASMIntDisableFlags();5096 RTCCUINTREG fOldEFlags = ASMIntDisableFlags(); 5099 5097 5100 5098 #ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI … … 5103 5101 #endif 5104 5102 5105 pCpu = HMR0GetCurrentCpu();5106 HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0);5103 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 5104 RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0); 5107 5105 5108 5106 /* Clear VMCS. Marking it inactive, clearing implementation-specific data and writing VMCS data back to memory. */ … … 5122 5120 5123 5121 /* Call the switcher. */ 5124 rc = pVM->hm.s.pfnHost32ToGuest64R0(pVM, RT_OFFSETOF(VM, aCpus[pVCpu->idCpu].cpum) - RT_OFFSETOF(VM, cpum));5122 int rc = pVM->hm.s.pfnHost32ToGuest64R0(pVM, RT_OFFSETOF(VM, aCpus[pVCpu->idCpu].cpum) - RT_OFFSETOF(VM, cpum)); 5125 5123 STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatWorldSwitch3264, z); 5126 5124 … … 5130 5128 5131 5129 /* Re-enter VMX Root Mode */ 5132 rc2 = VMXEnable(HCPhysCpuPage);5130 int rc2 = VMXEnable(HCPhysCpuPage); 5133 5131 if (RT_FAILURE(rc2)) 5134 5132 { … … 5160 5158 DECLASM(int) VMXR0SwitcherStartVM64(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu) 5161 5159 { 5162 PHMGLOBALCPUINFO pCpu = NULL; 5163 RTHCPHYS HCPhysCpuPage = 0; 5164 int rc = VERR_INTERNAL_ERROR_5; 5165 5166 pCpu = HMR0GetCurrentCpu(); 5167 HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0); 5160 NOREF(fResume); 5161 5162 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 5163 RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0); 5168 5164 5169 5165 #ifdef VBOX_WITH_CRASHDUMP_MAGIC … … 5199 5195 *(uint32_t *)(pVM->hm.s.vmx.pScratch + 16 + 8) = 1; 5200 5196 #endif 5201 rc = VMXR0Execute64BitsHandler(pVM, pVCpu, pCtx, HM64ON32OP_VMXRCStartVM64, RT_ELEMENTS(aParam), &aParam[0]);5197 int rc = VMXR0Execute64BitsHandler(pVM, pVCpu, pCtx, HM64ON32OP_VMXRCStartVM64, RT_ELEMENTS(aParam), &aParam[0]); 5202 5198 5203 5199 #ifdef VBOX_WITH_CRASHDUMP_MAGIC
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