Changeset 58091 in vbox for trunk

Timestamp:

Oct 7, 2015 1:28:38 PM (9 years ago)

Author:

vboxsync

Message:

pciraw: integrate the changes to make MSI work, and assorted fixes and cleanups

Location:

trunk/src/VBox/Devices/Bus

Files:

• DevPciIch9.cpp (modified) (1 diff)
• MsiCommon.cpp (modified) (7 diffs)

trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

@@ -921 +921 @@
                 uNew = INVALID_PCI_ADDRESS;
         }
-        //LogRel(("PCI: config dev %u/%u BAR%i uOld=%#018llx uNew=%#018llx size=%llu\n", pDev->devfn >> 3, pDev->devfn & 7, iRegion, pRegion->addr, uNew, pRegion->size));
+        LogRel2(("PCI: config dev %u/%u BAR%i uOld=%#018llx uNew=%#018llx size=%llu\n", pDev->devfn >> 3, pDev->devfn & 7, iRegion, pRegion->addr, uNew, pRegion->size));
         /* now do the real mapping */
         if (uNew != pRegion->addr)

trunk/src/VBox/Devices/Bus/MsiCommon.cpp

@@ -25 +25 @@
 #include "MsiCommon.h"
 
-/** @todo: use accessors so that raw PCI devices work correctly with MSI. */
 DECLINLINE(uint16_t) msiGetMessageControl(PPCIDEVICE pDev)
 {
-    return PCIDevGetWord(pDev, pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_CONTROL);
+    uint32_t idxMessageControl = pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_CONTROL;
+#ifdef IN_RING3
+    if (pciDevIsPassthrough(pDev)) {
+        return pDev->Int.s.pfnConfigRead(pDev, idxMessageControl, 2);
+    }
+#endif
+    return PCIDevGetWord(pDev, idxMessageControl);
 }
 
@@ -39 +44 @@
 {
     uint8_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_MASK_BITS_64 : VBOX_MSI_CAP_MASK_BITS_32;
+    /* passthrough devices may have no masked/pending support */
+    if (iOff >= pDev->Int.s.u8MsiCapSize)
+        return NULL;
     iOff += pDev->Int.s.u8MsiCapOffset;
     return (uint32_t*)(pDev->config + iOff);
@@ -46 +54 @@
 {
     uint8_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_PENDING_BITS_64 : VBOX_MSI_CAP_PENDING_BITS_32;
+    /* passthrough devices may have no masked/pending support */
+    if (iOff >= pDev->Int.s.u8MsiCapSize)
+        return NULL;
     iOff += pDev->Int.s.u8MsiCapOffset;
     return (uint32_t*)(pDev->config + iOff);
@@ -220 +231 @@
          return VINF_SUCCESS;
 
-    /* We cannot init MSI on raw devices yet. */
-    Assert(!pciDevIsPassthrough(pDev));
+    /* XXX: done in pcirawAnalyzePciCaps() */
+    if (pciDevIsPassthrough(pDev))
+        return VINF_SUCCESS;
 
     uint16_t   cVectors    = pMsiReg->cMsiVectors;
@@ -276 +288 @@
     AssertMsg(msiIsEnabled(pDev), ("Must be enabled to use that"));
 
-    uint32_t   uMask = *msiGetMaskBits(pDev);
-    uint32_t*  puPending = msiGetPendingBits(pDev);
-
-    LogFlow(("MsiNotify: %d pending=%x mask=%x\n", iVector, *puPending, uMask));
+    uint32_t uMask;
+    uint32_t *puPending = msiGetPendingBits(pDev);
+    if (puPending)
+    {
+        uint32_t *puMask = msiGetMaskBits(pDev);
+        AssertPtr(puMask);
+        uMask = *puMask;
+        LogFlow(("MsiNotify: %d pending=%x mask=%x\n", iVector, *puPending, uMask));
+    }
+    else
+    {
+        uMask = 0;
+        LogFlow(("MsiNotify: %d\n", iVector));
+    }
 
     /* We only trigger MSI on level up */
@@ -286 +308 @@
         /* @todo: maybe clear pending interrupts on level down? */
 #if 0
-        *puPending &= ~(1<<iVector);
-        LogFlow(("msi: clear pending %d, now %x\n", iVector, *puPending));
+        if (puPending)
+        {
+            *puPending &= ~(1<<iVector);
+            LogFlow(("msi: clear pending %d, now %x\n", iVector, *puPending));
+        }
 #endif
         return;
@@ -302 +327 @@
     uint32_t   u32Value = msiGetMsiData(pDev, iVector);
 
-    *puPending &= ~(1<<iVector);
+    if (puPending)
+        *puPending &= ~(1<<iVector);
 
     Assert(pPciHlp->pfnIoApicSendMsi != NULL);