Changeset 58126 in vbox for trunk/src/VBox/VMM/VMMAll/EMAll.cpp
- Timestamp:
- Oct 8, 2015 8:59:48 PM (9 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r58123 r58126 129 129 } 130 130 131 131 132 /** 132 133 * Sets the current execution manager status. (use only when you know what you're doing!) 133 134 * 134 * @param pVCpu The cross context virtual CPU structure. 135 * @param pVCpu The cross context virtual CPU structure. 136 * @param enmNewState The new state, EMSTATE_WAIT_SIPI or EMSTATE_HALTED. 135 137 */ 136 138 VMM_INT_DECL(void) EMSetState(PVMCPU pVCpu, EMSTATE enmNewState) … … 700 702 * Updates the EIP if an instruction was executed successfully. 701 703 * @param pvFault The fault address (CR2). 702 * @param pcbSize Size of the write (if applicable).703 704 * 704 705 * @remark Invalid opcode exceptions have a higher priority than GP (see Intel … … 824 825 * @retval VERR_* Fatal errors. 825 826 * 826 * @param pVM The cross context VM structure. 827 * @param pVCpu The cross context virtual CPU structure. 827 * @param pVCpu The cross context virtual CPU structure of the calling EMT. 828 828 * @param pRegFrame The register frame. 829 829 * Updates the EIP if an instruction was executed successfully. … … 961 961 * @retval VERR_* Fatal errors. 962 962 * 963 * @param pVM The cross context VM structure. 964 * @param pVCpu The cross context virtual CPU structure. 963 * @param pVCpu The cross context virtual CPU structure of the calling EMT. 965 964 * @param pDis The disassembler cpu state for the instruction to be 966 965 * interpreted. 967 966 * @param pRegFrame The register frame. IP/EIP/RIP *IS* changed! 968 967 * @param pvFault The fault address (CR2). 969 * @param pcbSize Size of the write (if applicable).970 968 * @param enmCodeType Code type (user/supervisor) 971 969 * … … 1325 1323 pRegFrame->rax = 0; 1326 1324 pRegFrame->rdx = 0; 1327 /** @todo We should trigger a #GP here if the CPU doesn't support the index in ecx1328 * but see @bugref{3472}! */1325 /** @todo We should trigger a \#GP here if the CPU doesn't support the index in 1326 * ecx but see @bugref{3472}! */ 1329 1327 1330 1328 NOREF(pVM); … … 1441 1439 * @param pVCpu The cross context virtual CPU structure. 1442 1440 * @param pRegFrame The register frame. 1443 * @param DestRegC Rx CRx register index (DISUSE_REG_CR*)1441 * @param DestRegCrx CRx register index (DISUSE_REG_CR*) 1444 1442 * @param val New CRx value 1445 1443 * … … 1607 1605 * @param pVCpu The cross context virtual CPU structure. 1608 1606 * @param pRegFrame The register frame. 1609 * @param DestRegC Rx CRx register index (DISUSE_REG_CR*)1607 * @param DestRegCrx CRx register index (DISUSE_REG_CR*) 1610 1608 * @param SrcRegGen General purpose register index (USE_REG_E**)) 1611 1609 * … … 1762 1760 * @param pRegFrame The register frame. 1763 1761 * @param DestRegGen General purpose register index (USE_REG_E**)) 1764 * @param SrcRegC Rx CRx register index (DISUSE_REG_CR*)1762 * @param SrcRegCrx CRx register index (DISUSE_REG_CR*) 1765 1763 * 1766 1764 */ … … 1794 1792 * @param pVCpu The cross context virtual CPU structure. 1795 1793 * @param pRegFrame The register frame. 1796 * @param DestRegD Rx DRx register index (USE_REG_DR*)1794 * @param DestRegDrx DRx register index (USE_REG_DR*) 1797 1795 * @param SrcRegGen General purpose register index (USE_REG_E**)) 1798 1796 * … … 1845 1843 * @param pRegFrame The register frame. 1846 1844 * @param DestRegGen General purpose register index (USE_REG_E**)) 1847 * @param SrcRegDRx DRx register index (USE_REG_DR*) 1848 * 1845 * @param SrcRegDrx DRx register index (USE_REG_DR*) 1849 1846 */ 1850 1847 VMM_INT_DECL(int) EMInterpretDRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx) … … 3644 3641 * Internal worker. 3645 3642 * @copydoc emInterpretInstructionCPUOuter 3643 * @param pVM The cross context VM structure. 3646 3644 */ 3647 3645 DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPU(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
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