Changeset 58459 in vbox for trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata
- Timestamp:
- Oct 28, 2015 8:17:18 PM (9 years ago)
- Location:
- trunk/src/VBox/Devices/EFI/Firmware
- Files:
-
- 11 edited
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- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/EFI/Firmware
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/vendor/edk2/current 103735-103757
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Property svn:mergeinfo
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trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
r48674 r58459 2 2 The file for AHCI mode of ATA host controller. 3 3 4 Copyright (c) 2010 - 201 1, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR> 5 5 This program and the accompanying materials 6 6 are licensed and made available under the terms and conditions of the BSD License … … 157 157 { 158 158 UINT32 Value; 159 UINT32 Delay; 160 161 Delay = (UINT32) (DivU64x32 (Timeout, 1000) + 1); 159 UINT64 Delay; 160 BOOLEAN InfiniteWait; 161 162 if (Timeout == 0) { 163 InfiniteWait = TRUE; 164 } else { 165 InfiniteWait = FALSE; 166 } 167 168 Delay = DivU64x32 (Timeout, 1000) + 1; 162 169 163 170 do { … … 178 185 Delay--; 179 186 180 } while ( Delay > 0);187 } while (InfiniteWait || (Delay > 0)); 181 188 182 189 return EFI_TIMEOUT; … … 205 212 { 206 213 UINT32 Value; 207 UINT32 Delay; 208 209 Delay = (UINT32) (DivU64x32 (Timeout, 1000) + 1); 214 UINT64 Delay; 215 BOOLEAN InfiniteWait; 216 217 if (Timeout == 0) { 218 InfiniteWait = TRUE; 219 } else { 220 InfiniteWait = FALSE; 221 } 222 223 Delay = DivU64x32 (Timeout, 1000) + 1; 210 224 211 225 do { … … 232 246 Delay--; 233 247 234 } while ( Delay > 0);248 } while (InfiniteWait || (Delay > 0)); 235 249 236 250 return EFI_TIMEOUT; … … 243 257 @param[in] MaskValue The mask value of memory. 244 258 @param[in] TestValue The test value of memory. 245 @param[in, out] RetryTimes The retry times value for waitting memory set. If 0, then just try once. 259 @param[in, out] Task Optional. Pointer to the ATA_NONBLOCK_TASK used by 260 non-blocking mode. If NULL, then just try once. 246 261 247 262 @retval EFI_NOTREADY The memory is not set. … … 256 271 IN UINT32 MaskValue, 257 272 IN UINT32 TestValue, 258 IN OUT UINTN *RetryTimes OPTIONAL273 IN OUT ATA_NONBLOCK_TASK *Task 259 274 ) 260 275 { 261 276 UINT32 Value; 262 277 263 if ( RetryTimes!= NULL) {264 (*RetryTimes)--;278 if (Task != NULL) { 279 Task->RetryTimes--; 265 280 } 266 281 … … 272 287 } 273 288 274 if (( RetryTimes != NULL) && (*RetryTimes == 0)) {289 if ((Task != NULL) && !Task->InfiniteWait && (Task->RetryTimes == 0)) { 275 290 return EFI_TIMEOUT; 276 291 } else { … … 518 533 // Filling the PRDT 519 534 // 520 PrdtNumber = ( DataLength + EFI_AHCI_MAX_DATA_PER_PRDT - 1) / EFI_AHCI_MAX_DATA_PER_PRDT;535 PrdtNumber = (UINT32)DivU64x32 (((UINT64)DataLength + EFI_AHCI_MAX_DATA_PER_PRDT - 1), EFI_AHCI_MAX_DATA_PER_PRDT); 521 536 522 537 // … … 549 564 CommandList->AhciCmdA = 1; 550 565 CommandList->AhciCmdP = 1; 551 CommandList->AhciCmdC = (DataLength == 0) ? 1 : 0;552 566 553 567 AhciOrReg (PciIo, Offset, (EFI_AHCI_PORT_CMD_DLAE | EFI_AHCI_PORT_CMD_ATAPI)); … … 685 699 UINTN MapLength; 686 700 EFI_PCI_IO_PROTOCOL_OPERATION Flag; 687 UINT 32Delay;701 UINT64 Delay; 688 702 EFI_AHCI_COMMAND_FIS CFis; 689 703 EFI_AHCI_COMMAND_LIST CmdList; 690 704 UINT32 PortTfd; 691 705 UINT32 PrdCount; 706 BOOLEAN InfiniteWait; 707 BOOLEAN PioFisReceived; 708 BOOLEAN D2hFisReceived; 709 710 if (Timeout == 0) { 711 InfiniteWait = TRUE; 712 } else { 713 InfiniteWait = FALSE; 714 } 692 715 693 716 if (Read) { … … 758 781 // 759 782 Status = EFI_TIMEOUT; 760 Delay = (UINT32) (DivU64x32 (Timeout, 1000) + 1);783 Delay = DivU64x32 (Timeout, 1000) + 1; 761 784 do { 762 Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;763 PortTfd = AhciReadReg (PciIo, (UINT32) Offset);764 765 if ((PortTfd & EFI_AHCI_PORT_TFD_ERR) != 0) {766 Status = EFI_DEVICE_ERROR;767 break;785 PioFisReceived = FALSE; 786 D2hFisReceived = FALSE; 787 Offset = FisBaseAddr + EFI_AHCI_PIO_FIS_OFFSET; 788 Status = AhciCheckMemSet (Offset, EFI_AHCI_FIS_TYPE_MASK, EFI_AHCI_FIS_PIO_SETUP, NULL); 789 if (!EFI_ERROR (Status)) { 790 PioFisReceived = TRUE; 768 791 } 769 Offset = FisBaseAddr + EFI_AHCI_PIO_FIS_OFFSET; 770 771 Status = AhciCheckMemSet (Offset, EFI_AHCI_FIS_TYPE_MASK, EFI_AHCI_FIS_PIO_SETUP, 0); 792 // 793 // According to SATA 2.6 spec section 11.7, D2h FIS means an error encountered. 794 // But Qemu and Marvel 9230 sata controller may just receive a D2h FIS from device 795 // after the transaction is finished successfully. 796 // To get better device compatibilities, we further check if the PxTFD's ERR bit is set. 797 // By this way, we can know if there is a real error happened. 798 // 799 Offset = FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET; 800 Status = AhciCheckMemSet (Offset, EFI_AHCI_FIS_TYPE_MASK, EFI_AHCI_FIS_REGISTER_D2H, NULL); 772 801 if (!EFI_ERROR (Status)) { 802 D2hFisReceived = TRUE; 803 } 804 805 if (PioFisReceived || D2hFisReceived) { 806 Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD; 807 PortTfd = AhciReadReg (PciIo, (UINT32) Offset); 808 // 809 // PxTFD will be updated if there is a D2H or SetupFIS received. 810 // 811 if ((PortTfd & EFI_AHCI_PORT_TFD_ERR) != 0) { 812 Status = EFI_DEVICE_ERROR; 813 break; 814 } 815 773 816 PrdCount = *(volatile UINT32 *) (&(AhciRegisters->AhciCmdList[0].AhciCmdPrdbc)); 774 817 if (PrdCount == DataCount) { 818 Status = EFI_SUCCESS; 775 819 break; 776 820 } 777 821 } 778 822 779 Offset = FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET; 780 Status = AhciCheckMemSet (Offset, EFI_AHCI_FIS_TYPE_MASK, EFI_AHCI_FIS_REGISTER_D2H, 0); 781 if (!EFI_ERROR (Status)) { 782 Status = EFI_DEVICE_ERROR; 783 break; 823 // 824 // Stall for 100 microseconds. 825 // 826 MicroSecondDelay(100); 827 828 Delay--; 829 if (Delay == 0) { 830 Status = EFI_TIMEOUT; 784 831 } 785 786 // 787 // Stall for 100 microseconds. 788 // 789 MicroSecondDelay(100); 790 791 Delay--; 792 } while (Delay > 0); 832 } while (InfiniteWait || (Delay > 0)); 793 833 } else { 794 834 // … … 922 962 if (Task != NULL) { 923 963 Task->IsStart = TRUE; 924 Task->RetryTimes = (UINT32) (DivU64x32(Timeout, 1000) + 1);925 964 } 926 965 if (Read) { … … 998 1037 EFI_AHCI_FIS_TYPE_MASK, 999 1038 EFI_AHCI_FIS_REGISTER_D2H, 1000 (UINTN *) (&Task->RetryTimes)1039 Task 1001 1040 ); 1002 1041 } else { … … 1302 1341 // Setting the command 1303 1342 // 1304 Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SACT;1305 AhciAndReg (PciIo, Offset, 0);1306 AhciOrReg (PciIo, Offset, CmdSlotBit);1307 1308 1343 Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CI; 1309 1344 AhciAndReg (PciIo, Offset, 0); … … 1400 1435 ) 1401 1436 { 1402 UINT 32Delay;1437 UINT64 Delay; 1403 1438 UINT32 Value; 1404 1405 AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE); 1439 UINT32 Capability; 1440 1441 // 1442 // Collect AHCI controller information 1443 // 1444 Capability = AhciReadReg (PciIo, EFI_AHCI_CAPABILITY_OFFSET); 1445 1446 // 1447 // Enable AE before accessing any AHCI registers if Supports AHCI Mode Only is not set 1448 // 1449 if ((Capability & EFI_AHCI_CAP_SAM) == 0) { 1450 AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE); 1451 } 1406 1452 1407 1453 AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_RESET); 1408 1454 1409 Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);1455 Delay = DivU64x32(Timeout, 1000) + 1; 1410 1456 1411 1457 do { … … 1485 1531 1486 1532 if (EFI_ERROR (Status)) { 1533 REPORT_STATUS_CODE ( 1534 EFI_ERROR_CODE | EFI_ERROR_MINOR, 1535 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLED) 1536 ); 1487 1537 return EFI_DEVICE_ERROR; 1488 1538 } 1539 1540 REPORT_STATUS_CODE ( 1541 EFI_PROGRESS_CODE, 1542 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_ENABLE) 1543 ); 1489 1544 1490 1545 FisBaseAddr = (UINTN)AhciRegisters->AhciRFis + Port * sizeof (EFI_AHCI_RECEIVED_FIS); … … 1501 1556 // 1502 1557 DEBUG ((EFI_D_INFO, "The S.M.A.R.T threshold exceeded condition is not detected\n")); 1503 1558 REPORT_STATUS_CODE ( 1559 EFI_PROGRESS_CODE, 1560 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD) 1561 ); 1504 1562 } else if ((LBAMid == 0xf4) && (LBAHigh == 0x2c)) { 1505 1563 // … … 1507 1565 // 1508 1566 DEBUG ((EFI_D_INFO, "The S.M.A.R.T threshold exceeded condition is detected\n")); 1567 REPORT_STATUS_CODE ( 1568 EFI_PROGRESS_CODE, 1569 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD) 1570 ); 1509 1571 } 1510 1572 } … … 1547 1609 DEBUG ((EFI_D_INFO, "S.M.A.R.T feature is not supported at port [%d] PortMultiplier [%d]!\n", 1548 1610 Port, PortMultiplier)); 1611 REPORT_STATUS_CODE ( 1612 EFI_ERROR_CODE | EFI_ERROR_MINOR, 1613 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED) 1614 ); 1549 1615 } else { 1550 1616 // … … 1552 1618 // 1553 1619 if ((IdentifyData->AtaData.command_set_feature_enb_85 & 0x0001) != 0x0001) { 1620 1621 REPORT_STATUS_CODE ( 1622 EFI_PROGRESS_CODE, 1623 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLE) 1624 ); 1625 1554 1626 ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); 1555 1627 … … 1905 1977 1906 1978 UINT32 Capability; 1979 UINT32 PortImplementBitMap; 1907 1980 UINT8 MaxPortNumber; 1908 1981 UINT8 MaxCommandSlotNumber; … … 1920 1993 // 1921 1994 Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET); 1922 MaxPortNumber = (UINT8) ((Capability & 0x1F) + 1);1923 1995 // 1924 1996 // Get the number of command slots per port supported by this HBA. … … 1926 1998 MaxCommandSlotNumber = (UINT8) (((Capability & 0x1F00) >> 8) + 1); 1927 1999 Support64Bit = (BOOLEAN) (((Capability & BIT31) != 0) ? TRUE : FALSE); 2000 2001 PortImplementBitMap = AhciReadReg(PciIo, EFI_AHCI_PI_OFFSET); 2002 // 2003 // Get the highest bit of implemented ports which decides how many bytes are allocated for recived FIS. 2004 // 2005 MaxPortNumber = (UINT8)(UINTN)(HighBitSet32(PortImplementBitMap) + 1); 2006 if (MaxPortNumber == 0) { 2007 return EFI_DEVICE_ERROR; 2008 } 1928 2009 1929 2010 MaxReceiveFisSize = MaxPortNumber * sizeof (EFI_AHCI_RECEIVED_FIS); … … 2172 2253 2173 2254 // 2174 // Enable AE before accessing any AHCI registers2175 //2176 AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);2177 2178 //2179 2255 // Collect AHCI controller information 2180 2256 // 2181 Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET); 2182 2257 Capability = AhciReadReg (PciIo, EFI_AHCI_CAPABILITY_OFFSET); 2258 2259 // 2260 // Enable AE before accessing any AHCI registers if Supports AHCI Mode Only is not set 2261 // 2262 if ((Capability & EFI_AHCI_CAP_SAM) == 0) { 2263 AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE); 2264 } 2265 2183 2266 // 2184 2267 // Get the number of command slots per port supported by this HBA. … … 2199 2282 } 2200 2283 2201 for (Port = 0; Port < MaxPortNumber; Port ++) {2284 for (Port = 0; Port < EFI_AHCI_MAX_PORTS; Port ++) { 2202 2285 if ((PortImplementBitMap & (BIT0 << Port)) != 0) { 2286 // 2287 // According to AHCI spec, MaxPortNumber should be equal or greater than the number of implemented ports. 2288 // 2289 if ((MaxPortNumber--) == 0) { 2290 // 2291 // Should never be here. 2292 // 2293 ASSERT (FALSE); 2294 return EFI_SUCCESS; 2295 } 2296 2203 2297 IdeInit->NotifyPhase (IdeInit, EfiIdeBeforeChannelEnumeration, Port); 2204 2298 … … 2279 2373 // 2280 2374 // No device detected at this port. 2375 // Clear PxCMD.SUD for those ports at which there are no device present. 2281 2376 // 2377 Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; 2378 AhciAndReg (PciIo, Offset, (UINT32) ~(EFI_AHCI_PORT_CMD_SUD)); 2282 2379 continue; 2283 2380 } … … 2350 2447 // If the device is a hard disk, then try to enable S.M.A.R.T feature 2351 2448 // 2352 if ( DeviceType == EfiIdeHarddisk) {2449 if ((DeviceType == EfiIdeHarddisk) && PcdGetBool (PcdAtaSmartEnable)) { 2353 2450 AhciAtaSmartSupport ( 2354 2451 PciIo, -
trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
r48674 r58459 2 2 Header file for AHCI mode of ATA host controller. 3 3 4 Copyright (c) 2010 - 201 1, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR> 5 5 This program and the accompanying materials 6 6 are licensed and made available under the terms and conditions of the BSD License … … 18 18 19 19 #define EFI_AHCI_CAPABILITY_OFFSET 0x0000 20 #define EFI_AHCI_CAP_SAM BIT18 20 21 #define EFI_AHCI_CAP_SSS BIT27 21 22 #define EFI_AHCI_CAP_S64A BIT31 … … 26 27 #define EFI_AHCI_IS_OFFSET 0x0008 27 28 #define EFI_AHCI_PI_OFFSET 0x000C 29 30 #define EFI_AHCI_MAX_PORTS 32 28 31 29 32 typedef struct { -
trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
r48674 r58459 3 3 for managed ATA controllers. 4 4 5 Copyright (c) 2010 - 201 2, Intel Corporation. All rights reserved.<BR>5 Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR> 6 6 This program and the accompanying materials 7 7 are licensed and made available under the terms and conditions of the BSD License … … 111 111 MESSAGING_DEVICE_PATH, 112 112 MSG_ATAPI_DP, 113 (UINT8) (sizeof (ATAPI_DEVICE_PATH)), 114 (UINT8) ((sizeof (ATAPI_DEVICE_PATH)) >> 8), 113 { 114 (UINT8) (sizeof (ATAPI_DEVICE_PATH)), 115 (UINT8) ((sizeof (ATAPI_DEVICE_PATH)) >> 8) 116 } 115 117 }, 116 118 0, … … 123 125 MESSAGING_DEVICE_PATH, 124 126 MSG_SATA_DP, 125 (UINT8) (sizeof (SATA_DEVICE_PATH)), 126 (UINT8) ((sizeof (SATA_DEVICE_PATH)) >> 8), 127 { 128 (UINT8) (sizeof (SATA_DEVICE_PATH)), 129 (UINT8) ((sizeof (SATA_DEVICE_PATH)) >> 8) 130 } 127 131 }, 128 132 0, … … 714 718 ); 715 719 if (!EFI_ERROR (Status)) { 716 Supports &= EFI_PCI_DEVICE_ENABLE;720 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE; 717 721 Status = PciIo->Attributes ( 718 722 PciIo, … … 867 871 Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (AtaPassThru); 868 872 869 // 870 // Close Non-Blocking timer and free Task list. 871 // 872 if (Instance->TimerEvent != NULL) { 873 gBS->CloseEvent (Instance->TimerEvent); 874 Instance->TimerEvent = NULL; 875 } 876 DestroyAsynTaskList (Instance, FALSE); 877 878 // 879 // Disable this ATA host controller. 880 // 881 PciIo = Instance->PciIo; 882 Status = PciIo->Attributes ( 883 PciIo, 884 EfiPciIoAttributeOperationSupported, 885 0, 886 &Supports 887 ); 888 if (!EFI_ERROR (Status)) { 889 Supports &= EFI_PCI_DEVICE_ENABLE; 890 PciIo->Attributes ( 891 PciIo, 892 EfiPciIoAttributeOperationDisable, 893 Supports, 894 NULL 895 ); 896 } 897 898 // 899 // Restore original PCI attributes 900 // 901 Status = PciIo->Attributes ( 902 PciIo, 903 EfiPciIoAttributeOperationSet, 904 Instance->OriginalPciAttributes, 905 NULL 906 ); 907 ASSERT_EFI_ERROR (Status); 908 909 gBS->UninstallMultipleProtocolInterfaces ( 910 Controller, 911 &gEfiAtaPassThruProtocolGuid, &(Instance->AtaPassThru), 912 &gEfiExtScsiPassThruProtocolGuid, &(Instance->ExtScsiPassThru), 913 NULL 914 ); 873 Status = gBS->UninstallMultipleProtocolInterfaces ( 874 Controller, 875 &gEfiAtaPassThruProtocolGuid, &(Instance->AtaPassThru), 876 &gEfiExtScsiPassThruProtocolGuid, &(Instance->ExtScsiPassThru), 877 NULL 878 ); 879 880 if (EFI_ERROR (Status)) { 881 return EFI_DEVICE_ERROR; 882 } 915 883 916 884 // … … 925 893 926 894 // 895 // Close Non-Blocking timer and free Task list. 896 // 897 if (Instance->TimerEvent != NULL) { 898 gBS->CloseEvent (Instance->TimerEvent); 899 Instance->TimerEvent = NULL; 900 } 901 DestroyAsynTaskList (Instance, FALSE); 902 // 927 903 // Free allocated resource 928 904 // 929 DestroyDeviceInfoList (Instance);905 DestroyDeviceInfoList (Instance); 930 906 931 907 // … … 933 909 // for AHCI initialization should be released. 934 910 // 911 PciIo = Instance->PciIo; 912 935 913 if (Instance->Mode == EfiAtaAhciMode) { 936 914 AhciRegisters = &Instance->AhciRegisters; … … 963 941 ); 964 942 } 943 944 // 945 // Disable this ATA host controller. 946 // 947 Status = PciIo->Attributes ( 948 PciIo, 949 EfiPciIoAttributeOperationSupported, 950 0, 951 &Supports 952 ); 953 if (!EFI_ERROR (Status)) { 954 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE; 955 PciIo->Attributes ( 956 PciIo, 957 EfiPciIoAttributeOperationDisable, 958 Supports, 959 NULL 960 ); 961 } 962 963 // 964 // Restore original PCI attributes 965 // 966 Status = PciIo->Attributes ( 967 PciIo, 968 EfiPciIoAttributeOperationSet, 969 Instance->OriginalPciAttributes, 970 NULL 971 ); 972 ASSERT_EFI_ERROR (Status); 973 965 974 FreePool (Instance); 966 975 … … 1262 1271 } 1263 1272 1273 Node = SearchDeviceInfoList (Instance, Port, PortMultiplierPort, EfiIdeHarddisk); 1274 1275 if (Node == NULL) { 1276 Node = SearchDeviceInfoList(Instance, Port, PortMultiplierPort, EfiIdeCdrom); 1277 if (Node == NULL) { 1278 return EFI_INVALID_PARAMETER; 1279 } 1280 } 1281 1264 1282 // 1265 1283 // convert the transfer length from sector count to byte. … … 1276 1294 (Packet->OutTransferLength != 0)) { 1277 1295 Packet->OutTransferLength = Packet->OutTransferLength * 0x200; 1278 }1279 1280 Node = SearchDeviceInfoList (Instance, Port, PortMultiplierPort, EfiIdeHarddisk);1281 1282 if (Node == NULL) {1283 return EFI_INVALID_PARAMETER;1284 1296 } 1285 1297 … … 1328 1340 Task->Event = Event; 1329 1341 Task->IsStart = FALSE; 1330 Task->RetryTimes = 0; 1342 Task->RetryTimes = DivU64x32(Packet->Timeout, 1000) + 1; 1343 if (Packet->Timeout == 0) { 1344 Task->InfiniteWait = TRUE; 1345 } else { 1346 Task->InfiniteWait = FALSE; 1347 } 1331 1348 1332 1349 OldTpl = gBS->RaiseTPL (TPL_NOTIFY); … … 1758 1775 ) 1759 1776 { 1760 return EFI_UNSUPPORTED; 1777 // 1778 // Return success directly then upper layer driver could think reset port operation is done. 1779 // 1780 return EFI_SUCCESS; 1761 1781 } 1762 1782 … … 1800 1820 ) 1801 1821 { 1802 return EFI_UNSUPPORTED; 1822 ATA_ATAPI_PASS_THRU_INSTANCE *Instance; 1823 LIST_ENTRY *Node; 1824 1825 Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); 1826 1827 Node = SearchDeviceInfoList (Instance, Port, PortMultiplierPort, EfiIdeHarddisk); 1828 1829 if (Node == NULL) { 1830 return EFI_INVALID_PARAMETER; 1831 } 1832 1833 // 1834 // Return success directly then upper layer driver could think reset device operation is done. 1835 // 1836 return EFI_SUCCESS; 1837 } 1838 1839 /** 1840 Sumbit ATAPI request sense command. 1841 1842 @param[in] This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. 1843 @param[in] Target The Target is an array of size TARGET_MAX_BYTES and it represents 1844 the id of the SCSI device to send the SCSI Request Packet. Each 1845 transport driver may choose to utilize a subset of this size to suit the needs 1846 of transport target representation. For example, a Fibre Channel driver 1847 may use only 8 bytes (WWN) to represent an FC target. 1848 @param[in] Lun The LUN of the SCSI device to send the SCSI Request Packet. 1849 @param[in] SenseData A pointer to store sense data. 1850 @param[in] SenseDataLength The sense data length. 1851 @param[in] Timeout The timeout value to execute this cmd, uses 100ns as a unit. 1852 1853 @retval EFI_SUCCESS Send out the ATAPI packet command successfully. 1854 @retval EFI_DEVICE_ERROR The device failed to send data. 1855 1856 **/ 1857 EFI_STATUS 1858 EFIAPI 1859 AtaPacketRequestSense ( 1860 IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, 1861 IN UINT8 *Target, 1862 IN UINT64 Lun, 1863 IN VOID *SenseData, 1864 IN UINT8 SenseDataLength, 1865 IN UINT64 Timeout 1866 ) 1867 { 1868 EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET Packet; 1869 UINT8 Cdb[12]; 1870 EFI_STATUS Status; 1871 1872 ZeroMem (&Packet, sizeof (EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET)); 1873 ZeroMem (Cdb, 12); 1874 1875 Cdb[0] = ATA_CMD_REQUEST_SENSE; 1876 Cdb[4] = SenseDataLength; 1877 1878 Packet.Timeout = Timeout; 1879 Packet.Cdb = Cdb; 1880 Packet.CdbLength = 12; 1881 Packet.DataDirection = EFI_EXT_SCSI_DATA_DIRECTION_READ; 1882 Packet.InDataBuffer = SenseData; 1883 Packet.InTransferLength = SenseDataLength; 1884 1885 Status = ExtScsiPassThruPassThru (This, Target, Lun, &Packet, NULL); 1886 1887 return Status; 1803 1888 } 1804 1889 … … 1861 1946 LIST_ENTRY *Node; 1862 1947 EFI_ATA_DEVICE_INFO *DeviceInfo; 1863 1864 Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); 1948 BOOLEAN SenseReq; 1949 EFI_SCSI_SENSE_DATA *PtrSenseData; 1950 UINTN SenseDataLen; 1951 EFI_STATUS SenseStatus; 1952 1953 SenseDataLen = 0; 1954 Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); 1865 1955 1866 1956 if ((Packet == NULL) || (Packet->Cdb == NULL)) { … … 1873 1963 if ((Packet->CdbLength != 6) && (Packet->CdbLength != 10) && 1874 1964 (Packet->CdbLength != 12) && (Packet->CdbLength != 16)) { 1965 return EFI_INVALID_PARAMETER; 1966 } 1967 1968 if ((Packet->SenseDataLength != 0) && (Packet->SenseData == NULL)) { 1875 1969 return EFI_INVALID_PARAMETER; 1876 1970 } … … 1923 2017 if (*((UINT8*)Packet->Cdb) == ATA_CMD_IDENTIFY_DEVICE) { 1924 2018 CopyMem (Packet->InDataBuffer, DeviceInfo->IdentifyData, sizeof (EFI_IDENTIFY_DATA)); 2019 // 2020 // For IDENTIFY DEVICE cmd, we don't need to get sense data. 2021 // 2022 Packet->SenseDataLength = 0; 1925 2023 return EFI_SUCCESS; 1926 2024 } … … 1948 2046 } 1949 2047 2048 // 2049 // If the cmd doesn't get executed correctly, then check sense data. 2050 // 2051 if (EFI_ERROR (Status) && (Packet->SenseDataLength != 0) && (*((UINT8*)Packet->Cdb) != ATA_CMD_REQUEST_SENSE)) { 2052 PtrSenseData = AllocateAlignedPages (EFI_SIZE_TO_PAGES (sizeof (EFI_SCSI_SENSE_DATA)), This->Mode->IoAlign); 2053 if (PtrSenseData == NULL) { 2054 return EFI_DEVICE_ERROR; 2055 } 2056 2057 for (SenseReq = TRUE; SenseReq;) { 2058 SenseStatus = AtaPacketRequestSense ( 2059 This, 2060 Target, 2061 Lun, 2062 PtrSenseData, 2063 sizeof (EFI_SCSI_SENSE_DATA), 2064 Packet->Timeout 2065 ); 2066 if (EFI_ERROR (SenseStatus)) { 2067 break; 2068 } 2069 2070 CopyMem ((UINT8*)Packet->SenseData + SenseDataLen, PtrSenseData, sizeof (EFI_SCSI_SENSE_DATA)); 2071 SenseDataLen += sizeof (EFI_SCSI_SENSE_DATA); 2072 2073 // 2074 // no more sense key or number of sense keys exceeds predefined, 2075 // skip the loop. 2076 // 2077 if ((PtrSenseData->Sense_Key == EFI_SCSI_SK_NO_SENSE) || 2078 (SenseDataLen + sizeof (EFI_SCSI_SENSE_DATA) > Packet->SenseDataLength)) { 2079 SenseReq = FALSE; 2080 } 2081 } 2082 FreeAlignedPages (PtrSenseData, EFI_SIZE_TO_PAGES (sizeof (EFI_SCSI_SENSE_DATA))); 2083 } 2084 // 2085 // Update the SenseDataLength field to the data length received. 2086 // 2087 Packet->SenseDataLength = (UINT8)SenseDataLen; 1950 2088 return Status; 1951 2089 } … … 2268 2406 ) 2269 2407 { 2270 return EFI_UNSUPPORTED; 2408 // 2409 // Return success directly then upper layer driver could think reset channel operation is done. 2410 // 2411 return EFI_SUCCESS; 2271 2412 } 2272 2413 … … 2298 2439 ) 2299 2440 { 2300 return EFI_UNSUPPORTED; 2441 ATA_ATAPI_PASS_THRU_INSTANCE *Instance; 2442 LIST_ENTRY *Node; 2443 UINT8 Port; 2444 UINT8 PortMultiplier; 2445 2446 Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); 2447 // 2448 // For ATAPI device, doesn't support multiple LUN device. 2449 // 2450 if (Lun != 0) { 2451 return EFI_INVALID_PARAMETER; 2452 } 2453 // 2454 // The layout of Target array: 2455 // ________________________________________________________________________ 2456 // | Byte 0 | Byte 1 | ... | TARGET_MAX_BYTES - 1 | 2457 // |_____________________|_____________________|_____|______________________| 2458 // | | The port multiplier | | | 2459 // | The port number | port number | N/A | N/A | 2460 // |_____________________|_____________________|_____|______________________| 2461 // 2462 // For ATAPI device, 2 bytes is enough to represent the location of SCSI device. 2463 // 2464 Port = Target[0]; 2465 PortMultiplier = Target[1]; 2466 2467 Node = SearchDeviceInfoList(Instance, Port, PortMultiplier, EfiIdeCdrom); 2468 if (Node == NULL) { 2469 return EFI_INVALID_PARAMETER; 2470 } 2471 2472 // 2473 // Return success directly then upper layer driver could think reset target LUN operation is done. 2474 // 2475 return EFI_SUCCESS; 2301 2476 } 2302 2477 -
trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h
r48674 r58459 136 136 EFI_EVENT Event; 137 137 UINT64 RetryTimes; 138 VOID *Map; // Pointer to map. 139 VOID *TableMap;// Pointer to PRD table map. 138 BOOLEAN InfiniteWait; 139 VOID *Map; // Pointer to map. 140 VOID *TableMap; // Pointer to PRD table map. 140 141 EFI_ATA_DMA_PRD *MapBaseAddress; // Pointer to range Base address for Map. 141 UINTN PageCount; // The page numbers used by PCIO freebuffer.142 UINTN PageCount; // The page numbers used by PCIO freebuffer. 142 143 }; 143 144 -
trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
r48674 r58459 5 5 # to access to all attached Ata/Atapi devices. 6 6 # 7 # Copyright (c) 2010 - 201 1, Intel Corporation. All rights reserved.<BR>7 # Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR> 8 8 # 9 9 # This program and the accompanying materials … … 19 19 INF_VERSION = 0x00010005 20 20 BASE_NAME = AtaAtapiPassThruDxe 21 MODULE_UNI_FILE = AtaAtapiPassThruDxe.uni 21 22 FILE_GUID = 5E523CB4-D397-4986-87BD-A6DD8B22F455 22 23 MODULE_TYPE = UEFI_DRIVER … … 59 60 TimerLib 60 61 ReportStatusCodeLib 62 PcdLib 61 63 62 64 [Protocols] 63 gEfiAtaPassThruProtocolGuid # BY_START 64 gEfiExtScsiPassThruProtocolGuid # BY_START 65 gEfiIdeControllerInitProtocolGuid # TO_START 66 gEfiDevicePathProtocolGuid # TO_START 67 gEfiPciIoProtocolGuid # TO_START 65 gEfiAtaPassThruProtocolGuid ## BY_START 66 gEfiExtScsiPassThruProtocolGuid ## BY_START 67 gEfiIdeControllerInitProtocolGuid ## TO_START 68 gEfiDevicePathProtocolGuid ## TO_START 69 gEfiPciIoProtocolGuid ## TO_START 70 71 [Pcd] 72 gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable ## SOMETIMES_CONSUMES 73 74 # [Event] 75 # EVENT_TYPE_PERIODIC_TIMER ## SOMETIMES_CONSUMES 76 77 [UserExtensions.TianoCore."ExtraFiles"] 78 AtaAtapiPassThruDxeExtra.uni -
trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
r48674 r58459 2 2 Header file for AHCI mode of ATA host controller. 3 3 4 Copyright (c) 2010 - 201 1, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR> 5 5 This program and the accompanying materials 6 6 are licensed and made available under the terms and conditions of the BSD License … … 354 354 ) 355 355 { 356 UINT 32Delay;356 UINT64 Delay; 357 357 UINT8 StatusRegister; 358 BOOLEAN InfiniteWait; 358 359 359 360 ASSERT (PciIo != NULL); 360 361 ASSERT (IdeRegisters != NULL); 361 362 362 Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); 363 if (Timeout == 0) { 364 InfiniteWait = TRUE; 365 } else { 366 InfiniteWait = FALSE; 367 } 368 369 Delay = DivU64x32(Timeout, 1000) + 1; 363 370 do { 364 371 StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); … … 382 389 Delay--; 383 390 384 } while ( Delay > 0);391 } while (InfiniteWait || (Delay > 0)); 385 392 386 393 return EFI_TIMEOUT; … … 410 417 ) 411 418 { 412 UINT 32Delay;419 UINT64 Delay; 413 420 UINT8 AltRegister; 421 BOOLEAN InfiniteWait; 414 422 415 423 ASSERT (PciIo != NULL); 416 424 ASSERT (IdeRegisters != NULL); 417 425 418 Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); 426 if (Timeout == 0) { 427 InfiniteWait = TRUE; 428 } else { 429 InfiniteWait = FALSE; 430 } 431 432 Delay = DivU64x32(Timeout, 1000) + 1; 419 433 do { 420 434 AltRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); … … 438 452 Delay--; 439 453 440 } while ( Delay > 0);454 } while (InfiniteWait || (Delay > 0)); 441 455 442 456 return EFI_TIMEOUT; … … 469 483 ) 470 484 { 471 UINT 32Delay;485 UINT64 Delay; 472 486 UINT8 StatusRegister; 473 487 UINT8 ErrorRegister; 488 BOOLEAN InfiniteWait; 474 489 475 490 ASSERT (PciIo != NULL); 476 491 ASSERT (IdeRegisters != NULL); 477 492 478 Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); 493 if (Timeout == 0) { 494 InfiniteWait = TRUE; 495 } else { 496 InfiniteWait = FALSE; 497 } 498 499 Delay = DivU64x32(Timeout, 1000) + 1; 479 500 do { 480 501 // … … 509 530 510 531 Delay--; 511 } while ( Delay > 0);532 } while (InfiniteWait || (Delay > 0)); 512 533 513 534 return EFI_TIMEOUT; … … 536 557 ) 537 558 { 538 UINT 32Delay;559 UINT64 Delay; 539 560 UINT8 AltRegister; 540 561 UINT8 ErrorRegister; 562 BOOLEAN InfiniteWait; 541 563 542 564 ASSERT (PciIo != NULL); 543 565 ASSERT (IdeRegisters != NULL); 544 566 545 Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); 567 if (Timeout == 0) { 568 InfiniteWait = TRUE; 569 } else { 570 InfiniteWait = FALSE; 571 } 572 573 Delay = DivU64x32(Timeout, 1000) + 1; 546 574 547 575 do { … … 576 604 577 605 Delay--; 578 } while ( Delay > 0);606 } while (InfiniteWait || (Delay > 0)); 579 607 580 608 return EFI_TIMEOUT; … … 603 631 ) 604 632 { 605 UINT 32Delay;633 UINT64 Delay; 606 634 UINT8 StatusRegister; 607 635 UINT8 ErrorRegister; 636 BOOLEAN InfiniteWait; 608 637 609 638 ASSERT (PciIo != NULL); 610 639 ASSERT (IdeRegisters != NULL); 611 640 612 Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); 641 if (Timeout == 0) { 642 InfiniteWait = TRUE; 643 } else { 644 InfiniteWait = FALSE; 645 } 646 647 Delay = DivU64x32(Timeout, 1000) + 1; 613 648 do { 614 649 StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); … … 639 674 640 675 Delay--; 641 } while ( Delay > 0);676 } while (InfiniteWait || (Delay > 0)); 642 677 643 678 return EFI_TIMEOUT; … … 667 702 ) 668 703 { 669 UINT 32Delay;704 UINT64 Delay; 670 705 UINT8 AltRegister; 671 706 UINT8 ErrorRegister; 707 BOOLEAN InfiniteWait; 672 708 673 709 ASSERT (PciIo != NULL); 674 710 ASSERT (IdeRegisters != NULL); 675 711 676 Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); 712 if (Timeout == 0) { 713 InfiniteWait = TRUE; 714 } else { 715 InfiniteWait = FALSE; 716 } 717 718 Delay = DivU64x32(Timeout, 1000) + 1; 677 719 do { 678 720 AltRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); … … 703 745 704 746 Delay--; 705 } while ( Delay > 0);747 } while (InfiniteWait || (Delay > 0)); 706 748 707 749 return EFI_TIMEOUT; … … 729 771 ) 730 772 { 731 UINT 32Delay;773 UINT64 Delay; 732 774 UINT8 StatusRegister; 775 BOOLEAN InfiniteWait; 733 776 734 777 ASSERT (PciIo != NULL); 735 778 ASSERT (IdeRegisters != NULL); 736 779 737 Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); 780 if (Timeout == 0) { 781 InfiniteWait = TRUE; 782 } else { 783 InfiniteWait = FALSE; 784 } 785 786 Delay = DivU64x32(Timeout, 1000) + 1; 738 787 do { 739 788 StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); … … 750 799 Delay--; 751 800 752 } while ( Delay > 0);801 } while (InfiniteWait || (Delay > 0)); 753 802 754 803 return EFI_TIMEOUT; … … 776 825 ) 777 826 { 778 UINT 32Delay;827 UINT64 Delay; 779 828 UINT8 AltStatusRegister; 829 BOOLEAN InfiniteWait; 780 830 781 831 ASSERT (PciIo != NULL); 782 832 ASSERT (IdeRegisters != NULL); 783 833 784 Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); 834 if (Timeout == 0) { 835 InfiniteWait = TRUE; 836 } else { 837 InfiniteWait = FALSE; 838 } 839 840 Delay = DivU64x32(Timeout, 1000) + 1; 785 841 do { 786 842 AltStatusRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); … … 797 853 Delay--; 798 854 799 } while ( Delay > 0);855 } while (InfiniteWait || (Delay > 0)); 800 856 801 857 return EFI_TIMEOUT; … … 1313 1369 @param[in] PciIo The PCI IO protocol instance. 1314 1370 @param[in] IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. 1371 @param[in] Timeout The time to complete the command, uses 100ns as a unit. 1315 1372 1316 1373 @retval EFI_DEVICE_ERROR The memory is not set. … … 1321 1378 EFI_STATUS 1322 1379 AtaUdmStatusWait ( 1323 IN EFI_PCI_IO_PROTOCOL *PciIo, 1324 IN EFI_IDE_REGISTERS *IdeRegisters 1380 IN EFI_PCI_IO_PROTOCOL *PciIo, 1381 IN EFI_IDE_REGISTERS *IdeRegisters, 1382 IN UINT64 Timeout 1325 1383 ) 1326 1384 { … … 1328 1386 EFI_STATUS Status; 1329 1387 UINT16 IoPortForBmis; 1330 UINT64 Timeout; 1331 1332 Timeout = 2000; 1333 1334 while (TRUE) { 1388 UINT64 Delay; 1389 BOOLEAN InfiniteWait; 1390 1391 if (Timeout == 0) { 1392 InfiniteWait = TRUE; 1393 } else { 1394 InfiniteWait = FALSE; 1395 } 1396 1397 Delay = DivU64x32 (Timeout, 1000) + 1; 1398 1399 do { 1335 1400 Status = CheckStatusRegister (PciIo, IdeRegisters); 1336 1401 if (EFI_ERROR (Status)) { … … 1352 1417 } 1353 1418 // 1354 // Stall for 1 milliseconds.1355 // 1356 MicroSecondDelay (100 0);1357 Timeout--;1358 } 1419 // Stall for 100 microseconds. 1420 // 1421 MicroSecondDelay (100); 1422 Delay--; 1423 } while (InfiniteWait || (Delay > 0)); 1359 1424 1360 1425 return Status; … … 1405 1470 } 1406 1471 1407 if ( Task->RetryTimes == 0) {1472 if (!Task->InfiniteWait && (Task->RetryTimes == 0)) { 1408 1473 return EFI_TIMEOUT; 1409 1474 } else { … … 1665 1730 1666 1731 if (Task != NULL) { 1667 //1668 // Max transfer number of sectors for one command is 65536(32Mbyte),1669 // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).1670 // So set the variable Count to 2000, for about 2 second Timeout time.1671 //1672 Task->RetryTimes = 2000;1673 1732 Task->Map = BufferMap; 1674 1733 Task->TableMap = PrdTableMap; … … 1704 1763 // 1705 1764 // Check the INTERRUPT and ERROR bit of BMIS 1706 // Max transfer number of sectors for one command is 65536(32Mbyte),1707 // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).1708 // So set the variable Count to 2000, for about 2 second Timeout time.1709 1765 // 1710 1766 if (Task != NULL) { 1711 1767 Status = AtaUdmStatusCheck (PciIo, Task, IdeRegisters); 1712 1768 } else { 1713 Status = AtaUdmStatusWait (PciIo, IdeRegisters );1769 Status = AtaUdmStatusWait (PciIo, IdeRegisters, Timeout); 1714 1770 } 1715 1771 … … 1943 1999 1944 2000 /** 1945 Sumbit ATAPI request sense command.1946 1947 @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance1948 @param[in] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to1949 store the IDE i/o port registers' base addresses1950 @param[in] Channel The channel number of device.1951 @param[in] Device The device number of device.1952 @param[in] SenseData A pointer to store sense data.1953 @param[in] SenseDataLength The sense data length.1954 @param[in] Timeout The timeout value to execute this cmd, uses 100ns as a unit.1955 1956 @retval EFI_SUCCESS Send out the ATAPI packet command successfully.1957 @retval EFI_DEVICE_ERROR The device failed to send data.1958 1959 **/1960 EFI_STATUS1961 EFIAPI1962 AtaPacketRequestSense (1963 IN EFI_PCI_IO_PROTOCOL *PciIo,1964 IN EFI_IDE_REGISTERS *IdeRegisters,1965 IN UINT8 Channel,1966 IN UINT8 Device,1967 IN VOID *SenseData,1968 IN UINT8 SenseDataLength,1969 IN UINT64 Timeout1970 )1971 {1972 EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET Packet;1973 UINT8 Cdb[12];1974 EFI_STATUS Status;1975 1976 ZeroMem (&Packet, sizeof (EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET));1977 ZeroMem (Cdb, 12);1978 1979 Cdb[0] = ATA_CMD_REQUEST_SENSE;1980 Cdb[4] = SenseDataLength;1981 1982 Packet.Timeout = Timeout;1983 Packet.Cdb = Cdb;1984 Packet.CdbLength = 12;1985 Packet.DataDirection = EFI_EXT_SCSI_DATA_DIRECTION_READ;1986 Packet.InDataBuffer = SenseData;1987 Packet.InTransferLength = SenseDataLength;1988 1989 Status = AtaPacketCommandExecute (PciIo, IdeRegisters, Channel, Device, &Packet);1990 1991 return Status;1992 }1993 1994 /**1995 2001 This function is used to send out ATAPI commands conforms to the Packet Command 1996 2002 with PIO Data In Protocol. … … 2018 2024 ) 2019 2025 { 2020 EFI_STATUS PacketCommandStatus;2021 2026 EFI_ATA_COMMAND_BLOCK AtaCommandBlock; 2022 2027 EFI_STATUS Status; … … 2084 2089 // 2085 2090 if (Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_READ) { 2086 PacketCommandStatus = AtaPacketReadWrite (2087 2088 2089 2090 2091 2092 2093 2091 Status = AtaPacketReadWrite ( 2092 PciIo, 2093 IdeRegisters, 2094 Packet->InDataBuffer, 2095 Packet->InTransferLength, 2096 TRUE, 2097 Packet->Timeout 2098 ); 2094 2099 } else { 2095 PacketCommandStatus = AtaPacketReadWrite ( 2096 PciIo, 2097 IdeRegisters, 2098 Packet->OutDataBuffer, 2099 Packet->OutTransferLength, 2100 FALSE, 2101 Packet->Timeout 2102 ); 2103 } 2104 2105 if (!EFI_ERROR (PacketCommandStatus)) { 2106 return PacketCommandStatus; 2107 } 2108 2109 // 2110 // Return SenseData if PacketCommandStatus matches 2111 // the following return codes. 2112 // 2113 if ((PacketCommandStatus == EFI_BAD_BUFFER_SIZE) || 2114 (PacketCommandStatus == EFI_DEVICE_ERROR) || 2115 (PacketCommandStatus == EFI_TIMEOUT)) { 2116 2117 // 2118 // avoid submit request sense command continuously. 2119 // 2120 if ((Packet->SenseData == NULL) || (((UINT8 *)Packet->Cdb)[0] == ATA_CMD_REQUEST_SENSE)) { 2121 return PacketCommandStatus; 2122 } 2123 2124 AtaPacketRequestSense ( 2125 PciIo, 2126 IdeRegisters, 2127 Channel, 2128 Device, 2129 Packet->SenseData, 2130 Packet->SenseDataLength, 2131 Packet->Timeout 2132 ); 2133 } 2134 2135 return PacketCommandStatus; 2100 Status = AtaPacketReadWrite ( 2101 PciIo, 2102 IdeRegisters, 2103 Packet->OutDataBuffer, 2104 Packet->OutTransferLength, 2105 FALSE, 2106 Packet->Timeout 2107 ); 2108 } 2109 2110 return Status; 2136 2111 } 2137 2112 … … 2297 2272 2298 2273 if (EFI_ERROR (Status)) { 2274 REPORT_STATUS_CODE ( 2275 EFI_ERROR_CODE | EFI_ERROR_MINOR, 2276 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLED) 2277 ); 2299 2278 return EFI_DEVICE_ERROR; 2300 2279 } 2280 2281 REPORT_STATUS_CODE ( 2282 EFI_PROGRESS_CODE, 2283 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_ENABLE) 2284 ); 2301 2285 2302 2286 LBAMid = IdeReadPortB (Instance->PciIo, Instance->IdeRegisters[Channel].CylinderLsb); … … 2308 2292 // 2309 2293 DEBUG ((EFI_D_INFO, "The S.M.A.R.T threshold exceeded condition is not detected\n")); 2310 2294 REPORT_STATUS_CODE ( 2295 EFI_PROGRESS_CODE, 2296 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD) 2297 ); 2311 2298 } else if ((LBAMid == 0xf4) && (LBAHigh == 0x2c)) { 2312 2299 // … … 2314 2301 // 2315 2302 DEBUG ((EFI_D_INFO, "The S.M.A.R.T threshold exceeded condition is detected\n")); 2303 REPORT_STATUS_CODE ( 2304 EFI_PROGRESS_CODE, 2305 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD) 2306 ); 2316 2307 } 2317 2308 … … 2351 2342 DEBUG ((EFI_D_INFO, "S.M.A.R.T feature is not supported at [%a] channel [%a] device!\n", 2352 2343 (Channel == 1) ? "secondary" : "primary", (Device == 1) ? "slave" : "master")); 2344 REPORT_STATUS_CODE ( 2345 EFI_ERROR_CODE | EFI_ERROR_MINOR, 2346 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED) 2347 ); 2353 2348 } else { 2354 2349 // … … 2356 2351 // 2357 2352 if ((IdentifyData->AtaData.command_set_feature_enb_85 & 0x0001) != 0x0001) { 2353 2354 REPORT_STATUS_CODE ( 2355 EFI_PROGRESS_CODE, 2356 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLE) 2357 ); 2358 2358 2359 2359 ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); … … 2668 2668 // If the device is a hard disk, then try to enable S.M.A.R.T feature 2669 2669 // 2670 if ( DeviceType == EfiIdeHarddisk) {2670 if ((DeviceType == EfiIdeHarddisk) && PcdGetBool (PcdAtaSmartEnable)) { 2671 2671 IdeAtaSmartSupport ( 2672 2672 Instance, -
trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.c
r48674 r58459 5 5 Block IO protocol and DiskInfo protocol. 6 6 7 Copyright (c) 2009 - 201 2, Intel Corporation. All rights reserved.<BR>7 Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR> 8 8 This program and the accompanying materials 9 9 are licensed and made available under the terms and conditions of the BSD License … … 18 18 19 19 #include "AtaBus.h" 20 21 UINT8 mMorControl; 20 22 21 23 // … … 89 91 {L'\0', }, // ModelName 90 92 {NULL, NULL}, // AtaTaskList 91 {NULL, NULL} // AtaSubTaskList 93 {NULL, NULL}, // AtaSubTaskList 94 FALSE // Abort 92 95 }; 93 96 … … 171 174 DelEntry = Entry; 172 175 Entry = Entry->ForwardLink; 173 SubTask = ATA_A YNS_SUB_TASK_FROM_ENTRY (DelEntry);176 SubTask = ATA_ASYN_SUB_TASK_FROM_ENTRY (DelEntry); 174 177 175 178 RemoveEntryList (DelEntry); … … 186 189 DelEntry = Entry; 187 190 Entry = Entry->ForwardLink; 188 AtaTask = ATA_AYNS_TASK_FROM_ENTRY (DelEntry);191 AtaTask = ATA_ASYN_TASK_FROM_ENTRY (DelEntry); 189 192 190 193 RemoveEntryList (DelEntry); … … 292 295 InitializeListHead (&AtaDevice->AtaTaskList); 293 296 InitializeListHead (&AtaDevice->AtaSubTaskList); 297 298 // 299 // Report Status Code to indicate the ATA device will be enabled 300 // 301 REPORT_STATUS_CODE_WITH_DEVICE_PATH ( 302 EFI_PROGRESS_CODE, 303 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_ENABLE), 304 AtaBusDriverData->ParentDevicePath 305 ); 294 306 295 307 // … … 365 377 goto Done; 366 378 } 379 DEBUG ((EFI_D_INFO, "Successfully Install Storage Security Protocol on the ATA device\n")); 380 } 381 382 383 if (((mMorControl & 0x01) == 0x01) && ((AtaDevice->IdentifyData->trusted_computing_support & BIT0) != 0)) { 384 DEBUG ((EFI_D_INFO, 385 "mMorControl = %x, AtaDevice->IdentifyData->trusted_computing_support & BIT0 = %x\n", 386 mMorControl, 387 (AtaDevice->IdentifyData->trusted_computing_support & BIT0) 388 )); 389 DEBUG ((EFI_D_INFO, "Try to lock device by sending TPer Reset command...\n")); 390 InitiateTPerReset(AtaDevice); 367 391 } 368 392 … … 451 475 AtaDevice = ATA_DEVICE_FROM_BLOCK_IO (BlockIo); 452 476 } else { 477 ASSERT (BlockIo2 != NULL); 453 478 AtaDevice = ATA_DEVICE_FROM_BLOCK_IO2 (BlockIo2); 454 479 } … … 607 632 608 633 // 634 // Test to see if this ATA Pass Thru Protocol is for a LOGICAL channel 635 // 636 if ((AtaPassThru->Mode->Attributes & EFI_ATA_PASS_THRU_ATTRIBUTES_LOGICAL) == 0) { 637 // 638 // Close the I/O Abstraction(s) used to perform the supported test 639 // 640 gBS->CloseProtocol ( 641 Controller, 642 &gEfiAtaPassThruProtocolGuid, 643 This->DriverBindingHandle, 644 Controller 645 ); 646 return EFI_UNSUPPORTED; 647 } 648 649 // 609 650 // Test RemainingDevicePath is valid or not. 610 651 // … … 612 653 Status = AtaPassThru->GetDevice (AtaPassThru, RemainingDevicePath, &Port, &PortMultiplierPort); 613 654 if (EFI_ERROR (Status)) { 655 // 656 // Close the I/O Abstraction(s) used to perform the supported test 657 // 658 gBS->CloseProtocol ( 659 Controller, 660 &gEfiAtaPassThruProtocolGuid, 661 This->DriverBindingHandle, 662 Controller 663 ); 614 664 return Status; 615 665 } … … 705 755 } 706 756 757 // 758 // Report Status Code to indicate ATA bus starts 759 // 760 REPORT_STATUS_CODE_WITH_DEVICE_PATH ( 761 EFI_PROGRESS_CODE, 762 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_INIT), 763 ParentDevicePath 764 ); 765 707 766 Status = gBS->OpenProtocol ( 708 767 Controller, … … 756 815 } 757 816 } 817 818 // 819 // Report Status Code to indicate detecting devices on bus 820 // 821 REPORT_STATUS_CODE_WITH_DEVICE_PATH ( 822 EFI_PROGRESS_CODE, 823 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_DETECT), 824 ParentDevicePath 825 ); 758 826 759 827 if (RemainingDevicePath == NULL) { … … 1005 1073 1006 1074 if (BufferSize == 0) { 1075 if ((Token != NULL) && (Token->Event != NULL)) { 1076 Token->TransactionStatus = EFI_SUCCESS; 1077 gBS->SignalEvent (Token->Event); 1078 } 1007 1079 return EFI_SUCCESS; 1008 1080 } … … 1150 1222 1151 1223 AtaDevice = ATA_DEVICE_FROM_BLOCK_IO2 (This); 1224 1225 AtaTerminateNonBlockingTask (AtaDevice); 1152 1226 1153 1227 Status = ResetAtaDevice (AtaDevice); … … 1639 1713 { 1640 1714 EFI_STATUS Status; 1715 UINTN DataSize; 1641 1716 1642 1717 // … … 1653 1728 ASSERT_EFI_ERROR (Status); 1654 1729 1730 // 1731 // Get the MorControl bit. 1732 // 1733 DataSize = sizeof (mMorControl); 1734 Status = gRT->GetVariable ( 1735 MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME, 1736 &gEfiMemoryOverwriteControlDataGuid, 1737 NULL, 1738 &DataSize, 1739 &mMorControl 1740 ); 1741 1742 if (EFI_ERROR (Status)) { 1743 DEBUG ((EFI_D_INFO, "AtaBus:gEfiMemoryOverwriteControlDataGuid doesn't exist!!***\n")); 1744 mMorControl = 0; 1745 Status = EFI_SUCCESS; 1746 } else { 1747 DEBUG ((EFI_D_INFO, "AtaBus:Get the gEfiMemoryOverwriteControlDataGuid = %x!!***\n", mMorControl)); 1748 } 1749 1655 1750 return Status; 1656 1751 } 1752 1753 /** 1754 Send TPer Reset command to reset eDrive to lock all protected bands. 1755 Typically, there are 2 mechanism for resetting eDrive. They are: 1756 1. TPer Reset through IEEE 1667 protocol. 1757 2. TPer Reset through native TCG protocol. 1758 This routine will detect what protocol the attached eDrive comform to, TCG or 1759 IEEE 1667 protocol. Then send out TPer Reset command separately. 1760 1761 @param[in] AtaDevice ATA_DEVICE pointer. 1762 1763 **/ 1764 VOID 1765 InitiateTPerReset ( 1766 IN ATA_DEVICE *AtaDevice 1767 ) 1768 { 1769 1770 EFI_STATUS Status; 1771 UINT8 *Buffer; 1772 UINTN XferSize; 1773 UINTN Len; 1774 UINTN Index; 1775 BOOLEAN TcgFlag; 1776 BOOLEAN IeeeFlag; 1777 EFI_BLOCK_IO_PROTOCOL *BlockIo; 1778 EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *Ssp; 1779 SUPPORTED_SECURITY_PROTOCOLS_PARAMETER_DATA *Data; 1780 1781 Buffer = NULL; 1782 TcgFlag = FALSE; 1783 IeeeFlag = FALSE; 1784 Ssp = &AtaDevice->StorageSecurity; 1785 BlockIo = &AtaDevice->BlockIo; 1786 1787 // 1788 // ATA8-ACS 7.57.6.1 indicates the Transfer Length field requirements a multiple of 512. 1789 // If the length of the TRUSTED RECEIVE parameter data is greater than the Transfer Length, 1790 // then the device shall return the TRUSTED RECEIVE parameter data truncated to the requested Transfer Length. 1791 // 1792 Len = ROUNDUP512(sizeof(SUPPORTED_SECURITY_PROTOCOLS_PARAMETER_DATA)); 1793 Buffer = AllocateZeroPool(Len); 1794 1795 if (Buffer == NULL) { 1796 return; 1797 } 1798 1799 // 1800 // When the Security Protocol field is set to 00h, and SP Specific is set to 0000h in a TRUSTED RECEIVE 1801 // command, the device basic information data shall be returned. 1802 // 1803 Status = Ssp->ReceiveData ( 1804 Ssp, 1805 BlockIo->Media->MediaId, 1806 100000000, // Timeout 10-sec 1807 0, // SecurityProtocol 1808 0, // SecurityProtocolSpecifcData 1809 Len, // PayloadBufferSize, 1810 Buffer, // PayloadBuffer 1811 &XferSize 1812 ); 1813 if (EFI_ERROR (Status)) { 1814 goto Exit; 1815 } 1816 1817 // 1818 // In returned data, the ListLength field indicates the total length, in bytes, 1819 // of the supported security protocol list. 1820 // 1821 Data = (SUPPORTED_SECURITY_PROTOCOLS_PARAMETER_DATA*)Buffer; 1822 Len = ROUNDUP512(sizeof (SUPPORTED_SECURITY_PROTOCOLS_PARAMETER_DATA) + 1823 (Data->SupportedSecurityListLength[0] << 8) + 1824 (Data->SupportedSecurityListLength[1]) 1825 ); 1826 1827 // 1828 // Free original buffer and allocate new buffer. 1829 // 1830 FreePool(Buffer); 1831 Buffer = AllocateZeroPool(Len); 1832 if (Buffer == NULL) { 1833 return; 1834 } 1835 1836 // 1837 // Read full supported security protocol list from device. 1838 // 1839 Status = Ssp->ReceiveData ( 1840 Ssp, 1841 BlockIo->Media->MediaId, 1842 100000000, // Timeout 10-sec 1843 0, // SecurityProtocol 1844 0, // SecurityProtocolSpecifcData 1845 Len, // PayloadBufferSize, 1846 Buffer, // PayloadBuffer 1847 &XferSize 1848 ); 1849 1850 if (EFI_ERROR (Status)) { 1851 goto Exit; 1852 } 1853 1854 Data = (SUPPORTED_SECURITY_PROTOCOLS_PARAMETER_DATA*)Buffer; 1855 Len = (Data->SupportedSecurityListLength[0] << 8) + Data->SupportedSecurityListLength[1]; 1856 1857 // 1858 // Iterate full supported security protocol list to check if TCG or IEEE 1667 protocol 1859 // is supported. 1860 // 1861 for (Index = 0; Index < Len; Index++) { 1862 if (Data->SupportedSecurityProtocol[Index] == SECURITY_PROTOCOL_TCG) { 1863 // 1864 // Found a TCG device. 1865 // 1866 TcgFlag = TRUE; 1867 DEBUG ((EFI_D_INFO, "This device is a TCG protocol device\n")); 1868 break; 1869 } 1870 1871 if (Data->SupportedSecurityProtocol[Index] == SECURITY_PROTOCOL_IEEE1667) { 1872 // 1873 // Found a IEEE 1667 device. 1874 // 1875 IeeeFlag = TRUE; 1876 DEBUG ((EFI_D_INFO, "This device is a IEEE 1667 protocol device\n")); 1877 break; 1878 } 1879 } 1880 1881 if (!TcgFlag && !IeeeFlag) { 1882 DEBUG ((EFI_D_INFO, "Neither a TCG nor IEEE 1667 protocol device is found\n")); 1883 goto Exit; 1884 } 1885 1886 if (TcgFlag) { 1887 // 1888 // As long as TCG protocol is supported, send out a TPer Reset 1889 // TCG command to the device via the TrustedSend command with a non-zero Transfer Length. 1890 // 1891 Status = Ssp->SendData ( 1892 Ssp, 1893 BlockIo->Media->MediaId, 1894 100000000, // Timeout 10-sec 1895 SECURITY_PROTOCOL_TCG, // SecurityProtocol 1896 0x0400, // SecurityProtocolSpecifcData 1897 512, // PayloadBufferSize, 1898 Buffer // PayloadBuffer 1899 ); 1900 1901 if (!EFI_ERROR (Status)) { 1902 DEBUG ((EFI_D_INFO, "Send TPer Reset Command Successfully !\n")); 1903 } else { 1904 DEBUG ((EFI_D_INFO, "Send TPer Reset Command Fail !\n")); 1905 } 1906 } 1907 1908 if (IeeeFlag) { 1909 // 1910 // TBD : Perform a TPer Reset via IEEE 1667 Protocol 1911 // 1912 DEBUG ((EFI_D_INFO, "IEEE 1667 Protocol didn't support yet!\n")); 1913 } 1914 1915 Exit: 1916 1917 if (Buffer != NULL) { 1918 FreePool(Buffer); 1919 } 1920 } -
trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.h
r48674 r58459 5 5 internal function header files. 6 6 7 Copyright (c) 2009 - 201 2, Intel Corporation. All rights reserved.<BR>7 Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR> 8 8 This program and the accompanying materials 9 9 are licensed and made available under the terms and conditions of the BSD License … … 21 21 #include <Uefi.h> 22 22 23 #include <Guid/MemoryOverwriteControl.h> 23 24 #include <Protocol/AtaPassThru.h> 24 25 #include <Protocol/BlockIo.h> … … 36 37 #include <Library/UefiBootServicesTableLib.h> 37 38 #include <Library/DevicePathLib.h> 39 #include <Library/UefiRuntimeServicesTableLib.h> 38 40 #include <Library/TimerLib.h> 41 #include <Library/ReportStatusCodeLib.h> 39 42 40 43 #include <IndustryStandard/Atapi.h> … … 82 85 #define ATA_SUB_TASK_SIGNATURE SIGNATURE_32 ('A', 'S', 'T', 'S') 83 86 #define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0) 87 88 #define ROUNDUP512(x) (((x) % 512 == 0) ? (x) : ((x) / 512 + 1) * 512) 89 90 #define SECURITY_PROTOCOL_TCG 0x02 91 #define SECURITY_PROTOCOL_IEEE1667 0xEE 92 93 // 94 // ATA Supported Security Protocols List Description. 95 // Refer to ATA8-ACS Spec 7.57.6.2 Table 69. 96 // 97 typedef struct { 98 UINT8 Reserved1[6]; 99 UINT8 SupportedSecurityListLength[2]; 100 UINT8 SupportedSecurityProtocol[1]; 101 } SUPPORTED_SECURITY_PROTOCOLS_PARAMETER_DATA; 84 102 85 103 // … … 131 149 LIST_ENTRY AtaTaskList; 132 150 LIST_ENTRY AtaSubTaskList; 151 BOOLEAN Abort; 133 152 } ATA_DEVICE; 134 153 … … 164 183 #define ATA_DEVICE_FROM_DISK_INFO(a) CR (a, ATA_DEVICE, DiskInfo, ATA_DEVICE_SIGNATURE) 165 184 #define ATA_DEVICE_FROM_STORAGE_SECURITY(a) CR (a, ATA_DEVICE, StorageSecurity, ATA_DEVICE_SIGNATURE) 166 #define ATA_A YNS_SUB_TASK_FROM_ENTRY(a) CR (a, ATA_BUS_ASYN_SUB_TASK, TaskEntry, ATA_SUB_TASK_SIGNATURE)167 #define ATA_A YNS_TASK_FROM_ENTRY(a) CR (a, ATA_BUS_ASYN_TASK, TaskEntry, ATA_TASK_SIGNATURE)185 #define ATA_ASYN_SUB_TASK_FROM_ENTRY(a) CR (a, ATA_BUS_ASYN_SUB_TASK, TaskEntry, ATA_SUB_TASK_SIGNATURE) 186 #define ATA_ASYN_TASK_FROM_ENTRY(a) CR (a, ATA_BUS_ASYN_TASK, TaskEntry, ATA_TASK_SIGNATURE) 168 187 169 188 // … … 284 303 IN OUT EFI_BLOCK_IO2_TOKEN *Token 285 304 ); 305 286 306 /** 287 307 Trust transfer data from/to ATA device. … … 788 808 789 809 /** 810 Terminate any in-flight non-blocking I/O requests by signaling an EFI_ABORTED 811 in the TransactionStatus member of the EFI_BLOCK_IO2_TOKEN for the non-blocking 812 I/O. After that it is safe to free any Token or Buffer data structures that 813 were allocated to initiate the non-blockingI/O requests that were in-flight for 814 this device. 815 816 @param[in] AtaDevice The ATA child device involved for the operation. 817 818 **/ 819 VOID 820 EFIAPI 821 AtaTerminateNonBlockingTask ( 822 IN ATA_DEVICE *AtaDevice 823 ); 824 825 /** 790 826 Provides inquiry information for the controller type. 791 827 … … 923 959 function shall return EFI_DEVICE_ERROR. 924 960 925 @param This 926 @param MediaId 927 @param Timeout 961 @param This Indicates a pointer to the calling context. 962 @param MediaId ID of the medium to receive data from. 963 @param Timeout The timeout, in 100ns units, to use for the execution 928 964 of the security protocol command. A Timeout value of 0 929 965 means that this function will wait indefinitely for the 930 966 security protocol command to execute. If Timeout is greater 931 967 than zero, then this function will return EFI_TIMEOUT 932 933 968 if the time required to execute the receive data command 969 is greater than Timeout. 934 970 @param SecurityProtocolId The value of the "Security Protocol" parameter of 935 971 the security protocol command to be sent. 936 972 @param SecurityProtocolSpecificData The value of the "Security Protocol Specific" parameter 937 973 of the security protocol command to be sent. 938 @param PayloadBufferSize 974 @param PayloadBufferSize Size in bytes of the payload data buffer. 939 975 @param PayloadBuffer A pointer to a destination buffer to store the security 940 976 protocol command specific payload data for the security … … 1003 1039 shall return EFI_DEVICE_ERROR. 1004 1040 1005 @param This 1006 @param MediaId 1007 @param Timeout 1041 @param This Indicates a pointer to the calling context. 1042 @param MediaId ID of the medium to receive data from. 1043 @param Timeout The timeout, in 100ns units, to use for the execution 1008 1044 of the security protocol command. A Timeout value of 0 1009 1045 means that this function will wait indefinitely for the 1010 1046 security protocol command to execute. If Timeout is greater 1011 1047 than zero, then this function will return EFI_TIMEOUT 1012 1013 1048 if the time required to execute the receive data command 1049 is greater than Timeout. 1014 1050 @param SecurityProtocolId The value of the "Security Protocol" parameter of 1015 1051 the security protocol command to be sent. 1016 1052 @param SecurityProtocolSpecificData The value of the "Security Protocol Specific" parameter 1017 1053 of the security protocol command to be sent. 1018 @param PayloadBufferSize 1054 @param PayloadBufferSize Size in bytes of the payload data buffer. 1019 1055 @param PayloadBuffer A pointer to a destination buffer to store the security 1020 1056 protocol command specific payload data for the security … … 1043 1079 ); 1044 1080 1081 /** 1082 Send TPer Reset command to reset eDrive to lock all protected bands. 1083 Typically, there are 2 mechanism for resetting eDrive. They are: 1084 1. TPer Reset through IEEE 1667 protocol. 1085 2. TPer Reset through native TCG protocol. 1086 This routine will detect what protocol the attached eDrive comform to, TCG or 1087 IEEE 1667 protocol. Then send out TPer Reset command separately. 1088 1089 @param[in] AtaDevice ATA_DEVICE pointer. 1090 1091 **/ 1092 VOID 1093 InitiateTPerReset ( 1094 IN ATA_DEVICE *AtaDevice 1095 ); 1096 1045 1097 #endif -
trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
r48674 r58459 6 6 # it enumerates and identifies successfully. 7 7 # 8 # Copyright (c) 2009 - 201 1, Intel Corporation. All rights reserved.<BR>8 # Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR> 9 9 # 10 10 # This program and the accompanying materials … … 21 21 INF_VERSION = 0x00010005 22 22 BASE_NAME = AtaBusDxe 23 MODULE_UNI_FILE = AtaBusDxe.uni 23 24 FILE_GUID = 19DF145A-B1D4-453f-8507-38816676D7F6 24 25 MODULE_TYPE = UEFI_DRIVER … … 49 50 DevicePathLib 50 51 UefiBootServicesTableLib 52 UefiRuntimeServicesTableLib 51 53 MemoryAllocationLib 52 54 BaseMemoryLib … … 56 58 DebugLib 57 59 TimerLib 60 ReportStatusCodeLib 58 61 59 62 [Guids] 60 gEfiDiskInfoIdeInterfaceGuid # CONSUMES ## GUID 61 gEfiDiskInfoAhciInterfaceGuid # CONSUMES ## GUID 63 gEfiDiskInfoIdeInterfaceGuid ## SOMETIMES_PRODUCES ## UNDEFINED 64 gEfiDiskInfoAhciInterfaceGuid ## SOMETIMES_PRODUCES ## UNDEFINED 65 gEfiMemoryOverwriteControlDataGuid ## SOMETIMES_CONSUMES ## Variable:L"MemoryOverwriteRequestControl" 62 66 63 67 [Protocols] 64 gEfiDiskInfoProtocolGuid # BY_START 65 gEfiBlockIoProtocolGuid # BY_START 66 gEfiBlockIo2ProtocolGuid # BY_START 67 gEfiAtaPassThruProtocolGuid # TO_START 68 gEfiDevicePathProtocolGuid # TO_START 69 gEfiStorageSecurityCommandProtocolGuid # BY_START 68 gEfiDiskInfoProtocolGuid ## BY_START 69 gEfiBlockIoProtocolGuid ## BY_START 70 gEfiBlockIo2ProtocolGuid ## BY_START 71 ## TO_START 72 ## BY_START 73 gEfiDevicePathProtocolGuid 74 gEfiAtaPassThruProtocolGuid ## TO_START 75 gEfiStorageSecurityCommandProtocolGuid ## BY_START 70 76 71 77 [UserExtensions.TianoCore."ExtraFiles"] 78 AtaBusDxeExtra.uni -
trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c
r48674 r58459 11 11 Cylinder register. 12 12 13 Copyright (c) 2009 - 201 2, Intel Corporation. All rights reserved.<BR>13 Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR> 14 14 This program and the accompanying materials 15 15 are licensed and made available under the terms and conditions of the BSD License … … 134 134 Packet = TaskPacket; 135 135 Packet->Asb = AllocateAlignedBuffer (AtaDevice, sizeof (EFI_ATA_STATUS_BLOCK)); 136 if (Packet->Asb == NULL) { 137 return EFI_OUT_OF_RESOURCES; 138 } 139 136 140 CopyMem (Packet->Asb, AtaDevice->Asb, sizeof (EFI_ATA_STATUS_BLOCK)); 137 141 Packet->Acb = AllocateCopyPool (sizeof (EFI_ATA_COMMAND_BLOCK), &AtaDevice->Acb); … … 182 186 AtaPassThru = AtaDevice->AtaBusDriverData->AtaPassThru; 183 187 188 // 189 // Report Status Code to indicate reset happens 190 // 191 REPORT_STATUS_CODE_WITH_DEVICE_PATH ( 192 EFI_PROGRESS_CODE, 193 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_RESET), 194 AtaDevice->AtaBusDriverData->ParentDevicePath 195 ); 196 184 197 return AtaPassThru->ResetDevice ( 185 198 AtaPassThru, … … 421 434 // 422 435 Status = IdentifyAtaDevice (AtaDevice); 423 if (!EFI_ERROR (Status)) { 424 return Status; 425 } 436 return Status; 426 437 } 427 438 } while (Retry-- > 0); … … 514 525 Packet->Protocol = mAtaPassThruCmdProtocols[AtaDevice->UdmaValid][IsWrite]; 515 526 Packet->Length = EFI_ATA_PASS_THRU_LENGTH_SECTOR_COUNT; 516 Packet->Timeout = ATA_TIMEOUT; 527 // 528 // |------------------------|-----------------|------------------------|-----------------| 529 // | ATA PIO Transfer Mode | Transfer Rate | ATA DMA Transfer Mode | Transfer Rate | 530 // |------------------------|-----------------|------------------------|-----------------| 531 // | PIO Mode 0 | 3.3Mbytes/sec | Single-word DMA Mode 0 | 2.1Mbytes/sec | 532 // |------------------------|-----------------|------------------------|-----------------| 533 // | PIO Mode 1 | 5.2Mbytes/sec | Single-word DMA Mode 1 | 4.2Mbytes/sec | 534 // |------------------------|-----------------|------------------------|-----------------| 535 // | PIO Mode 2 | 8.3Mbytes/sec | Single-word DMA Mode 2 | 8.4Mbytes/sec | 536 // |------------------------|-----------------|------------------------|-----------------| 537 // | PIO Mode 3 | 11.1Mbytes/sec | Multi-word DMA Mode 0 | 4.2Mbytes/sec | 538 // |------------------------|-----------------|------------------------|-----------------| 539 // | PIO Mode 4 | 16.6Mbytes/sec | Multi-word DMA Mode 1 | 13.3Mbytes/sec | 540 // |------------------------|-----------------|------------------------|-----------------| 541 // 542 // As AtaBus is used to manage ATA devices, we have to use the lowest transfer rate to 543 // calculate the possible maximum timeout value for each read/write operation. 544 // The timout value is rounded up to nearest integar and here an additional 30s is added 545 // to follow ATA spec in which it mentioned that the device may take up to 30s to respond 546 // commands in the Standby/Idle mode. 547 // 548 if (AtaDevice->UdmaValid) { 549 // 550 // Calculate the maximum timeout value for DMA read/write operation. 551 // 552 Packet->Timeout = EFI_TIMER_PERIOD_SECONDS (DivU64x32 (MultU64x32 (TransferLength, AtaDevice->BlockMedia.BlockSize), 2100000) + 31); 553 } else { 554 // 555 // Calculate the maximum timeout value for PIO read/write operation 556 // 557 Packet->Timeout = EFI_TIMER_PERIOD_SECONDS (DivU64x32 (MultU64x32 (TransferLength, AtaDevice->BlockMedia.BlockSize), 3300000) + 31); 558 } 517 559 518 560 return AtaDevicePassThru (AtaDevice, TaskPacket, Event); … … 539 581 540 582 FreePool (Task); 583 } 584 585 /** 586 Terminate any in-flight non-blocking I/O requests by signaling an EFI_ABORTED 587 in the TransactionStatus member of the EFI_BLOCK_IO2_TOKEN for the non-blocking 588 I/O. After that it is safe to free any Token or Buffer data structures that 589 were allocated to initiate the non-blockingI/O requests that were in-flight for 590 this device. 591 592 @param[in] AtaDevice The ATA child device involved for the operation. 593 594 **/ 595 VOID 596 EFIAPI 597 AtaTerminateNonBlockingTask ( 598 IN ATA_DEVICE *AtaDevice 599 ) 600 { 601 BOOLEAN SubTaskEmpty; 602 EFI_TPL OldTpl; 603 ATA_BUS_ASYN_TASK *AtaTask; 604 LIST_ENTRY *Entry; 605 LIST_ENTRY *List; 606 607 OldTpl = gBS->RaiseTPL (TPL_NOTIFY); 608 // 609 // Abort all executing tasks from now. 610 // 611 AtaDevice->Abort = TRUE; 612 613 List = &AtaDevice->AtaTaskList; 614 for (Entry = GetFirstNode (List); !IsNull (List, Entry);) { 615 AtaTask = ATA_ASYN_TASK_FROM_ENTRY (Entry); 616 AtaTask->Token->TransactionStatus = EFI_ABORTED; 617 gBS->SignalEvent (AtaTask->Token->Event); 618 619 Entry = RemoveEntryList (Entry); 620 FreePool (AtaTask); 621 } 622 gBS->RestoreTPL (OldTpl); 623 624 do { 625 OldTpl = gBS->RaiseTPL (TPL_NOTIFY); 626 // 627 // Wait for executing subtasks done. 628 // 629 SubTaskEmpty = IsListEmpty (&AtaDevice->AtaSubTaskList); 630 gBS->RestoreTPL (OldTpl); 631 } while (!SubTaskEmpty); 632 633 // 634 // Aborting operation has been done. From now on, don't need to abort normal operation. 635 // 636 OldTpl = gBS->RaiseTPL (TPL_NOTIFY); 637 AtaDevice->Abort = FALSE; 638 gBS->RestoreTPL (OldTpl); 541 639 } 542 640 … … 576 674 Task->Token->TransactionStatus = EFI_DEVICE_ERROR; 577 675 } 676 677 if (AtaDevice->Abort) { 678 Task->Token->TransactionStatus = EFI_ABORTED; 679 } 680 578 681 DEBUG (( 579 682 EFI_D_BLKIO, … … 611 714 if (!IsListEmpty (&AtaDevice->AtaTaskList)) { 612 715 Entry = GetFirstNode (&AtaDevice->AtaTaskList); 613 AtaTask = ATA_A YNS_TASK_FROM_ENTRY (Entry);716 AtaTask = ATA_ASYN_TASK_FROM_ENTRY (Entry); 614 717 DEBUG ((EFI_D_BLKIO, "Start to embark a new Ata Task\n")); 615 718 DEBUG ((EFI_D_BLKIO, "AtaTask->NumberOfBlocks = %x; AtaTask->Token=%x\n", AtaTask->NumberOfBlocks, AtaTask->Token)); … … 696 799 SubEvent = NULL; 697 800 AtaTask = NULL; 698 801 699 802 // 700 803 // Ensure AtaDevice->Lba48Bit is a valid boolean value … … 709 812 if ((Token != NULL) && (Token->Event != NULL)) { 710 813 OldTpl = gBS->RaiseTPL (TPL_NOTIFY); 814 711 815 if (!IsListEmpty (&AtaDevice->AtaSubTaskList)) { 712 816 AtaTask = AllocateZeroPool (sizeof (ATA_BUS_ASYN_TASK)); … … 747 851 DEBUG ((EFI_D_BLKIO, "AccessAtaDevice, MaxTransferBlockNumber=%x\n", MaxTransferBlockNumber)); 748 852 DEBUG ((EFI_D_BLKIO, "AccessAtaDevice, EventCount=%x\n", TempCount)); 749 } else {853 } else { 750 854 while (!IsListEmpty (&AtaDevice->AtaTaskList) || !IsListEmpty (&AtaDevice->AtaSubTaskList)) { 751 855 // … … 940 1044 if ((AtaPassThru->Mode->IoAlign > 1) && !IS_ALIGNED (Buffer, AtaPassThru->Mode->IoAlign)) { 941 1045 NewBuffer = AllocateAlignedBuffer (AtaDevice, TransferLength); 1046 if (NewBuffer == NULL) { 1047 return EFI_OUT_OF_RESOURCES; 1048 } 1049 942 1050 CopyMem (NewBuffer, Buffer, TransferLength); 943 1051 FreePool (Buffer);
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