VirtualBox

Ignore:
Timestamp:
Oct 28, 2015 8:17:18 PM (9 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
103761
Message:

EFI/Firmware: 'svn merge /vendor/edk2/UDK2010.SR1 /vendor/edk2/current .', reverting and removing files+dirs listed in ReadMe.vbox, resolving conflicts with help from ../UDK2014.SP1/. This is a raw untested merge.

Location:
trunk/src/VBox/Devices/EFI/Firmware
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/EFI/Firmware

  • trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf

    r48674 r58459  
    88#  proper virtual address is used to perform the PCI Express Configuration cycle.
    99#
    10 # Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
     10# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
    1111#
    1212#  This program and the accompanying materials
    … …  
    2323  INF_VERSION                    = 0x00010005
    2424  BASE_NAME                      = DxeRuntimePciExpressLib
     25  MODULE_UNI_FILE                = DxeRuntimePciExpressLib.uni
    2526  FILE_GUID                      = 54DCBCE5-92AD-41f5-AAAF-1170F16DA6A8
    2627  MODULE_TYPE                    = DXE_RUNTIME_DRIVER
    … …  
    5455
    5556[Guids]
    56   gEfiEventVirtualAddressChangeGuid         ## PRODUCES ## Event
     57  gEfiEventVirtualAddressChangeGuid         ## CONSUMES ## Event
     58

  • trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c

    r48674 r58459  
    66  Library.
    77
    8   Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
     8  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
    99  This program and the accompanying materials
    1010  are licensed and made available under the terms and conditions of the BSD License
    … …  
    546546  If EndBit is greater than 7, then ASSERT().
    547547  If EndBit is less than StartBit, then ASSERT().
     548  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    548549
    549550  @param  Address   The PCI configuration register to write.
    … …  
    589590  If EndBit is greater than 7, then ASSERT().
    590591  If EndBit is less than StartBit, then ASSERT().
     592  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    591593
    592594  @param  Address   The PCI configuration register to write.
    … …  
    632634  If EndBit is greater than 7, then ASSERT().
    633635  If EndBit is less than StartBit, then ASSERT().
     636  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    634637
    635638  @param  Address   The PCI configuration register to write.
    … …  
    677680  If EndBit is greater than 7, then ASSERT().
    678681  If EndBit is less than StartBit, then ASSERT().
     682  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
     683  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    679684
    680685  @param  Address   The PCI configuration register to write.
    … …  
    910915  If EndBit is greater than 15, then ASSERT().
    911916  If EndBit is less than StartBit, then ASSERT().
     917  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    912918
    913919  @param  Address   The PCI configuration register to write.
    … …  
    954960  If EndBit is greater than 15, then ASSERT().
    955961  If EndBit is less than StartBit, then ASSERT().
     962  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    956963
    957964  @param  Address   The PCI configuration register to write.
    … …  
    9981005  If EndBit is greater than 15, then ASSERT().
    9991006  If EndBit is less than StartBit, then ASSERT().
     1007  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    10001008
    10011009  @param  Address   The PCI configuration register to write.
    … …  
    10441052  If EndBit is greater than 15, then ASSERT().
    10451053  If EndBit is less than StartBit, then ASSERT().
     1054  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
     1055  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    10461056
    10471057  @param  Address   The PCI configuration register to write.
    … …  
    12771287  If EndBit is greater than 31, then ASSERT().
    12781288  If EndBit is less than StartBit, then ASSERT().
     1289  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    12791290
    12801291  @param  Address   The PCI configuration register to write.
    … …  
    13211332  If EndBit is greater than 31, then ASSERT().
    13221333  If EndBit is less than StartBit, then ASSERT().
     1334  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    13231335
    13241336  @param  Address   The PCI configuration register to write.
    … …  
    13651377  If EndBit is greater than 31, then ASSERT().
    13661378  If EndBit is less than StartBit, then ASSERT().
     1379  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    13671380
    13681381  @param  Address   The PCI configuration register to write.
    … …  
    14111424  If EndBit is greater than 31, then ASSERT().
    14121425  If EndBit is less than StartBit, then ASSERT().
     1426  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
     1427  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    14131428
    14141429  @param  Address   The PCI configuration register to write.
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