Changeset 58459 in vbox for trunk/src/VBox/Devices/EFI/Firmware/OvmfPkg/PlatformPei
- Timestamp:
- Oct 28, 2015 8:17:18 PM (9 years ago)
- Location:
- trunk/src/VBox/Devices/EFI/Firmware
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/EFI/Firmware
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Property svn:mergeinfo
set to (toggle deleted branches)
/vendor/edk2/current 103735-103757
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Property svn:mergeinfo
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trunk/src/VBox/Devices/EFI/Firmware/OvmfPkg/PlatformPei/Fv.c
r48674 r58459 2 2 Build FV related hobs for platform. 3 3 4 Copyright (c) 2006 - 201 1, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> 5 5 This program and the accompanying materials 6 6 are licensed and made available under the terms and conditions of the BSD License … … 14 14 15 15 #include "PiPei.h" 16 #include "Platform.h" 16 17 #include <Library/DebugLib.h> 17 18 #include <Library/HobLib.h> … … 21 22 22 23 /** 23 Perform a call-back into the SEC simulator to get address of the Firmware Hub 24 25 @param FfsHeader Ffs Header availible to every PEIM 26 @param PeiServices General purpose services available to every PEIM. 24 Publish PEI & DXE (Decompressed) Memory based FVs to let PEI 25 and DXE know about them. 27 26 28 27 @retval EFI_SUCCESS Platform PEI FVs were initialized successfully. … … 34 33 ) 35 34 { 36 DEBUG ((EFI_D_ ERROR, "Platform PEI Firmware Volume Initialization\n"));35 DEBUG ((EFI_D_INFO, "Platform PEI Firmware Volume Initialization\n")); 37 36 38 DEBUG ( 39 (EFI_D_ERROR, "Firmware Volume HOB: 0x%x 0x%x\n", 40 PcdGet32 (PcdOvmfMemFvBase), 41 PcdGet32 (PcdOvmfMemFvSize) 42 ) 37 // 38 // Create a memory allocation HOB for the PEI FV. 39 // 40 // Allocate as ACPI NVS is S3 is supported 41 // 42 BuildMemoryAllocationHob ( 43 PcdGet32 (PcdOvmfPeiMemFvBase), 44 PcdGet32 (PcdOvmfPeiMemFvSize), 45 mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData 43 46 ); 44 47 45 BuildFvHob (PcdGet32 (PcdOvmfMemFvBase), PcdGet32 (PcdOvmfMemFvSize)); 48 // 49 // Let DXE know about the DXE FV 50 // 51 BuildFvHob (PcdGet32 (PcdOvmfDxeMemFvBase), PcdGet32 (PcdOvmfDxeMemFvSize)); 46 52 47 53 // 48 // Create a memory allocation HOB .54 // Create a memory allocation HOB for the DXE FV. 49 55 // 50 56 BuildMemoryAllocationHob ( 51 PcdGet32 (PcdOvmf MemFvBase),52 PcdGet32 (PcdOvmf MemFvSize),57 PcdGet32 (PcdOvmfDxeMemFvBase), 58 PcdGet32 (PcdOvmfDxeMemFvSize), 53 59 EfiBootServicesData 60 ); 61 62 // 63 // Let PEI know about the DXE FV so it can find the DXE Core 64 // 65 PeiServicesInstallFvInfoPpi ( 66 NULL, 67 (VOID *)(UINTN) PcdGet32 (PcdOvmfDxeMemFvBase), 68 PcdGet32 (PcdOvmfDxeMemFvSize), 69 NULL, 70 NULL 54 71 ); 55 72 -
trunk/src/VBox/Devices/EFI/Firmware/OvmfPkg/PlatformPei/MemDetect.c
r58173 r58459 2 2 Memory Detection for Virtual Machines. 3 3 4 Copyright (c) 2006 - 201 1, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> 5 5 This program and the accompanying materials 6 6 are licensed and made available under the terms and conditions of the BSD License … … 25 25 // The Library classes this module consumes 26 26 // 27 #include <Library/BaseMemoryLib.h> 27 28 #include <Library/DebugLib.h> 28 29 #include <Library/HobLib.h> … … 36 37 #include "Cmos.h" 37 38 38 STATIC 39 UINTN 39 UINT32 40 40 GetSystemMemorySizeBelow4gb ( 41 VOID 41 42 ) 42 43 { … … 84 85 } 85 86 86 87 87 /** 88 P eform Memory Detection88 Publish PEI core memory 89 89 90 90 @return EFI_SUCCESS The PEIM initialized successfully. 91 91 92 92 **/ 93 EFI_PHYSICAL_ADDRESS 94 MemDetect ( 93 EFI_STATUS 94 PublishPeiMemory ( 95 VOID 95 96 ) 96 97 { … … 99 100 UINT64 MemorySize; 100 101 UINT64 LowerMemorySize; 101 UINT64 UpperMemorySize; 102 103 DEBUG ((EFI_D_ERROR, "MemDetect called\n")); 104 105 // 106 // Determine total memory size available 107 // 108 LowerMemorySize = GetSystemMemorySizeBelow4gb (); 109 UpperMemorySize = GetSystemMemorySizeAbove4gb (); 110 111 // 112 // Determine the range of memory to use during PEI 113 // 114 MemoryBase = PcdGet32 (PcdOvmfMemFvBase) + PcdGet32 (PcdOvmfMemFvSize); 115 MemorySize = LowerMemorySize - MemoryBase; 116 if (MemorySize > SIZE_64MB) { 117 MemoryBase = LowerMemorySize - SIZE_64MB; 118 MemorySize = SIZE_64MB; 102 103 if (mBootMode == BOOT_ON_S3_RESUME) { 104 MemoryBase = PcdGet32 (PcdS3AcpiReservedMemoryBase); 105 MemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize); 106 } else { 107 LowerMemorySize = GetSystemMemorySizeBelow4gb (); 108 109 // 110 // Determine the range of memory to use during PEI 111 // 112 MemoryBase = PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize); 113 MemorySize = LowerMemorySize - MemoryBase; 114 if (MemorySize > SIZE_64MB) { 115 MemoryBase = LowerMemorySize - SIZE_64MB; 116 MemorySize = SIZE_64MB; 117 } 119 118 } 120 119 #ifdef VBOX … … 128 127 ASSERT_EFI_ERROR (Status); 129 128 129 return Status; 130 } 131 132 133 #ifndef VBOX 134 /** 135 Peform Memory Detection for QEMU / KVM 136 137 **/ 138 STATIC 139 VOID 140 QemuInitializeRam ( 141 VOID 142 ) 143 { 144 UINT64 LowerMemorySize; 145 UINT64 UpperMemorySize; 146 147 DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__)); 148 149 // 150 // Determine total memory size available 151 // 152 LowerMemorySize = GetSystemMemorySizeBelow4gb (); 153 UpperMemorySize = GetSystemMemorySizeAbove4gb (); 154 155 if (mBootMode != BOOT_ON_S3_RESUME) { 156 // 157 // Create memory HOBs 158 // 159 AddMemoryRangeHob (BASE_1MB, LowerMemorySize); 160 AddMemoryRangeHob (0, BASE_512KB + BASE_128KB); 161 } 162 163 MtrrSetMemoryAttribute (BASE_1MB, LowerMemorySize - BASE_1MB, CacheWriteBack); 164 165 MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack); 166 167 if (UpperMemorySize != 0) { 168 if (mBootMode != BOOT_ON_S3_RESUME) { 169 AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize); 170 } 171 172 MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack); 173 } 174 } 175 #else 176 VOID 177 VBoxInitializeRam ( 178 VOID 179 ) 180 { 181 UINT64 LowerMemorySize; 182 UINT64 UpperMemorySize; 183 EFI_PHYSICAL_ADDRESS MemoryBase; 184 UINT64 MemorySize; 185 186 DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__)); 187 188 // 189 // Determine total memory size available 190 // 191 LowerMemorySize = GetSystemMemorySizeBelow4gb (); 192 UpperMemorySize = GetSystemMemorySizeAbove4gb (); 193 194 if (mBootMode == BOOT_ON_S3_RESUME) { 195 MemoryBase = PcdGet32 (PcdS3AcpiReservedMemoryBase); 196 MemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize); 197 } else { 198 LowerMemorySize = GetSystemMemorySizeBelow4gb (); 199 200 // 201 // Determine the range of memory to use during PEI 202 // 203 MemoryBase = PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize); 204 MemorySize = LowerMemorySize - MemoryBase; 205 if (MemorySize > SIZE_64MB) { 206 MemoryBase = LowerMemorySize - SIZE_64MB; 207 MemorySize = SIZE_64MB; 208 } 209 } 210 MemorySize -= BASE_64KB; /* Reserves 64KB for ACPI tables. */ 211 130 212 // 131 213 // Create memory HOBs … … 133 215 AddMemoryBaseSizeHob (MemoryBase, MemorySize); 134 216 AddMemoryRangeHob (BASE_1MB, MemoryBase); 217 MtrrSetMemoryAttribute (BASE_1MB, MemoryBase + MemorySize - BASE_1MB, CacheWriteBack); 218 AddMemoryRangeHob (0, BASE_512KB + BASE_128KB); 219 MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack); 220 221 if (UpperMemorySize != 0) { 222 AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize); 223 224 MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack); 225 } 226 } 227 #endif 228 229 /** 230 Publish system RAM and reserve memory regions 231 232 **/ 233 VOID 234 InitializeRamRegions ( 235 VOID 236 ) 237 { 135 238 #ifndef VBOX 136 AddMemoryRangeHob (0, BASE_512KB + BASE_128KB); 239 if (!mXen) { 240 QemuInitializeRam (); 241 } else { 242 XenPublishRamRegions (); 243 } 244 #else 245 VBoxInitializeRam(); 137 246 #endif 138 247 139 MtrrSetMemoryAttribute (BASE_1MB, MemoryBase + MemorySize - BASE_1MB, CacheWriteBack); 140 141 #ifdef VBOX 142 AddMemoryRangeHob (0, BASE_512KB + BASE_128KB); 248 if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) { 249 // 250 // This is the memory range that will be used for PEI on S3 resume 251 // 252 BuildMemoryAllocationHob ( 253 (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdS3AcpiReservedMemoryBase), 254 (UINT64)(UINTN) PcdGet32 (PcdS3AcpiReservedMemorySize), 255 EfiACPIMemoryNVS 256 ); 257 258 // 259 // Cover the initial RAM area used as stack and temporary PEI heap. 260 // 261 // This is reserved as ACPI NVS so it can be used on S3 resume. 262 // 263 BuildMemoryAllocationHob ( 264 PcdGet32 (PcdOvmfSecPeiTempRamBase), 265 PcdGet32 (PcdOvmfSecPeiTempRamSize), 266 EfiACPIMemoryNVS 267 ); 268 269 // 270 // SEC stores its table of GUIDed section handlers here. 271 // 272 BuildMemoryAllocationHob ( 273 PcdGet64 (PcdGuidedExtractHandlerTableAddress), 274 PcdGet32 (PcdGuidedExtractHandlerTableSize), 275 EfiACPIMemoryNVS 276 ); 277 278 #ifdef MDE_CPU_X64 279 // 280 // Reserve the initial page tables built by the reset vector code. 281 // 282 // Since this memory range will be used by the Reset Vector on S3 283 // resume, it must be reserved as ACPI NVS. 284 // 285 BuildMemoryAllocationHob ( 286 (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecPageTablesBase), 287 (UINT64)(UINTN) PcdGet32 (PcdOvmfSecPageTablesSize), 288 EfiACPIMemoryNVS 289 ); 143 290 #endif 144 MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack); 145 146 if (UpperMemorySize != 0) { 147 AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize); 148 149 MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack); 150 } 151 152 return MemoryBase + MemorySize; 153 } 154 291 } 292 293 if (mBootMode != BOOT_ON_S3_RESUME) { 294 // 295 // Reserve the lock box storage area 296 // 297 // Since this memory range will be used on S3 resume, it must be 298 // reserved as ACPI NVS. 299 // 300 // If S3 is unsupported, then various drivers might still write to the 301 // LockBox area. We ought to prevent DXE from serving allocation requests 302 // such that they would overlap the LockBox storage. 303 // 304 ZeroMem ( 305 (VOID*)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase), 306 (UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize) 307 ); 308 BuildMemoryAllocationHob ( 309 (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase), 310 (UINT64)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize), 311 mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData 312 ); 313 } 314 } -
trunk/src/VBox/Devices/EFI/Firmware/OvmfPkg/PlatformPei/Platform.c
r58174 r58459 2 2 Platform PEI driver 3 3 4 Copyright (c) 2006 - 201 1, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> 5 5 Copyright (c) 2011, Andrei Warkentin <[email protected]> 6 6 … … 31 31 #include <Library/PeimEntryPoint.h> 32 32 #include <Library/PeiServicesLib.h> 33 #include <Library/QemuFwCfgLib.h> 33 34 #include <Library/ResourcePublicationLib.h> 34 35 #include <Guid/MemoryTypeInformation.h> 35 36 #include <Ppi/MasterBootMode.h> 37 #include <IndustryStandard/Pci22.h> 36 38 37 39 #include "Platform.h" … … 59 61 60 62 63 EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION; 64 65 BOOLEAN mS3Supported = FALSE; 66 67 61 68 VOID 62 69 AddIoMemoryBaseSizeHob ( … … 210 217 } 211 218 212 213 219 VOID 214 220 MemMapInitialization ( 215 EFI_PHYSICAL_ADDRESS TopOfMemory221 VOID 216 222 ) 217 223 { … … 241 247 242 248 // 243 // Add PCI MMIO space available to PCI resource allocations244 //245 if (TopOfMemory < BASE_2GB) {246 AddIoMemoryBaseSizeHob (BASE_2GB, 0xFC000000 - BASE_2GB);247 } else {248 AddIoMemoryBaseSizeHob (TopOfMemory, 0xFC000000 - TopOfMemory);249 }250 251 //252 // Local APIC range253 //254 AddIoMemoryBaseSizeHob (0xFEC80000, SIZE_512KB);255 256 //257 // I/O APIC range258 //259 AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_512KB);260 261 //262 249 // Video memory + Legacy BIOS region 263 250 #ifdef VBOX … … 267 254 AddIoMemoryRangeHob (0x0A0000, BASE_1MB); 268 255 256 if (!mXen) { 257 UINT32 TopOfLowRam; 258 TopOfLowRam = GetSystemMemorySizeBelow4gb (); 259 260 // 261 // address purpose size 262 // ------------ -------- ------------------------- 263 // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) 264 // 0xFC000000 gap 44 MB 265 // 0xFEC00000 IO-APIC 4 KB 266 // 0xFEC01000 gap 1020 KB 267 // 0xFED00000 HPET 1 KB 268 // 0xFED00400 gap 1023 KB 269 // 0xFEE00000 LAPIC 1 MB 270 // 271 AddIoMemoryRangeHob (TopOfLowRam < BASE_2GB ? 272 BASE_2GB : TopOfLowRam, 0xFC000000); 273 AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB); 274 AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB); 275 AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB); 276 } 277 269 278 #ifdef VBOX 270 279 // … … 284 293 VOID 285 294 MiscInitialization ( 286 BOOLEAN Xen295 VOID 287 296 ) 288 297 { … … 297 306 BuildCpuHob (36, 16); 298 307 299 if (!Xen) { 300 // 301 // Set the PM I/O base address to 0x400 302 // 303 PciAndThenOr32 (PCI_LIB_ADDRESS (0, 1, 3, 0x40), (UINT32) ~0xfc0, 0x400); 308 // 309 // If PMREGMISC/PMIOSE is set, assume the ACPI PMBA has been configured (for 310 // example by Xen) and skip the setup here. This matches the logic in 311 // AcpiTimerLibConstructor (). 312 // 313 if ((PciRead8 (PCI_LIB_ADDRESS (0, 1, 3, 0x80)) & 0x01) == 0) { 314 // 315 // The PEI phase should be exited with fully accessibe PIIX4 IO space: 316 // 1. set PMBA 317 // 318 PciAndThenOr32 ( 319 PCI_LIB_ADDRESS (0, 1, 3, 0x40), 320 (UINT32) ~0xFFC0, 321 PcdGet16 (PcdAcpiPmBaseAddress) 322 ); 323 324 // 325 // 2. set PCICMD/IOSE 326 // 327 PciOr8 ( 328 PCI_LIB_ADDRESS (0, 1, 3, PCI_COMMAND_OFFSET), 329 EFI_PCI_COMMAND_IO_SPACE 330 ); 331 332 // 333 // 3. set PMREGMISC/PMIOSE 334 // 335 PciOr8 (PCI_LIB_ADDRESS (0, 1, 3, 0x80), 0x01); 304 336 } 305 337 } … … 308 340 VOID 309 341 BootModeInitialization ( 310 ) 311 { 312 EFI_STATUS Status; 313 314 Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION); 342 VOID 343 ) 344 { 345 EFI_STATUS Status; 346 347 if (CmosRead8 (0xF) == 0xFE) { 348 mBootMode = BOOT_ON_S3_RESUME; 349 } 350 351 Status = PeiServicesSetBootMode (mBootMode); 315 352 ASSERT_EFI_ERROR (Status); 316 353 … … 334 371 VariableStore = 335 372 (EFI_PHYSICAL_ADDRESS)(UINTN) 336 AllocateRuntimePool ( 337 2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize) 373 AllocateAlignedRuntimePages ( 374 EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)), 375 PcdGet32 (PcdFlashNvStorageFtwSpareSize) 338 376 ); 339 377 DEBUG ((EFI_D_INFO, … … 383 421 ) 384 422 { 385 #ifndef VBOX386 EFI_STATUS Status;387 #endif388 EFI_PHYSICAL_ADDRESS TopOfMemory;389 BOOLEAN Xen;390 391 423 DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n")); 392 424 393 425 DebugDumpCmos (); 394 426 395 TopOfMemory = MemDetect (); 396 397 #ifndef VBOX 398 Status = InitializeXen (); 399 Xen = EFI_ERROR (Status) ? FALSE : TRUE; 400 #else 401 Xen = FALSE; 402 #endif 403 404 ReserveEmuVariableNvStore (); 405 406 PeiFvInitialization (); 407 408 MemMapInitialization (TopOfMemory); 409 410 MiscInitialization (Xen); 427 XenDetect (); 428 429 if (QemuFwCfgS3Enabled ()) { 430 DEBUG ((EFI_D_INFO, "S3 support was detected on QEMU\n")); 431 mS3Supported = TRUE; 432 } 411 433 412 434 BootModeInitialization (); 413 435 436 PublishPeiMemory (); 437 438 InitializeRamRegions (); 439 440 if (mXen) { 441 DEBUG ((EFI_D_INFO, "Xen was detected\n")); 442 InitializeXen (); 443 } 444 445 if (mBootMode != BOOT_ON_S3_RESUME) { 446 ReserveEmuVariableNvStore (); 447 448 PeiFvInitialization (); 449 450 MemMapInitialization (); 451 } 452 453 MiscInitialization (); 454 414 455 return EFI_SUCCESS; 415 456 } -
trunk/src/VBox/Devices/EFI/Firmware/OvmfPkg/PlatformPei/Platform.h
r48674 r58459 2 2 Platform PEI module include file. 3 3 4 Copyright (c) 2006 - 201 1, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> 5 5 This program and the accompanying materials 6 6 are licensed and made available under the terms and conditions of the BSD License … … 15 15 #ifndef _PLATFORM_PEI_H_INCLUDED_ 16 16 #define _PLATFORM_PEI_H_INCLUDED_ 17 18 #include <IndustryStandard/E820.h> 17 19 18 20 VOID … … 58 60 ); 59 61 60 EFI_PHYSICAL_ADDRESS 61 MemDetect ( 62 EFI_STATUS 63 PublishPeiMemory ( 64 VOID 65 ); 66 67 UINT32 68 GetSystemMemorySizeBelow4gb ( 69 VOID 70 ); 71 72 VOID 73 InitializeRamRegions ( 62 74 VOID 63 75 ); … … 73 85 ); 74 86 87 BOOLEAN 88 XenDetect ( 89 VOID 90 ); 91 92 extern BOOLEAN mXen; 93 94 VOID 95 XenPublishRamRegions ( 96 VOID 97 ); 98 99 extern EFI_BOOT_MODE mBootMode; 100 101 extern BOOLEAN mS3Supported; 102 75 103 #endif // _PLATFORM_PEI_H_INCLUDED_ -
trunk/src/VBox/Devices/EFI/Firmware/OvmfPkg/PlatformPei/PlatformPei.inf
r48674 r58459 3 3 # 4 4 # This module provides platform specific function to detect boot mode. 5 # Copyright (c) 2006 - 201 1, Intel Corporation. All rights reserved.<BR>5 # Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> 6 6 # 7 7 # This program and the accompanying materials … … 37 37 38 38 [Packages] 39 IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec 39 40 MdePkg/MdePkg.dec 40 41 MdeModulePkg/MdeModulePkg.dec … … 55 56 PeiServicesTablePointerLib 56 57 PeimEntryPoint 58 QemuFwCfgLib 57 59 MtrrLib 60 PcdLib 58 61 59 62 [Pcd] 60 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase 61 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize 63 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase 64 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize 65 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase 66 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize 67 gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress 68 gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase 69 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase 70 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize 71 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase 72 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize 73 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase 74 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize 75 gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize 76 gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize 77 gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress 62 78 gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize 63 79 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize 64 80 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize 65 81 gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved 82 gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration 83 gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress 66 84 67 85 [Ppis] -
trunk/src/VBox/Devices/EFI/Firmware/OvmfPkg/PlatformPei/Xen.c
r48674 r58459 2 2 Xen Platform PEI support 3 3 4 Copyright (c) 2006 - 201 1, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> 5 5 Copyright (c) 2011, Andrei Warkentin <[email protected]> 6 6 … … 28 28 #include <Library/PcdLib.h> 29 29 #include <Guid/XenInfo.h> 30 #include <IndustryStandard/E820.h> 31 #include <Library/ResourcePublicationLib.h> 32 #include <Library/MtrrLib.h> 30 33 31 34 #include "Platform.h" 35 #include "Xen.h" 36 37 BOOLEAN mXen = FALSE; 38 39 STATIC UINT32 mXenLeaf = 0; 32 40 33 41 EFI_XEN_INFO mXenInfo; 34 42 43 /** 44 Returns E820 map provided by Xen 45 46 @param Entries Pointer to E820 map 47 @param Count Number of entries 48 49 @return EFI_STATUS 50 **/ 51 EFI_STATUS 52 XenGetE820Map ( 53 EFI_E820_ENTRY64 **Entries, 54 UINT32 *Count 55 ) 56 { 57 EFI_XEN_OVMF_INFO *Info = 58 (EFI_XEN_OVMF_INFO *)(UINTN) OVMF_INFO_PHYSICAL_ADDRESS; 59 60 if (AsciiStrCmp ((CHAR8 *) Info->Signature, "XenHVMOVMF")) { 61 return EFI_NOT_FOUND; 62 } 63 64 ASSERT (Info->E820 < MAX_ADDRESS); 65 *Entries = (EFI_E820_ENTRY64 *)(UINTN) Info->E820; 66 *Count = Info->E820EntriesCount; 67 68 return EFI_SUCCESS; 69 } 35 70 36 71 /** … … 85 120 Figures out if we are running inside Xen HVM. 86 121 87 @return UINT32 CPUID index used to connect to HV. 88 89 **/ 90 UINT32 122 @retval TRUE Xen was detected 123 @retval FALSE Xen was not detected 124 125 **/ 126 BOOLEAN 91 127 XenDetect ( 92 128 VOID 93 129 ) 94 130 { 95 96 UINT32 XenLeaf;97 131 UINT8 Signature[13]; 98 132 99 for (XenLeaf = 0x40000000; XenLeaf < 0x40010000; XenLeaf += 0x100) { 100 AsmCpuid (XenLeaf, NULL, (UINT32 *) &Signature[0], 133 if (mXenLeaf != 0) { 134 return TRUE; 135 } 136 137 Signature[12] = '\0'; 138 for (mXenLeaf = 0x40000000; mXenLeaf < 0x40010000; mXenLeaf += 0x100) { 139 AsmCpuid (mXenLeaf, 140 NULL, 141 (UINT32 *) &Signature[0], 101 142 (UINT32 *) &Signature[4], 102 143 (UINT32 *) &Signature[8]); 103 Signature[12] = '\0';104 144 105 145 if (!AsciiStrCmp ((CHAR8 *) Signature, "XenVMMXenVMM")) { 106 return XenLeaf; 146 mXen = TRUE; 147 return TRUE; 107 148 } 108 149 } 109 150 110 return 0; 111 } 151 mXenLeaf = 0; 152 return FALSE; 153 } 154 155 156 VOID 157 XenPublishRamRegions ( 158 VOID 159 ) 160 { 161 EFI_E820_ENTRY64 *E820Map; 162 UINT32 E820EntriesCount; 163 EFI_STATUS Status; 164 165 if (!mXen) { 166 return; 167 } 168 169 DEBUG ((EFI_D_INFO, "Using memory map provided by Xen\n")); 170 171 // 172 // Parse RAM in E820 map 173 // 174 Status = XenGetE820Map (&E820Map, &E820EntriesCount); 175 176 ASSERT_EFI_ERROR (Status); 177 178 if (E820EntriesCount > 0) { 179 EFI_E820_ENTRY64 *Entry; 180 UINT32 Loop; 181 182 for (Loop = 0; Loop < E820EntriesCount; Loop++) { 183 Entry = E820Map + Loop; 184 185 // 186 // Only care about RAM 187 // 188 if (Entry->Type != EfiAcpiAddressRangeMemory) { 189 continue; 190 } 191 192 if (Entry->BaseAddr >= BASE_4GB) { 193 AddUntestedMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length); 194 } else { 195 AddMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length); 196 } 197 198 MtrrSetMemoryAttribute (Entry->BaseAddr, Entry->Length, CacheWriteBack); 199 } 200 } 201 } 202 112 203 113 204 /** … … 123 214 ) 124 215 { 125 UINT32 XenLeaf; 126 127 XenLeaf = XenDetect (); 128 129 if (XenLeaf == 0) { 216 if (mXenLeaf == 0) { 130 217 return EFI_NOT_FOUND; 131 218 } 132 219 133 DEBUG ((EFI_D_INFO, "Xen was detected\n")); 134 135 XenConnect (XenLeaf); 220 XenConnect (mXenLeaf); 136 221 137 222 // … … 141 226 AddReservedMemoryBaseSizeHob (0xFC000000, 0x1000000); 142 227 228 PcdSetBool (PcdPciDisableBusEnumeration, TRUE); 229 143 230 return EFI_SUCCESS; 144 231 }
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