Changeset 58466 in vbox for trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseSynchronizationLib
- Timestamp:
- Oct 29, 2015 4:30:44 AM (9 years ago)
- Location:
- trunk/src/VBox/Devices/EFI/Firmware
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/EFI/Firmware
- Property svn:mergeinfo changed
/vendor/edk2/current merged: 103769-103776
- Property svn:mergeinfo changed
-
trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.c
r48674 r58466 46 46 Performs an atomic compare exchange operation on a 64-bit unsigned integer. 47 47 48 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified 49 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and 50 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. 48 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified 49 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and 50 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. 51 51 The compare exchange operation must be performed using MP safe mechanisms. 52 52 -
trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
r58459 r58466 31 31 32 32 [Sources.IA32] 33 Ia32/InterlockedCompareExchange64.c | MSFT 34 Ia32/InterlockedCompareExchange32.c | MSFT 35 Ia32/InterlockedDecrement.c | MSFT 36 Ia32/InterlockedIncrement.c | MSFT 33 Ia32/InterlockedCompareExchange64.c | MSFT 34 Ia32/InterlockedCompareExchange32.c | MSFT 35 Ia32/InterlockedDecrement.c | MSFT 36 Ia32/InterlockedIncrement.c | MSFT 37 37 SynchronizationMsc.c | MSFT 38 38 39 Ia32/InterlockedCompareExchange64.asm | INTEL 40 Ia32/InterlockedCompareExchange32.asm | INTEL 41 Ia32/InterlockedDecrement.asm | INTEL 42 Ia32/InterlockedIncrement.asm | INTEL 39 Ia32/InterlockedCompareExchange64.asm | INTEL 40 Ia32/InterlockedCompareExchange32.asm | INTEL 41 Ia32/InterlockedDecrement.asm | INTEL 42 Ia32/InterlockedIncrement.asm | INTEL 43 43 Synchronization.c | INTEL 44 44 … … 49 49 X64/InterlockedCompareExchange64.c | MSFT 50 50 X64/InterlockedCompareExchange32.c | MSFT 51 51 52 52 X64/InterlockedCompareExchange64.asm | INTEL 53 53 X64/InterlockedCompareExchange32.asm | INTEL 54 55 X64/InterlockedDecrement.c | MSFT56 X64/InterlockedIncrement.c | MSFT57 SynchronizationMsc.c | MSFT58 54 59 X64/InterlockedDecrement.asm | INTEL 60 X64/InterlockedIncrement.asm | INTEL 61 Synchronization.c | INTEL 55 X64/InterlockedDecrement.c | MSFT 56 X64/InterlockedIncrement.c | MSFT 57 SynchronizationMsc.c | MSFT 58 59 X64/InterlockedDecrement.asm | INTEL 60 X64/InterlockedIncrement.asm | INTEL 61 Synchronization.c | INTEL 62 62 63 63 X64/GccInline.c | GCC 64 SynchronizationGcc.c | GCC 64 SynchronizationGcc.c | GCC 65 65 66 66 [Sources.IPF] … … 69 69 Ipf/InterlockedCompareExchange32.s 70 70 71 Synchronization.c | INTEL 72 SynchronizationMsc.c | MSFT 73 SynchronizationGcc.c | GCC 71 Synchronization.c | INTEL 72 SynchronizationMsc.c | MSFT 73 SynchronizationGcc.c | GCC 74 74 75 75 [Sources.EBC] -
trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseSynchronizationLib/Ebc/Synchronization.c
r48674 r58466 47 47 Performs an atomic compare exchange operation on a 64-bit unsigned integer. 48 48 49 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified 50 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and 51 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. 49 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified 50 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and 51 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. 52 52 The compare exchange operation must be performed using MP safe mechanisms. 53 53 -
trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c
r48674 r58466 1 1 /** @file 2 2 GCC inline implementation of BaseSynchronizationLib processor specific functions. 3 3 4 4 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> 5 5 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> … … 43 43 : "=a" (Result), // %0 44 44 "=m" (*Value) // %1 45 : "m" (*Value) // %2 45 : "m" (*Value) // %2 46 46 : "memory", 47 47 "cc" 48 48 ); 49 50 return Result; 49 50 return Result; 51 51 52 52 } … … 73 73 { 74 74 UINT32 Result; 75 75 76 76 __asm__ __volatile__ ( 77 77 "lock \n\t" … … 80 80 : "=a" (Result), // %0 81 81 "=m" (*Value) // %1 82 : "m" (*Value) // %2 82 : "m" (*Value) // %2 83 83 : "memory", 84 84 "cc" 85 85 ); 86 86 87 87 return Result; 88 88 } … … 122 122 : "q" (ExchangeValue), // %1 123 123 "m" (*Value), // %2 124 "0" (CompareValue) // %4 124 "0" (CompareValue) // %4 125 125 : "memory", 126 126 "cc" … … 157 157 __asm__ __volatile__ ( 158 158 " \n\t" 159 "push %%ebx \n\t" 160 "movl %2,%%ebx \n\t" 159 "push %%ebx \n\t" 160 "movl %2,%%ebx \n\t" 161 161 "lock \n\t" 162 162 "cmpxchg8b (%1) \n\t" … … 169 169 "cc" 170 170 ); 171 171 172 172 return CompareValue; 173 173 } -
trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseSynchronizationLib/Synchronization.c
r58459 r58466 23 23 24 24 This function retrieves the spin lock alignment requirements for optimal 25 performance on a given CPU architecture. The spin lock alignment is byte alignment. 25 performance on a given CPU architecture. The spin lock alignment is byte alignment. 26 26 It must be a power of two and is returned by this function. If there are no alignment 27 27 requirements, then 1 must be returned. The spin lock synchronization -
trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c
r58459 r58466 17 17 18 18 // 19 // GCC inline assembly for Read Write Barrier 19 // GCC inline assembly for Read Write Barrier 20 20 // 21 21 #define _ReadWriteBarrier() do { __asm__ __volatile__ ("": : : "memory"); } while(0) … … 29 29 30 30 This function retrieves the spin lock alignment requirements for optimal 31 performance on a given CPU architecture. The spin lock alignment is byte alignment. 31 performance on a given CPU architecture. The spin lock alignment is byte alignment. 32 32 It must be a power of two and is returned by this function. If there are no alignment 33 33 requirements, then 1 must be returned. The spin lock synchronization … … 192 192 SPIN_LOCK LockValue; 193 193 VOID *Result; 194 194 195 195 ASSERT (SpinLock != NULL); 196 196 -
trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c
r58459 r58466 31 31 32 32 This function retrieves the spin lock alignment requirements for optimal 33 performance on a given CPU architecture. The spin lock alignment is byte alignment. 33 performance on a given CPU architecture. The spin lock alignment is byte alignment. 34 34 It must be a power of two and is returned by this function. If there are no alignment 35 35 requirements, then 1 must be returned. The spin lock synchronization … … 194 194 SPIN_LOCK LockValue; 195 195 VOID *Result; 196 196 197 197 ASSERT (SpinLock != NULL); 198 198 -
trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c
r48674 r58466 1 1 /** @file 2 2 GCC inline implementation of BaseSynchronizationLib processor specific functions. 3 3 4 4 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> 5 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> 5 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> 6 6 This program and the accompanying materials 7 7 are licensed and made available under the terms and conditions of the BSD License … … 44 44 : "=a" (Result), // %0 45 45 "=m" (*Value) // %1 46 : "m" (*Value) // %2 46 : "m" (*Value) // %2 47 47 : "memory", 48 48 "cc" 49 49 ); 50 51 return Result; 50 51 return Result; 52 52 } 53 53 … … 73 73 { 74 74 UINT32 Result; 75 75 76 76 __asm__ __volatile__ ( 77 77 "lock \n\t" … … 80 80 : "=a" (Result), // %0 81 81 "=m" (*Value) // %1 82 : "m" (*Value) // %2 82 : "m" (*Value) // %2 83 83 : "memory", 84 84 "cc" 85 85 ); 86 86 87 87 return Result; 88 88 } … … 123 123 "=m" (*Value) // %1 124 124 : "a" (CompareValue), // %2 125 "r" (ExchangeValue), // %3 125 "r" (ExchangeValue), // %3 126 126 "m" (*Value) 127 127 : "memory", 128 128 "cc" 129 129 ); 130 130 131 131 return CompareValue; 132 132 } … … 165 165 "=m" (*Value) // %1 166 166 : "a" (CompareValue), // %2 167 "r" (ExchangeValue), // %3 167 "r" (ExchangeValue), // %3 168 168 "m" (*Value) 169 169 : "memory", 170 170 "cc" 171 171 ); 172 172 173 173 return CompareValue; 174 174 }
Note:
See TracChangeset
for help on using the changeset viewer.