VirtualBox

Ignore:
Timestamp:
Oct 29, 2015 4:30:44 AM (9 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
103777
Message:

EFI/Firmware: Merged in the svn:eol-style, svn:mime-type and trailing whitespace cleanup that was done after the initial UDK2014.SP1 import: svn merge /vendor/edk2/UDK2014.SP1 /vendor/edk2/current .

Location:
trunk/src/VBox/Devices/EFI/Firmware
Files:
35 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/EFI/Firmware

  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/8254TimerDxe/8254Timer.inf

    r58459 r58466  
    33#
    44# Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>
    5 # This program and the accompanying materials                         
    6 # are licensed and made available under the terms and conditions of the BSD License         
    7 # which accompanies this distribution.  The full text of the license may be found at       
    8 # http://opensource.org/licenses/bsd-license.php                                           
    9 #                                                                                           
    10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5# This program and the accompanying materials
     6# are licensed and made available under the terms and conditions of the BSD License
     7# which accompanies this distribution.  The full text of the license may be found at
     8# http://opensource.org/licenses/bsd-license.php
     9#
     10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212#
    1313##
     
    2626  MdePkg/MdePkg.dec
    2727  IntelFrameworkPkg/IntelFrameworkPkg.dec
    28  
     28
    2929[LibraryClasses]
    3030  UefiBootServicesTableLib
     
    3939
    4040[Protocols]
    41   gEfiCpuArchProtocolGuid       ## CONSUMES 
     41  gEfiCpuArchProtocolGuid       ## CONSUMES
    4242  gEfiLegacy8259ProtocolGuid    ## CONSUMES
    4343  gEfiTimerArchProtocolGuid     ## PRODUCES
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/8254TimerDxe/Timer.c

    r58459 r58466  
    33
    44Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>
    5 This program and the accompanying materials                         
    6 are licensed and made available under the terms and conditions of the BSD License         
    7 which accompanies this distribution.  The full text of the license may be found at       
    8 http://opensource.org/licenses/bsd-license.php                                           
    9                                                                                          
    10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5This program and the accompanying materials
     6are licensed and made available under the terms and conditions of the BSD License
     7which accompanies this distribution.  The full text of the license may be found at
     8http://opensource.org/licenses/bsd-license.php
     9
     10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212
    1313**/
     
    298298  UINT16      IRQMask;
    299299  EFI_TPL     OriginalTPL;
    300  
     300
    301301  //
    302302  // If the timer interrupt is enabled, then the registered handler will be invoked.
     
    316316      mTimerNotifyFunction (mTimerPeriod);
    317317    }
    318    
     318
    319319    gBS->RestoreTPL (OriginalTPL);
    320320  } else {
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/8254TimerDxe/Timer.h

    r58459 r58466  
    33
    44Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>
    5 This program and the accompanying materials                         
    6 are licensed and made available under the terms and conditions of the BSD License         
    7 which accompanies this distribution.  The full text of the license may be found at       
    8 http://opensource.org/licenses/bsd-license.php                                           
    9                                                                                          
    10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5This program and the accompanying materials
     6are licensed and made available under the terms and conditions of the BSD License
     7which accompanies this distribution.  The full text of the license may be found at
     8http://opensource.org/licenses/bsd-license.php
     9
     10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212**/
    1313
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c

    r58459 r58466  
    214214  IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
    215215  IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
    216  
     216
    217217  gBS->RestoreTPL (OriginalTpl);
    218218
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf

    r58459 r58466  
    33#
    44# Copyright (c) 2005 - 2015, Intel Corporation. All rights reserved.<BR>
    5 # This program and the accompanying materials                         
    6 # are licensed and made available under the terms and conditions of the BSD License         
    7 # which accompanies this distribution.  The full text of the license may be found at       
    8 # http://opensource.org/licenses/bsd-license.php                                           
    9 #                                                                                           
    10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5# This program and the accompanying materials
     6# are licensed and made available under the terms and conditions of the BSD License
     7# which accompanies this distribution.  The full text of the license may be found at
     8# http://opensource.org/licenses/bsd-license.php
     9#
     10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212#
    1313##
     
    3030  IntelFrameworkPkg/IntelFrameworkPkg.dec
    3131  PcAtChipsetPkg/PcAtChipsetPkg.dec
    32  
     32
    3333[LibraryClasses]
    3434  UefiBootServicesTableLib
     
    3737  IoLib
    3838  PcdLib
    39  
     39
    4040[Protocols]
    4141  gEfiLegacy8259ProtocolGuid                    ## PRODUCES
     
    4545  gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask      ## CONSUMES
    4646  gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
    47  
     47
    4848[Depex]
    4949  TRUE
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/ComponentName.c

    r48674 r58466  
    7474                        is the name of the driver specified by This in the language
    7575                        specified by Language.
    76  
     76
    7777  @retval EFI_SUCCESS           The Unicode string for the Driver specified by This
    7878                                and the language specified by Language was returned
     
    102102/**
    103103  Retrieves a Unicode string that is the user readable name of the controller
    104   that is being managed by an EFI Driver. 
     104  that is being managed by an EFI Driver.
    105105
    106106  @param This                   A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.
     
    125125                                specified by Language from the point of view of the
    126126                                driver specified by This.
    127  
     127
    128128  @retval EFI_SUCCESS           The Unicode string for the user readable name in the
    129129                                language specified by Language for the driver
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeController.h

    r48674 r58466  
    119119/**
    120120  Returns the information about the specified IDE channel.
    121  
     121
    122122  This function can be used to obtain information about a particular IDE channel.
    123   The driver entity uses this information during the enumeration process. 
    124  
    125   If Enabled is set to FALSE, the driver entity will not scan the channel. Note 
     123  The driver entity uses this information during the enumeration process.
     124
     125  If Enabled is set to FALSE, the driver entity will not scan the channel. Note
    126126  that it will not prevent an operating system driver from scanning the channel.
    127  
    128   For most of today's controllers, MaxDevices will either be 1 or 2. For SATA 
    129   controllers, this value will always be 1. SATA configurations can contain SATA 
     127
     128  For most of today's controllers, MaxDevices will either be 1 or 2. For SATA
     129  controllers, this value will always be 1. SATA configurations can contain SATA
    130130  port multipliers. SATA port multipliers behave like SATA bridges and can support
    131   up to 16 devices on the other side. If a SATA port out of the IDE controller 
    132   is connected to a port multiplier, MaxDevices will be set to the number of SATA 
    133   devices that the port multiplier supports. Because today's port multipliers 
    134   support up to fifteen SATA devices, this number can be as large as fifteen. The IDE 
    135   bus driver is required to scan for the presence of port multipliers behind an SATA 
    136   controller and enumerate up to MaxDevices number of devices behind the port 
    137   multiplier.   
    138  
    139   In this context, the devices behind a port multiplier constitute a channel. 
    140  
     131  up to 16 devices on the other side. If a SATA port out of the IDE controller
     132  is connected to a port multiplier, MaxDevices will be set to the number of SATA
     133  devices that the port multiplier supports. Because today's port multipliers
     134  support up to fifteen SATA devices, this number can be as large as fifteen. The IDE
     135  bus driver is required to scan for the presence of port multipliers behind an SATA
     136  controller and enumerate up to MaxDevices number of devices behind the port
     137  multiplier.
     138
     139  In this context, the devices behind a port multiplier constitute a channel.
     140
    141141  @param[in]  This         The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
    142142  @param[in]  Channel      Zero-based channel number.
    143   @param[out] Enabled      TRUE if this channel is enabled.  Disabled channels 
     143  @param[out] Enabled      TRUE if this channel is enabled.  Disabled channels
    144144                           are not scanned to see if any devices are present.
    145145  @param[out] MaxDevices   The maximum number of IDE devices that the bus driver
    146                            can expect on this channel.  For the ATA/ATAPI 
    147                            specification, version 6, this number will either be 
    148                            one or two. For Serial ATA (SATA) configurations with a 
     146                           can expect on this channel.  For the ATA/ATAPI
     147                           specification, version 6, this number will either be
     148                           one or two. For Serial ATA (SATA) configurations with a
    149149                           port multiplier, this number can be as large as fifteen.
    150150
     
    166166  The notifications from the driver entity that it is about to enter a certain
    167167  phase of the IDE channel enumeration process.
    168  
    169   This function can be used to notify the IDE controller driver to perform 
    170   specific actions, including any chipset-specific initialization, so that the 
    171   chipset is ready to enter the next phase. Seven notification points are defined 
    172   at this time. 
    173  
    174   More synchronization points may be added as required in the future. 
     168
     169  This function can be used to notify the IDE controller driver to perform
     170  specific actions, including any chipset-specific initialization, so that the
     171  chipset is ready to enter the next phase. Seven notification points are defined
     172  at this time.
     173
     174  More synchronization points may be added as required in the future.
    175175
    176176  @param[in] This      The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
     
    181181  @retval EFI_UNSUPPORTED         Phase is not supported.
    182182  @retval EFI_INVALID_PARAMETER   Channel is invalid (Channel >= ChannelCount).
    183   @retval EFI_NOT_READY           This phase cannot be entered at this time; for 
    184                                   example, an attempt was made to enter a Phase 
    185                                   without having entered one or more previous 
     183  @retval EFI_NOT_READY           This phase cannot be entered at this time; for
     184                                  example, an attempt was made to enter a Phase
     185                                  without having entered one or more previous
    186186                                  Phase.
    187187
     
    199199  Submits the device information to the IDE controller driver.
    200200
    201   This function is used by the driver entity to pass detailed information about 
    202   a particular device to the IDE controller driver. The driver entity obtains 
     201  This function is used by the driver entity to pass detailed information about
     202  a particular device to the IDE controller driver. The driver entity obtains
    203203  this information by issuing an ATA or ATAPI IDENTIFY_DEVICE command. IdentifyData
    204   is the pointer to the response data buffer. The IdentifyData buffer is owned 
    205   by the driver entity, and the IDE controller driver must make a local copy 
    206   of the entire buffer or parts of the buffer as needed. The original IdentifyData 
     204  is the pointer to the response data buffer. The IdentifyData buffer is owned
     205  by the driver entity, and the IDE controller driver must make a local copy
     206  of the entire buffer or parts of the buffer as needed. The original IdentifyData
    207207  buffer pointer may not be valid when
    208  
     208
    209209    - EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() or
    210210    - EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() is called at a later point.
    211    
    212   The IDE controller driver may consult various fields of EFI_IDENTIFY_DATA to 
    213   compute the optimum mode for the device. These fields are not limited to the 
    214   timing information. For example, an implementation of the IDE controller driver 
    215   may examine the vendor and type/mode field to match known bad drives. 
    216  
    217   The driver entity may submit drive information in any order, as long as it 
    218   submits information for all the devices belonging to the enumeration group 
     211
     212  The IDE controller driver may consult various fields of EFI_IDENTIFY_DATA to
     213  compute the optimum mode for the device. These fields are not limited to the
     214  timing information. For example, an implementation of the IDE controller driver
     215  may examine the vendor and type/mode field to match known bad drives.
     216
     217  The driver entity may submit drive information in any order, as long as it
     218  submits information for all the devices belonging to the enumeration group
    219219  before EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() is called for any device
    220220  in that enumeration group. If a device is absent, EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
    221   should be called with IdentifyData set to NULL.  The IDE controller driver may 
    222   not have any other mechanism to know whether a device is present or not. Therefore, 
    223   setting IdentifyData to NULL does not constitute an error condition. 
    224   EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() can be called only once for a 
    225   given (Channel, Device) pair. 
    226    
     221  should be called with IdentifyData set to NULL.  The IDE controller driver may
     222  not have any other mechanism to know whether a device is present or not. Therefore,
     223  setting IdentifyData to NULL does not constitute an error condition.
     224  EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() can be called only once for a
     225  given (Channel, Device) pair.
     226
    227227  @param[in] This           A pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
    228228  @param[in] Channel        Zero-based channel number.
     
    248248  Disqualifies specific modes for an IDE device.
    249249
    250   This function allows the driver entity or other drivers (such as platform 
     250  This function allows the driver entity or other drivers (such as platform
    251251  drivers) to reject certain timing modes and request the IDE controller driver
    252   to recalculate modes. This function allows the driver entity and the IDE 
    253   controller driver to negotiate the timings on a per-device basis. This function 
    254   is useful in the case of drives that lie about their capabilities. An example 
    255   is when the IDE device fails to accept the timing modes that are calculated 
     252  to recalculate modes. This function allows the driver entity and the IDE
     253  controller driver to negotiate the timings on a per-device basis. This function
     254  is useful in the case of drives that lie about their capabilities. An example
     255  is when the IDE device fails to accept the timing modes that are calculated
    256256  by the IDE controller driver based on the response to the Identify Drive command.
    257257
    258   If the driver entity does not want to limit the ATA timing modes and leave that 
    259   decision to the IDE controller driver, it can either not call this function for 
    260   the given device or call this function and set the Valid flag to FALSE for all 
     258  If the driver entity does not want to limit the ATA timing modes and leave that
     259  decision to the IDE controller driver, it can either not call this function for
     260  the given device or call this function and set the Valid flag to FALSE for all
    261261  modes that are listed in EFI_ATA_COLLECTIVE_MODE.
    262  
    263   The driver entity may disqualify modes for a device in any order and any number 
     262
     263  The driver entity may disqualify modes for a device in any order and any number
    264264  of times.
    265  
    266   This function can be called multiple times to invalidate multiple modes of the 
    267   same type (e.g., Programmed Input/Output [PIO] modes 3 and 4). See the ATA/ATAPI 
    268   specification for more information on PIO modes. 
    269  
     265
     266  This function can be called multiple times to invalidate multiple modes of the
     267  same type (e.g., Programmed Input/Output [PIO] modes 3 and 4). See the ATA/ATAPI
     268  specification for more information on PIO modes.
     269
    270270  For Serial ATA (SATA) controllers, this member function can be used to disqualify
    271271  a higher transfer rate mode on a given channel. For example, a platform driver
    272   may inform the IDE controller driver to not use second-generation (Gen2) speeds 
     272  may inform the IDE controller driver to not use second-generation (Gen2) speeds
    273273  for a certain SATA drive.
    274  
     274
    275275  @param[in] This       The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
    276276  @param[in] Channel    The zero-based channel number.
     
    283283  @retval EFI_INVALID_PARAMETER   Device is invalid.
    284284  @retval EFI_INVALID_PARAMETER   IdentifyData is NULL.
    285                                
     285
    286286**/
    287287EFI_STATUS
     
    299299
    300300  This function is used by the driver entity to obtain the optimum ATA modes for
    301   a specific device.  The IDE controller driver takes into account the following 
     301  a specific device.  The IDE controller driver takes into account the following
    302302  while calculating the mode:
    303303    - The IdentifyData inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
    304304    - The BadModes inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode()
    305305
    306   The driver entity is required to call EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() 
    307   for all the devices that belong to an enumeration group before calling 
    308   EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() for any device in the same group. 
    309  
    310   The IDE controller driver will use controller- and possibly platform-specific 
    311   algorithms to arrive at SupportedModes.  The IDE controller may base its 
    312   decision on user preferences and other considerations as well. This function 
    313   may be called multiple times because the driver entity may renegotiate the mode 
     306  The driver entity is required to call EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
     307  for all the devices that belong to an enumeration group before calling
     308  EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() for any device in the same group.
     309
     310  The IDE controller driver will use controller- and possibly platform-specific
     311  algorithms to arrive at SupportedModes.  The IDE controller may base its
     312  decision on user preferences and other considerations as well. This function
     313  may be called multiple times because the driver entity may renegotiate the mode
    314314  with the IDE controller driver using EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode().
    315    
    316   The driver entity may collect timing information for various devices in any 
     315
     316  The driver entity may collect timing information for various devices in any
    317317  order. The driver entity is responsible for making sure that all the dependencies
    318   are satisfied. For example, the SupportedModes information for device A that 
    319   was previously returned may become stale after a call to 
     318  are satisfied. For example, the SupportedModes information for device A that
     319  was previously returned may become stale after a call to
    320320  EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() for device B.
    321  
    322   The buffer SupportedModes is allocated by the callee because the caller does 
    323   not necessarily know the size of the buffer. The type EFI_ATA_COLLECTIVE_MODE 
    324   is defined in a way that allows for future extensibility and can be of variable 
    325   length. This memory pool should be deallocated by the caller when it is no 
    326   longer necessary. 
    327  
    328   The IDE controller driver for a Serial ATA (SATA) controller can use this 
    329   member function to force a lower speed (first-generation [Gen1] speeds on a 
    330   second-generation [Gen2]-capable hardware).  The IDE controller driver can 
    331   also allow the driver entity to stay with the speed that has been negotiated 
     321
     322  The buffer SupportedModes is allocated by the callee because the caller does
     323  not necessarily know the size of the buffer. The type EFI_ATA_COLLECTIVE_MODE
     324  is defined in a way that allows for future extensibility and can be of variable
     325  length. This memory pool should be deallocated by the caller when it is no
     326  longer necessary.
     327
     328  The IDE controller driver for a Serial ATA (SATA) controller can use this
     329  member function to force a lower speed (first-generation [Gen1] speeds on a
     330  second-generation [Gen2]-capable hardware).  The IDE controller driver can
     331  also allow the driver entity to stay with the speed that has been negotiated
    332332  by the physical layer.
    333  
     333
    334334  @param[in]  This             The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
    335335  @param[in]  Channel          A zero-based channel number.
     
    339339  @retval EFI_SUCCESS             SupportedModes was returned.
    340340  @retval EFI_INVALID_PARAMETER   Channel is invalid (Channel >= ChannelCount).
    341   @retval EFI_INVALID_PARAMETER   Device is invalid. 
     341  @retval EFI_INVALID_PARAMETER   Device is invalid.
    342342  @retval EFI_INVALID_PARAMETER   SupportedModes is NULL.
    343   @retval EFI_NOT_READY           Modes cannot be calculated due to a lack of 
    344                                   data.  This error may happen if 
    345                                   EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() 
    346                                   and EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyData() 
    347                                   were not called for at least one drive in the 
     343  @retval EFI_NOT_READY           Modes cannot be calculated due to a lack of
     344                                  data.  This error may happen if
     345                                  EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
     346                                  and EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyData()
     347                                  were not called for at least one drive in the
    348348                                  same enumeration group.
    349349
     
    363363  so that the specified device can operate at the specified mode.
    364364
    365   This function is used by the driver entity to instruct the IDE controller 
    366   driver to program the IDE controller hardware to the specified modes. This 
    367   function can be called only once for a particular device. For a Serial ATA 
     365  This function is used by the driver entity to instruct the IDE controller
     366  driver to program the IDE controller hardware to the specified modes. This
     367  function can be called only once for a particular device. For a Serial ATA
    368368  (SATA) Advanced Host Controller Interface (AHCI) controller, no controller-
    369369  specific programming may be required.
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c

    r58459 r58466  
    5353
    5454  @param  This            The EFI_TIMER_ARCH_PROTOCOL instance.
    55   @param  NotifyFunction  The function to call when a timer interrupt fires. 
    56                           This function executes at TPL_HIGH_LEVEL.  The DXE 
    57                           Core will register a handler for the timer interrupt, 
    58                           so it can know how much time has passed.  This 
    59                           information is used to signal timer based events. 
     55  @param  NotifyFunction  The function to call when a timer interrupt fires.
     56                          This function executes at TPL_HIGH_LEVEL.  The DXE
     57                          Core will register a handler for the timer interrupt,
     58                          so it can know how much time has passed.  This
     59                          information is used to signal timer based events.
    6060                          NULL will unregister the handler.
    6161
     
    9191  @param  This         The EFI_TIMER_ARCH_PROTOCOL instance.
    9292  @param  TimerPeriod  The rate to program the timer interrupt in 100 nS units.
    93                        If the timer hardware is not programmable, then 
    94                        EFI_UNSUPPORTED is returned.  If the timer is programmable, 
    95                        then the timer period will be rounded up to the nearest 
    96                        timer period that is supported by the timer hardware. 
    97                        If TimerPeriod is set to 0, then the timer interrupts 
     93                       If the timer hardware is not programmable, then
     94                       EFI_UNSUPPORTED is returned.  If the timer is programmable,
     95                       then the timer period will be rounded up to the nearest
     96                       timer period that is supported by the timer hardware.
     97                       If TimerPeriod is set to 0, then the timer interrupts
    9898                       will be disabled.
    9999
     
    143143
    144144  @retval  EFI_SUCCESS       The soft timer interrupt was generated.
    145   @retval  EFI_UNSUPPORTEDT  The platform does not support the generation of soft 
     145  @retval  EFI_UNSUPPORTEDT  The platform does not support the generation of soft
    146146                             timer interrupts.
    147147
     
    152152  IN EFI_TIMER_ARCH_PROTOCOL  *This
    153153  );
    154  
     154
    155155///
    156156/// The handle onto which the Timer Architectural Protocol will be installed.
     
    223223
    224224///
    225 /// Cached state of the Configuration register for the HPET Timer managed by 
     225/// Cached state of the Configuration register for the HPET Timer managed by
    226226/// this driver.  Caching the state reduces the number of times the configuration
    227227/// register is read.
     
    278278  )
    279279{
    280   mHpetGeneralConfiguration.Bits.MainCounterEnable = Enable ? 1 : 0; 
     280  mHpetGeneralConfiguration.Bits.MainCounterEnable = Enable ? 1 : 0;
    281281  HpetWrite (HPET_GENERAL_CONFIGURATION_OFFSET, mHpetGeneralConfiguration.Uint64);
    282282}
     
    287287  If a notification function is registered, then the amount of time since the last
    288288  HPET interrupt is passed to that notification function in 100 ns units.  The HPET
    289   time is updated to generate another interrupt in the required time period. 
     289  time is updated to generate another interrupt in the required time period.
    290290
    291291  @param  InterruptType  The type of interrupt that occured.
     
    323323  //
    324324  HpetEnable (FALSE);
    325  
     325
    326326  //
    327327  // Capture main counter value
     
    364364  //
    365365  HpetEnable (TRUE);
    366  
     366
    367367  //
    368368  // Check to see if there is a registered notification function
     
    370370  if (mTimerNotifyFunction != NULL) {
    371371    //
    372     // Compute time since last notification in 100 ns units (10 ^ -7) 
     372    // Compute time since last notification in 100 ns units (10 ^ -7)
    373373    //
    374374    if (MainCounter > mPreviousMainCounter) {
     
    387387                      Delta & mCounterMask,
    388388                      mHpetGeneralCapabilities.Bits.CounterClockPeriod
    389                       ), 
     389                      ),
    390390                    100000000
    391391                    );
    392                    
     392
    393393    //
    394394    // Call registered notification function passing in the time since the last
    395395    // interrupt in 100 ns units.
    396     //   
     396    //
    397397    mTimerNotifyFunction (TimerPeriod);
    398398  }
    399  
     399
    400400  //
    401401  // Save main counter value
     
    418418
    419419  @param  This            The EFI_TIMER_ARCH_PROTOCOL instance.
    420   @param  NotifyFunction  The function to call when a timer interrupt fires. 
    421                           This function executes at TPL_HIGH_LEVEL.  The DXE 
    422                           Core will register a handler for the timer interrupt, 
    423                           so it can know how much time has passed.  This 
    424                           information is used to signal timer based events. 
     420  @param  NotifyFunction  The function to call when a timer interrupt fires.
     421                          This function executes at TPL_HIGH_LEVEL.  The DXE
     422                          Core will register a handler for the timer interrupt,
     423                          so it can know how much time has passed.  This
     424                          information is used to signal timer based events.
    425425                          NULL will unregister the handler.
    426426
     
    474474  @param  This         The EFI_TIMER_ARCH_PROTOCOL instance.
    475475  @param  TimerPeriod  The rate to program the timer interrupt in 100 nS units.
    476                        If the timer hardware is not programmable, then 
    477                        EFI_UNSUPPORTED is returned.  If the timer is programmable, 
    478                        then the timer period will be rounded up to the nearest 
    479                        timer period that is supported by the timer hardware. 
    480                        If TimerPeriod is set to 0, then the timer interrupts 
     476                       If the timer hardware is not programmable, then
     477                       EFI_UNSUPPORTED is returned.  If the timer is programmable,
     478                       then the timer period will be rounded up to the nearest
     479                       timer period that is supported by the timer hardware.
     480                       If TimerPeriod is set to 0, then the timer interrupts
    481481                       will be disabled.
    482482
     
    497497  UINT64                         CurrentComparator;
    498498  HPET_TIMER_MSI_ROUTE_REGISTER  HpetTimerMsiRoute;
    499  
     499
    500500  //
    501501  // Disable HPET timer when adjusting the timer period
    502502  //
    503503  HpetEnable (FALSE);
    504  
     504
    505505  if (TimerPeriod == 0) {
    506506    if (mTimerPeriod != 0) {
     
    511511      if (MainCounter < mPreviousMainCounter) {
    512512        Delta = (mCounterMask - mPreviousMainCounter) + MainCounter;
    513       } else { 
     513      } else {
    514514        Delta = MainCounter - mPreviousMainCounter;
    515515      }
     
    530530    // If TimerPeriod is 0, then mask HPET Timer interrupts
    531531    //
    532    
     532
    533533    if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
    534534      //
     
    542542      IoApicEnableInterrupt (mTimerIrq, FALSE);
    543543    }
    544    
    545     //
    546     // Disable HPET timer interrupt 
     544
     545    //
     546    // Disable HPET timer interrupt
    547547    //
    548548    mTimerConfiguration.Bits.InterruptEnable = 0;
     
    550550  } else {
    551551    //
    552     // Convert TimerPeriod to femtoseconds and divide by the number if femtoseconds 
     552    // Convert TimerPeriod to femtoseconds and divide by the number if femtoseconds
    553553    // per tick of the HPET counter to determine the number of HPET counter ticks
    554554    // in TimerPeriod 100 ns units.
    555     // 
     555    //
    556556    mTimerCount = DivU64x32 (
    557557                    MultU64x32 (TimerPeriod, 100000000),
     
    565565    if (MainCounter > mPreviousMainCounter) {
    566566      Delta = MainCounter - mPreviousMainCounter;
    567     } else { 
     567    } else {
    568568      Delta = (mCounterMask - mPreviousMainCounter) + MainCounter;
    569569    }
    570570    if ((Delta & mCounterMask) >= mTimerCount) {
    571571      HpetWrite (HPET_TIMER_COMPARATOR_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, (MainCounter + 1) & mCounterMask);
    572     } else { 
     572    } else {
    573573      HpetWrite (HPET_TIMER_COMPARATOR_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, (mPreviousMainCounter + mTimerCount) & mCounterMask);
    574574    }
    575    
     575
    576576    //
    577577    // Enable HPET Timer interrupt generation
     
    604604    HpetWrite (HPET_TIMER_CONFIGURATION_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, mTimerConfiguration.Uint64);
    605605  }
    606    
     606
    607607  //
    608608  // Save the new timer period
     
    617617  //
    618618  HpetEnable (TRUE);
    619  
     619
    620620  return EFI_SUCCESS;
    621621}
     
    663663
    664664  @retval  EFI_SUCCESS       The soft timer interrupt was generated.
    665   @retval  EFI_UNSUPPORTEDT  The platform does not support the generation of soft 
     665  @retval  EFI_UNSUPPORTEDT  The platform does not support the generation of soft
    666666                             timer interrupts.
    667667
     
    680680  //
    681681  // Disable interrupts
    682   // 
     682  //
    683683  Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
    684  
     684
    685685  //
    686686  // Capture main counter value
     
    693693  if (mTimerNotifyFunction != NULL) {
    694694    //
    695     // Compute time since last interrupt in 100 ns units (10 ^ -7) 
     695    // Compute time since last interrupt in 100 ns units (10 ^ -7)
    696696    //
    697697    if (MainCounter > mPreviousMainCounter) {
     
    711711                      Delta & mCounterMask,
    712712                      mHpetGeneralCapabilities.Bits.CounterClockPeriod
    713                       ), 
     713                      ),
    714714                    100000000
    715715                    );
    716                    
     716
    717717    //
    718718    // Call registered notification function passing in the time since the last
    719719    // interrupt in 100 ns units.
    720     //   
     720    //
    721721    mTimerNotifyFunction (TimerPeriod);
    722722  }
     
    726726  //
    727727  mPreviousMainCounter = MainCounter;
    728  
     728
    729729  //
    730730  // Restore interrupts
    731   // 
     731  //
    732732  gBS->RestoreTPL (Tpl);
    733  
     733
    734734  return EFI_SUCCESS;
    735735}
     
    773773  //
    774774  // Retrieve HPET Capabilities and Configuration Information
    775   // 
     775  //
    776776  mHpetGeneralCapabilities.Uint64  = HpetRead (HPET_GENERAL_CAPABILITIES_ID_OFFSET);
    777777  mHpetGeneralConfiguration.Uint64 = HpetRead (HPET_GENERAL_CONFIGURATION_OFFSET);
    778  
    779   //
    780   // If Revision is not valid, then ASSERT() and unload the driver because the HPET 
     778
     779  //
     780  // If Revision is not valid, then ASSERT() and unload the driver because the HPET
    781781  // device is not present.
    782   // 
     782  //
    783783  ASSERT (mHpetGeneralCapabilities.Uint64 != 0);
    784784  ASSERT (mHpetGeneralCapabilities.Uint64 != 0xFFFFFFFFFFFFFFFFULL);
     
    795795  //
    796796  // Dump HPET Configuration Information
    797   // 
     797  //
    798798  DEBUG_CODE (
    799799    DEBUG ((DEBUG_INFO, "HPET Base Address = 0x%08x\n", PcdGet32 (PcdHpetBaseAddress)));
     
    809809    }
    810810  );
    811  
     811
    812812  //
    813813  // Capture the current HPET main counter value.
    814814  //
    815815  mPreviousMainCounter = HpetRead (HPET_MAIN_COUNTER_OFFSET);
    816  
    817   //
    818   // Determine the interrupt mode to use for the HPET Timer. 
     816
     817  //
     818  // Determine the interrupt mode to use for the HPET Timer.
    819819  // Look for MSI first, then unused PIC mode interrupt, then I/O APIC mode interrupt
    820   // 
     820  //
    821821  MsiTimerIndex = HPET_INVALID_TIMER_INDEX;
    822822  mTimerIndex   = HPET_INVALID_TIMER_INDEX;
     
    826826    //
    827827    mTimerConfiguration.Uint64 = HpetRead (HPET_TIMER_CONFIGURATION_OFFSET + TimerIndex * HPET_TIMER_STRIDE);
    828    
    829     //
    830     // Check to see if this HPET Timer supports MSI 
     828
     829    //
     830    // Check to see if this HPET Timer supports MSI
    831831    //
    832832    if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0) {
     
    838838      }
    839839    }
    840    
     840
    841841    //
    842842    // Check to see if this HPET Timer supports I/O APIC interrupts
     
    881881      return EFI_DEVICE_ERROR;
    882882    }
    883    
     883
    884884    //
    885885    // Initialize I/O APIC entry for HPET Timer Interrupt
     
    901901  //
    902902  // Configure the selected HPET Timer with settings common to both MSI mode and I/O APIC mode
    903   //   Clear InterruptEnable to keep interrupts disabled until full init is complete 
    904   //   Clear PeriodicInterruptEnable to use one-shot mode 
    905   //   Configure as a 32-bit counter 
     903  //   Clear InterruptEnable to keep interrupts disabled until full init is complete
     904  //   Clear PeriodicInterruptEnable to use one-shot mode
     905  //   Configure as a 32-bit counter
    906906  //
    907907  mTimerConfiguration.Bits.InterruptEnable         = 0;
     
    909909  mTimerConfiguration.Bits.CounterSizeEnable       = 1;
    910910  HpetWrite (HPET_TIMER_CONFIGURATION_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, mTimerConfiguration.Uint64);
    911  
     911
    912912  //
    913913  // Read the HPET Timer Capabilities and Configuration register back again.
     
    960960      DEBUG ((DEBUG_INFO, "HPET Interrupt Mode I/O APIC\n"));
    961961      DEBUG ((DEBUG_INFO, "HPET I/O APIC IRQ         = 0x%02x\n",  mTimerIrq));
    962     } 
     962    }
    963963    DEBUG ((DEBUG_INFO, "HPET Interrupt Vector     = 0x%02x\n",    PcdGet8 (PcdHpetLocalApicVector)));
    964964    DEBUG ((DEBUG_INFO, "HPET Counter Mask         = 0x%016lx\n",  mCounterMask));
     
    971971    //
    972972    // Wait for a few timer interrupts to fire before continuing
    973     // 
     973    //
    974974    while (mNumTicks < 10);
    975975  );
    976  
     976
    977977  //
    978978  // Install the Timer Architectural Protocol onto a new handle
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf

    r58459 r58466  
    33#
    44# Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
    5 # This program and the accompanying materials                         
    6 # are licensed and made available under the terms and conditions of the BSD License         
    7 # which accompanies this distribution.  The full text of the license may be found at       
    8 # http://opensource.org/licenses/bsd-license.php                                           
    9 #                                                                                           
    10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5# This program and the accompanying materials
     6# are licensed and made available under the terms and conditions of the BSD License
     7# which accompanies this distribution.  The full text of the license may be found at
     8# http://opensource.org/licenses/bsd-license.php
     9#
     10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212#
    1313##
     
    3131[Sources]
    3232  HpetTimer.c
    33  
     33
    3434[Packages]
    3535  MdePkg/MdePkg.dec
    3636  UefiCpuPkg/UefiCpuPkg.dec
    3737  PcAtChipsetPkg/PcAtChipsetPkg.dec
    38  
     38
    3939[LibraryClasses]
    4040  PcdLib
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Include/Library/IoApicLib.h

    r48674 r58466  
    2222
    2323  If Index is >= 0x100, then ASSERT().
    24  
     24
    2525  @param  Index  Specifies the I/O APIC register to read.
    2626
     
    3737
    3838  If Index is >= 0x100, then ASSERT().
    39  
     39
    4040  @param  Index  Specifies the I/O APIC register to write.
    4141  @param  Value  Specifies the value to write to the I/O APIC register specified by Index.
     
    5353  Set the interrupt mask of an I/O APIC interrupt.
    5454
    55   If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). 
    56  
     55  If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().
     56
    5757  @param  Irq     Specifies the I/O APIC interrupt to enable or disable.
    5858  @param  Enable  If TRUE, then enable the I/O APIC interrupt specified by Irq.
     
    6868/**
    6969  Configures an I/O APIC interrupt.
    70  
     70
    7171  Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical
    72   mode to the Local APIC of the currntly executing CPU.  The default state of the 
     72  mode to the Local APIC of the currntly executing CPU.  The default state of the
    7373  entry is for the interrupt to be disabled (masked).  IoApicEnableInterrupts() must
    7474  be used to enable(unmask) the I/O APIC Interrupt.
    7575
    76   If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). 
     76  If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().
    7777  If Vector >= 0x100, then ASSERT().
    7878  If DeliveryMode is not supported, then ASSERT().
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Include/Register/Hpet.h

    r48674 r58466  
    11/** @file
    2   HPET register definitions from the IA-PC HPET (High Precision Event Timers) 
     2  HPET register definitions from the IA-PC HPET (High Precision Event Timers)
    33  Specification, Revision 1.0a, October 2004.
    44
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Include/Register/IoApic.h

    r48674 r58466  
    11/** @file
    2   I/O APIC Register Definitions from 82093AA I/O Advanced Programmable Interrupt 
     2  I/O APIC Register Definitions from 82093AA I/O Advanced Programmable Interrupt
    33  Controller (IOAPIC), 1996.
    4  
     4
    55  Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
    66  This program and the accompanying materials
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/IsaAcpiDxe/ComponentName.c

    r48674 r58466  
    33
    44Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
    5 This program and the accompanying materials                         
    6 are licensed and made available under the terms and conditions of the BSD License         
    7 which accompanies this distribution.  The full text of the license may be found at       
    8 http://opensource.org/licenses/bsd-license.php                                           
    9                                                                                          
    10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5This program and the accompanying materials
     6are licensed and made available under the terms and conditions of the BSD License
     7which accompanies this distribution.  The full text of the license may be found at
     8http://opensource.org/licenses/bsd-license.php
     9
     10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212**/
    1313
     
    220220           Language,
    221221           This->SupportedLanguages,
    222            mPcatIsaAcpiDriverNameTable, 
     222           mPcatIsaAcpiDriverNameTable,
    223223           DriverName,
    224224           (BOOLEAN)(This == &gPcatIsaAcpiComponentName)
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.c

    r58459 r58466  
    33
    44Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
    5 This program and the accompanying materials                         
    6 are licensed and made available under the terms and conditions of the BSD License         
    7 which accompanies this distribution.  The full text of the license may be found at       
    8 http://opensource.org/licenses/bsd-license.php                                           
    9                                                                                          
    10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5This program and the accompanying materials
     6are licensed and made available under the terms and conditions of the BSD License
     7which accompanies this distribution.  The full text of the license may be found at
     8http://opensource.org/licenses/bsd-license.php
     9
     10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212**/
    1313
     
    147147  Enumerate the ISA devices on the ISA bus.
    148148
    149   @param Device             Point to device ID instance 
     149  @param Device             Point to device ID instance
    150150  @param IsaAcpiDevice      On return, point to resource data for Isa device
    151151  @param NextIsaAcpiDevice  On return, point to resource data for next Isa device
     
    168168  } else {
    169169    for(Index = 0; gPcatIsaAcpiDeviceList[Index].ResourceItem != NULL; Index++) {
    170       if (Device->HID == gPcatIsaAcpiDeviceList[Index].Device.HID && 
     170      if (Device->HID == gPcatIsaAcpiDeviceList[Index].Device.HID &&
    171171          Device->UID == gPcatIsaAcpiDeviceList[Index].Device.UID    ) {
    172172        break;
     
    189189
    190190  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    191   @param Device          Point to device ID instance 
     191  @param Device          Point to device ID instance
    192192
    193193  @retval EFI_NOT_FOUND Can not found the next Isa device.
     
    218218
    219219  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    220   @param Device          Point to device ID instance 
     220  @param Device          Point to device ID instance
    221221  @param OnOff           TRUE for setting isa device power on,
    222222                         FALSE for setting isa device power off
     
    233233{
    234234  return EFI_SUCCESS;
    235 } 
     235}
    236236
    237237/**
     
    239239
    240240  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    241   @param Device          Point to device ID instance 
     241  @param Device          Point to device ID instance
    242242  @param ResourceList    On return, point to resources instances for given isa device
    243243
     
    249249IsaGetCurrentResource (
    250250  IN  EFI_ISA_ACPI_PROTOCOL       *This,
    251   IN  EFI_ISA_ACPI_DEVICE_ID      *Device, 
     251  IN  EFI_ISA_ACPI_DEVICE_ID      *Device,
    252252  OUT EFI_ISA_ACPI_RESOURCE_LIST  **ResourceList
    253253  )
     
    262262/**
    263263  Get possible resource for the specific ISA device.
    264  
    265   @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    266   @param Device          Point to device ID instance 
     264
     265  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
     266  @param Device          Point to device ID instance
    267267  @param ResourceList    On return, point to resources instances for given isa device
    268268
     
    273273IsaGetPossibleResource (
    274274  IN  EFI_ISA_ACPI_PROTOCOL       *This,
    275   IN  EFI_ISA_ACPI_DEVICE_ID      *Device, 
     275  IN  EFI_ISA_ACPI_DEVICE_ID      *Device,
    276276  OUT EFI_ISA_ACPI_RESOURCE_LIST  **ResourceList
    277277  )
     
    284284
    285285  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    286   @param Device          Point to device ID instance 
     286  @param Device          Point to device ID instance
    287287  @param ResourceList    Point to resources instances for given isa device
    288288
     
    294294IsaSetResource (
    295295  IN EFI_ISA_ACPI_PROTOCOL       *This,
    296   IN EFI_ISA_ACPI_DEVICE_ID      *Device, 
     296  IN EFI_ISA_ACPI_DEVICE_ID      *Device,
    297297  IN EFI_ISA_ACPI_RESOURCE_LIST  *ResourceList
    298298  )
     
    300300  return EFI_SUCCESS;
    301301}
    302        
     302
    303303/**
    304304  Enable/Disable the specific ISA device.
    305305
    306306  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    307   @param Device          Point to device ID instance 
     307  @param Device          Point to device ID instance
    308308  @param Enable          Enable/Disable
    309309
     
    319319  )
    320320{
    321   return EFI_SUCCESS; 
     321  return EFI_SUCCESS;
    322322}
    323323
     
    326326
    327327  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    328   @param Device          Point to device ID instance 
     328  @param Device          Point to device ID instance
    329329
    330330  @return EFI_SUCESS  Success to initialize.
     
    354354IsaInterfaceInit (
    355355  IN EFI_ISA_ACPI_PROTOCOL  *This
    356 ) 
    357 {
    358   return EFI_SUCCESS;
    359 } 
     356)
     357{
     358  return EFI_SUCCESS;
     359}
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/IsaAcpiDxe/PcatIsaAcpi.c

    r58459 r58466  
    4343{
    4444  return EfiLibInstallDriverBindingComponentName2 (
    45            ImageHandle, 
    46            SystemTable, 
     45           ImageHandle,
     46           SystemTable,
    4747           &gPcatIsaAcpiDriverBinding,
    4848           ImageHandle,
     
    5555  ControllerDriver Protocol Method
    5656
    57   @param This                 Driver Binding protocol instance pointer.   
     57  @param This                 Driver Binding protocol instance pointer.
    5858  @param Controller           Handle of device to test.
    5959  @param RemainingDevicePath  Optional parameter use to pick a specific child
     
    8181  //
    8282  // Get PciIo protocol instance
    83   //             
     83  //
    8484  Status = gBS->OpenProtocol (
    85                   Controller, 
    86                   &gEfiPciIoProtocolGuid, 
     85                  Controller,
     86                  &gEfiPciIoProtocolGuid,
    8787                  (VOID**)&PciIo,
    8888                  This->DriverBindingHandle,
     
    9898                    EfiPciIoWidthUint32,
    9999                    0,
    100                     sizeof(Pci) / sizeof(UINT32), 
     100                    sizeof(Pci) / sizeof(UINT32),
    101101                    &Pci);
    102102
     
    110110        if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA) {
    111111          Status = EFI_SUCCESS;
    112         } 
     112        }
    113113
    114114        //
    115115        // See if this is an Intel PCI to ISA bridge in Positive Decode Mode
    116116        //
    117         if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE && 
     117        if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE &&
    118118            Pci.Hdr.VendorId     == 0x8086                          ) {
    119119          //
    120           // See if this is on Function #0 to avoid false positives on 
    121           // PCI_CLASS_BRIDGE_OTHER that has the same value as 
     120          // See if this is on Function #0 to avoid false positives on
     121          // PCI_CLASS_BRIDGE_OTHER that has the same value as
    122122          // PCI_CLASS_BRIDGE_ISA_PDECODE
    123123          //
    124124          Status = PciIo->GetLocation (
    125                             PciIo, 
    126                             &SegmentNumber, 
    127                             &BusNumber, 
    128                             &DeviceNumber, 
     125                            PciIo,
     126                            &SegmentNumber,
     127                            &BusNumber,
     128                            &DeviceNumber,
    129129                            &FunctionNumber
    130130                            );
     
    135135          }
    136136        }
    137       } 
     137      }
    138138    }
    139139  }
    140140
    141141  gBS->CloseProtocol (
    142          Controller,       
    143          &gEfiPciIoProtocolGuid, 
    144          This->DriverBindingHandle,   
    145          Controller   
     142         Controller,
     143         &gEfiPciIoProtocolGuid,
     144         This->DriverBindingHandle,
     145         Controller
    146146         );
    147  
     147
    148148  return Status;
    149149}
     
    183183  PciIo = NULL;
    184184  Status = gBS->OpenProtocol (
    185                   Controller,       
    186                   &gEfiPciIoProtocolGuid, 
     185                  Controller,
     186                  &gEfiPciIoProtocolGuid,
    187187                  (VOID**)&PciIo,
    188                   This->DriverBindingHandle,   
    189                   Controller,   
    190                   EFI_OPEN_PROTOCOL_BY_DRIVER 
     188                  This->DriverBindingHandle,
     189                  Controller,
     190                  EFI_OPEN_PROTOCOL_BY_DRIVER
    191191                  );
    192192  if (EFI_ERROR (Status)) {
     
    211211    Status = EFI_UNSUPPORTED;
    212212    goto Done;
    213   } 
     213  }
    214214
    215215  Enabled = TRUE;
    216216  Status = PciIo->Attributes (
    217                     PciIo, 
    218                     EfiPciIoAttributeOperationEnable, 
    219                     EFI_PCI_DEVICE_ENABLE | Supports | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO, 
    220                     NULL 
     217                    PciIo,
     218                    EfiPciIoAttributeOperationEnable,
     219                    EFI_PCI_DEVICE_ENABLE | Supports | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO,
     220                    NULL
    221221                    );
    222222  if (EFI_ERROR (Status)) {
    223223    goto Done;
    224224  }
    225  
     225
    226226  //
    227227  // Allocate memory for the PCAT ISA ACPI Device structure
     
    248248  //
    249249  InitializePcatIsaAcpiDeviceList ();
    250  
     250
    251251  //
    252252  // IsaAcpi interface
     
    260260  (PcatIsaAcpiDev->IsaAcpi).InitDevice       = IsaInitDevice;
    261261  (PcatIsaAcpiDev->IsaAcpi).InterfaceInit    = IsaInterfaceInit;
    262    
     262
    263263  //
    264264  // Install the ISA ACPI Protocol interface
     
    274274    if (PciIo != NULL && Enabled) {
    275275      PciIo->Attributes (
    276                PciIo, 
    277                EfiPciIoAttributeOperationDisable, 
     276               PciIo,
     277               EfiPciIoAttributeOperationDisable,
    278278               EFI_PCI_DEVICE_ENABLE | Supports | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO,
    279                NULL 
     279               NULL
    280280               );
    281281    }
    282282    gBS->CloseProtocol (
    283            Controller, 
    284            &gEfiPciIoProtocolGuid, 
    285            This->DriverBindingHandle, 
     283           Controller,
     284           &gEfiPciIoProtocolGuid,
     285           This->DriverBindingHandle,
    286286           Controller
    287287           );
     
    291291    return Status;
    292292  }
    293          
     293
    294294  return EFI_SUCCESS;
    295295}
     
    323323  PCAT_ISA_ACPI_DEV      *PcatIsaAcpiDev;
    324324  UINT64                 Supports;
    325  
     325
    326326  //
    327327  // Get the ISA ACPI Protocol Interface
    328   // 
     328  //
    329329  Status = gBS->OpenProtocol (
    330                   Controller, 
    331                   &gEfiIsaAcpiProtocolGuid, 
     330                  Controller,
     331                  &gEfiIsaAcpiProtocolGuid,
    332332                  (VOID**)&IsaAcpi,
    333                   This->DriverBindingHandle,   
    334                   Controller,   
     333                  This->DriverBindingHandle,
     334                  Controller,
    335335                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
    336336                  );
     
    360360
    361361  PcatIsaAcpiDev->PciIo->Attributes (
    362                            PcatIsaAcpiDev->PciIo, 
    363                            EfiPciIoAttributeOperationDisable, 
     362                           PcatIsaAcpiDev->PciIo,
     363                           EfiPciIoAttributeOperationDisable,
    364364                           EFI_PCI_DEVICE_ENABLE | Supports | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO,
    365                            NULL 
     365                           NULL
    366366                           );
    367  
     367
    368368  //
    369369  // Uninstall protocol interface: EFI_ISA_ACPI_PROTOCOL
     
    378378
    379379  gBS->CloseProtocol (
    380          Controller, 
    381          &gEfiPciIoProtocolGuid, 
    382          This->DriverBindingHandle, 
     380         Controller,
     381         &gEfiPciIoProtocolGuid,
     382         This->DriverBindingHandle,
    383383         Controller
    384384         );
    385  
     385
    386386  gBS->FreePool (PcatIsaAcpiDev);
    387  
     387
    388388  return EFI_SUCCESS;
    389389}
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/IsaAcpiDxe/PcatIsaAcpi.h

    r48674 r58466  
    33
    44Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
    5 This program and the accompanying materials                         
    6 are licensed and made available under the terms and conditions of the BSD License         
    7 which accompanies this distribution.  The full text of the license may be found at       
    8 http://opensource.org/licenses/bsd-license.php                                           
    9                                                                                          
    10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5This program and the accompanying materials
     6are licensed and made available under the terms and conditions of the BSD License
     7which accompanies this distribution.  The full text of the license may be found at
     8http://opensource.org/licenses/bsd-license.php
     9
     10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212
    1313**/
     
    4141typedef struct {
    4242  UINTN                  Signature;
    43   EFI_HANDLE             Handle;   
     43  EFI_HANDLE             Handle;
    4444  EFI_ISA_ACPI_PROTOCOL  IsaAcpi;
    4545  EFI_PCI_IO_PROTOCOL    *PciIo;
     
    6464  ControllerDriver Protocol Method
    6565
    66   @param This                 Driver Binding protocol instance pointer.   
     66  @param This                 Driver Binding protocol instance pointer.
    6767  @param Controller           Handle of device to test.
    6868  @param RemainingDevicePath  Optional parameter use to pick a specific child
     
    131131
    132132  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    133   @param Device          Point to device ID instance 
     133  @param Device          Point to device ID instance
    134134
    135135  @retval EFI_NOT_FOUND Can not found the next Isa device.
     
    149149
    150150  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    151   @param Device          Point to device ID instance 
     151  @param Device          Point to device ID instance
    152152  @param OnOff           TRUE for setting isa device power on,
    153153                         FALSE for setting isa device power off
     
    162162  IN BOOLEAN                 OnOff
    163163  );
    164  
     164
    165165/**
    166166  Get current resource for the specific ISA device.
    167167
    168168  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    169   @param Device          Point to device ID instance 
     169  @param Device          Point to device ID instance
    170170  @param ResourceList    On return, point to resources instances for given isa device
    171171
     
    180180  OUT EFI_ISA_ACPI_RESOURCE_LIST  **ResourceList
    181181  );
    182  
     182
    183183/**
    184184  Get possible resource for the specific ISA device.
    185  
    186   @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    187   @param Device          Point to device ID instance 
     185
     186  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
     187  @param Device          Point to device ID instance
    188188  @param ResourceList    On return, point to resources instances for given isa device
    189189
     
    194194IsaGetPossibleResource (
    195195  IN  EFI_ISA_ACPI_PROTOCOL       *This,
    196   IN  EFI_ISA_ACPI_DEVICE_ID      *Device, 
     196  IN  EFI_ISA_ACPI_DEVICE_ID      *Device,
    197197  OUT EFI_ISA_ACPI_RESOURCE_LIST  **ResourceList
    198198  );
    199  
     199
    200200/**
    201201  Set resource for the specific ISA device.
    202202
    203203  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    204   @param Device          Point to device ID instance 
     204  @param Device          Point to device ID instance
    205205  @param ResourceList    Point to resources instances for given isa device
    206206
     
    215215  IN EFI_ISA_ACPI_RESOURCE_LIST  *ResourceList
    216216  );
    217  
     217
    218218/**
    219219  Enable/Disable the specific ISA device.
    220220
    221221  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    222   @param Device          Point to device ID instance 
     222  @param Device          Point to device ID instance
    223223  @param Enable          Enable/Disable
    224224
     
    238238
    239239  @param This            Point to instance of EFI_ISA_ACPI_PROTOCOL
    240   @param Device          Point to device ID instance 
     240  @param Device          Point to device ID instance
    241241
    242242  @return EFI_SUCESS  Success to initialize.
     
    249249  IN EFI_ISA_ACPI_DEVICE_ID  *Device
    250250  );
    251  
     251
    252252/**
    253253  Initialize the ISA interface.
     
    262262IsaInterfaceInit (
    263263  IN EFI_ISA_ACPI_PROTOCOL  *This
    264   ); 
     264  );
    265265
    266266/**
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/KbcResetDxe/Reset.inf

    r58459 r58466  
    55#
    66# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
    7 # This program and the accompanying materials                         
    8 # are licensed and made available under the terms and conditions of the BSD License         
    9 # which accompanies this distribution.  The full text of the license may be found at       
    10 # http://opensource.org/licenses/bsd-license.php                                           
    11 #                                                                                           
    12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     7# This program and the accompanying materials
     8# are licensed and made available under the terms and conditions of the BSD License
     9# which accompanies this distribution.  The full text of the license may be found at
     10# http://opensource.org/licenses/bsd-license.php
     11#
     12# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     13# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1414#
    1515#  Module Name:
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/KbcResetDxe/ResetEntry.c

    r48674 r58466  
    33
    44Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
    5 This program and the accompanying materials                         
    6 are licensed and made available under the terms and conditions of the BSD License         
    7 which accompanies this distribution.  The full text of the license may be found at       
    8 http://opensource.org/licenses/bsd-license.php                                           
    9                                                                                          
    10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5This program and the accompanying materials
     6are licensed and made available under the terms and conditions of the BSD License
     7which accompanies this distribution.  The full text of the license may be found at
     8http://opensource.org/licenses/bsd-license.php
     9
     10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212**/
    1313
     
    6666  Initialize the state information for the Reset Architectural Protocol.
    6767
    68   @param ImageHandle     Handle of the loaded driver 
     68  @param ImageHandle     Handle of the loaded driver
    6969  @param SystemTable     Pointer to the System Table
    7070
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c

    r58464 r58466  
    5757
    5858  //
    59   // ASSERT for the invalid PCD values. They must be configured to the real value. 
     59  // ASSERT for the invalid PCD values. They must be configured to the real value.
    6060  //
    6161  ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);
     
    6363
    6464  //
    65   // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then 
     65  // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then
    6666  // no PCI register programming is required to enable access to the the ACPI registers
    6767  // specified by PcdAcpiIoPortBaseAddress
     
    7272
    7373  //
    74   // ASSERT for the invalid PCD values. They must be configured to the real value. 
     74  // ASSERT for the invalid PCD values. They must be configured to the real value.
    7575  //
    7676  ASSERT (PcdGet8  (PcdAcpiIoPciDeviceNumber)   != 0xFF);
     
    100100      );
    101101  }
    102  
     102
    103103  return RETURN_SUCCESS;
    104104}
     
    118118{
    119119  UINT16  Port;
    120  
     120
    121121  Port = PcdGet16 (PcdAcpiIoPortBaseAddress);
    122  
    123   //
    124   // If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then 
    125   // read the PCI register for the ACPI BAR value in case the BAR has been programmed to a 
     122
     123  //
     124  // If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then
     125  // read the PCI register for the ACPI BAR value in case the BAR has been programmed to a
    126126  // value other than PcdAcpiIoPortBaseAddress
    127127  //
    128128  if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {
    129129    Port = PciRead16 (PCI_LIB_ADDRESS (
    130                         PcdGet8  (PcdAcpiIoPciBusNumber), 
    131                         PcdGet8  (PcdAcpiIoPciDeviceNumber), 
    132                         PcdGet8  (PcdAcpiIoPciFunctionNumber), 
     130                        PcdGet8  (PcdAcpiIoPciBusNumber),
     131                        PcdGet8  (PcdAcpiIoPciDeviceNumber),
     132                        PcdGet8  (PcdAcpiIoPciFunctionNumber),
    133133                        PcdGet16 (PcdAcpiIoPciBarRegisterOffset)
    134134                        ));
    135135  }
    136  
     136
    137137  return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);
    138138}
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c

    r58464 r58466  
    2828InternalGetPerformanceCounterFrequency (
    2929  VOID
    30   ) 
     30  )
    3131{
    3232  BOOLEAN  InterruptState;
    3333  UINT64   Count;
    3434  UINT64   Frequency;
    35  
     35
    3636  InterruptState = SaveAndDisableInterrupts ();
    3737  Count = GetPerformanceCounter ();
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf

    r58464 r58466  
    33#
    44#  Provides basic timer support using the ACPI timer hardware.  The performance
    5 #  counter features are provided by the processors time stamp counter. 
     5#  counter features are provided by the processors time stamp counter.
    66#
    77#  Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
     
    2929  AcpiTimerLib.c
    3030  BaseAcpiTimerLib.c
    31  
     31
    3232[Packages]
    3333  MdePkg/MdePkg.dec
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c

    r58464 r58466  
    3333InternalGetPerformanceCounterFrequency (
    3434  VOID
    35   ) 
     35  )
    3636{
    3737  BOOLEAN  InterruptState;
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf

    r58464 r58466  
    33#
    44#  Provides basic timer support using the ACPI timer hardware.  The performance
    5 #  counter features are provided by the processors time stamp counter. 
     5#  counter features are provided by the processors time stamp counter.
    66#
    77#  Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c

    r48674 r58466  
    1 /** @file 
     1/** @file
    22  I/O APIC library.
    33
     
    3131
    3232  If Index is >= 0x100, then ASSERT().
    33  
     33
    3434  @param  Index  Specifies the I/O APIC register to read.
    3535
     
    5151
    5252  If Index is >= 0x100, then ASSERT().
    53  
     53
    5454  @param  Index  Specifies the I/O APIC register to write.
    5555  @param  Value  Specifies the value to write to the I/O APIC register specified by Index.
     
    7272  Set the interrupt mask of an I/O APIC interrupt.
    7373
    74   If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). 
     74  If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().
    7575
    7676  @param  Irq     Specifies the I/O APIC interrupt to enable or disable.
     
    9999/**
    100100  Configures an I/O APIC interrupt.
    101  
     101
    102102  Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical
    103   mode to the Local APIC of the currntly executing CPU.  The default state of the 
     103  mode to the Local APIC of the currntly executing CPU.  The default state of the
    104104  entry is for the interrupt to be disabled (masked).  IoApicEnableInterrupts() must
    105105  be used to enable(unmask) the I/O APIC Interrupt.
    106  
    107   If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). 
     106
     107  If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().
    108108  If Vector >= 0x100, then ASSERT().
    109109  If DeliveryMode is not supported, then ASSERT().
     
    143143  ASSERT (Vector <= 0xFF);
    144144  ASSERT (DeliveryMode < 8 && DeliveryMode != 6 && DeliveryMode != 3);
    145  
     145
    146146  Entry.Uint32.Low = IoApicRead (IO_APIC_REDIRECTION_TABLE_ENTRY_INDEX + Irq * 2);
    147147  Entry.Bits.Vector          = (UINT8)Vector;
    148148  Entry.Bits.DeliveryMode    = (UINT32)DeliveryMode;
    149   Entry.Bits.DestinationMode = 0; 
     149  Entry.Bits.DestinationMode = 0;
    150150  Entry.Bits.Polarity        = AssertionLevel ? 0 : 1;
    151151  Entry.Bits.TriggerMode     = LevelTriggered ? 1 : 0;
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c

    r48674 r58466  
    5353/**
    5454  Initialize the serial device hardware.
    55  
     55
    5656  If no initialization is required, then return RETURN_SUCCESS.
    5757  If the serial device was successfuly initialized, then return RETURN_SUCCESS.
    5858  If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.
    59  
     59
    6060  @retval RETURN_SUCCESS        The serial device was initialized.
    6161  @retval RETURN_DEVICE_ERROR   The serail device could not be initialized.
     
    8181  //
    8282  Divisor = 115200 / gBps;
    83  
     83
    8484  //
    8585  // Set communications format
     
    104104
    105105/**
    106   Write data from buffer to serial device. 
    107  
    108   Writes NumberOfBytes data bytes from Buffer to the serial device. 
     106  Write data from buffer to serial device.
     107
     108  Writes NumberOfBytes data bytes from Buffer to the serial device.
    109109  The number of bytes actually written to the serial device is returned.
    110110  If the return value is less than NumberOfBytes, then the write operation failed.
    111111
    112   If Buffer is NULL, then ASSERT(). 
     112  If Buffer is NULL, then ASSERT().
    113113
    114114  If NumberOfBytes is zero, then return 0.
     
    118118
    119119  @retval 0                NumberOfBytes is 0.
    120   @retval >0               The number of bytes written to the serial device. 
     120  @retval >0               The number of bytes written to the serial device.
    121121                           If this value is less than NumberOfBytes, then the read operation failed.
    122122
     
    159159
    160160  @retval 0                NumberOfBytes is 0.
    161   @retval >0               The number of bytes read from the serial device. 
     161  @retval >0               The number of bytes read from the serial device.
    162162                           If this value is less than NumberOfBytes, then the read operation failed.
    163163
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/PcAtChipsetPkg.dec

    • Property svn:eol-style set to native
    r58459 r58466  
    3131  #
    3232  IoApicLib|Include/Library/IoApicLib.h
    33  
     33
    3434[Guids]
    3535  gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }
     
    4747  #     Because only clock interrupt is allowed in legacy mode in pure UEFI platform.<BR>
    4848  #  2) If platform install CSM and use thunk module:<BR>
    49   #     a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit 
     49  #     a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit
    5050  #        should be opened as 0.<BR>
    5151  #        For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 1, then
     
    5555  #
    5656  #  The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely
    57   #  need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to 
     57  #  need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to
    5858  #  mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.<BR>
    5959  # @Prompt 8259 Legacy Mode mask.
    6060  gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001
    61  
     61
    6262  ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.
    6363  #  For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
     
    113113  # @Prompt Default period of HPET timer.
    114114  gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B
    115  
     115
    116116  ## This PCD specifies the base address of the IO APIC.
    117117  # @Prompt IO APIC base address.
     
    125125  # @Prompt Maximal valid year in RTC.
    126126  gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2099|UINT16|0x0000000E
    127  
     127
    128128[PcdsFixedAtBuild, PcdsPatchableInModule]
    129129  ## Defines the ACPI register set base address.
    130   #  The invalid 0xFFFF is as its default value. It must be configured to the real value. 
     130  #  The invalid 0xFFFF is as its default value. It must be configured to the real value.
    131131  # @Prompt ACPI Timer IO Port Address
    132132  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress         |0xFFFF|UINT16|0x00000010
     
    137137
    138138  ## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
    139   #  The invalid 0xFF is as its default value. It must be configured to the real value. 
     139  #  The invalid 0xFF is as its default value. It must be configured to the real value.
    140140  # @Prompt ACPI Hardware PCI Device Number
    141141  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber         |  0xFF| UINT8|0x00000012
    142142
    143143  ## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
    144   #  The invalid 0xFF is as its default value. It must be configured to the real value. 
     144  #  The invalid 0xFF is as its default value. It must be configured to the real value.
    145145  # @Prompt ACPI Hardware PCI Function Number
    146146  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber       |  0xFF| UINT8|0x00000013
    147  
     147
    148148  ## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.
    149   #  The invalid 0xFFFF is as its default value. It must be configured to the real value. 
     149  #  The invalid 0xFFFF is as its default value. It must be configured to the real value.
    150150  # @Prompt ACPI Hardware PCI Register Offset
    151151  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0xFFFF|UINT16|0x00000014
    152  
     152
    153153  ## Defines the bit mask that must be set to enable the APIC hardware register BAR.
    154154  # @Prompt ACPI Hardware PCI Bar Enable BitMask
    155155  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask           |  0x00| UINT8|0x00000015
    156  
     156
    157157  ## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.
    158   #  The invalid 0xFFFF is as its default value. It must be configured to the real value. 
     158  #  The invalid 0xFFFF is as its default value. It must be configured to the real value.
    159159  # @Prompt ACPI Hardware PCI Bar Register Offset
    160160  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset    |0xFFFF|UINT16|0x00000016
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/PcAtChipsetPkg.dsc

    r58459 r58466  
    2828  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
    2929  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
    30   DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf 
     30  DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
    3131  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
    3232  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c

    r58459 r58466  
    1717/**
    1818  Compare the Hour, Minute and Second of the From time and the To time.
    19  
     19
    2020  Only compare H/M/S in EFI_TIME and ignore other fields here.
    2121
     
    165165
    166166  Century = RtcRead (RTC_ADDRESS_CENTURY);
    167  
     167
    168168  //
    169169  // Set RTC configuration after get original time
     
    178178    EfiReleaseLock (&Global->RtcLock);
    179179  }
    180  
     180
    181181  //
    182182  // Get the data of Daylight saving and time zone, if they have been
     
    196196  } else {
    197197    Time.TimeZone = EFI_UNSPECIFIED_TIMEZONE;
    198     Time.Daylight = 0; 
     198    Time.Daylight = 0;
    199199  }
    200200
     
    232232    return EFI_DEVICE_ERROR;
    233233  }
    234  
     234
    235235  //
    236236  // Reset wakeup time value to valid state when wakeup alarm is disabled and wakeup time is invalid.
     
    242242    return EFI_SUCCESS;
    243243  }
    244  
    245   //
    246   // When wakeup time is disabled and invalid, reset wakeup time register to valid state 
     244
     245  //
     246  // When wakeup time is disabled and invalid, reset wakeup time register to valid state
    247247  // but keep wakeup alarm disabled.
    248248  //
     
    273273    return EFI_DEVICE_ERROR;
    274274  }
    275  
     275
    276276  ConvertEfiTimeToRtcTime (&Time, RegisterB, &Century);
    277277
     
    292292    return EFI_DEVICE_ERROR;
    293293  }
    294  
     294
    295295  //
    296296  // Inhibit updates of the RTC
     
    298298  RegisterB.Bits.Set  = 1;
    299299  RtcWrite (RTC_ADDRESS_REGISTER_B, RegisterB.Data);
    300  
     300
    301301  //
    302302  // Set RTC alarm time registers
     
    311311  RegisterB.Bits.Set = 0;
    312312  RtcWrite (RTC_ADDRESS_REGISTER_B, RegisterB.Data);
    313  
     313
    314314  //
    315315  // Release RTC Lock.
     
    385385
    386386  Century = RtcRead (RTC_ADDRESS_CENTURY);
    387  
     387
    388388  //
    389389  // Release RTC Lock.
     
    480480    return Status;
    481481  }
    482  
     482
    483483  //
    484484  // Write timezone and daylight to RTC variable
     
    768768    return EFI_DEVICE_ERROR;
    769769  }
    770  
     770
    771771  //
    772772  // Inhibit updates of the RTC
     
    905905
    906906  @retval   EFI_DEVICE_ERROR   RTC device error.
    907   @retval   EFI_SUCCESS        RTC is updated and ready. 
     907  @retval   EFI_SUCCESS        RTC is updated and ready.
    908908**/
    909909EFI_STATUS
     
    11061106/**
    11071107  Compare the Hour, Minute and Second of the From time and the To time.
    1108  
     1108
    11091109  Only compare H/M/S in EFI_TIME and ignore other fields here.
    11101110
     
    11711171  ASSERT (From->Month >=1);
    11721172  ASSERT (From->Month <=12);
    1173  
     1173
    11741174  if (From->Year == To->Year) {
    11751175    if (From->Month == To->Month) {
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h

    r58459 r58466  
    330330
    331331  @retval   EFI_DEVICE_ERROR   RTC device error.
    332   @retval   EFI_SUCCESS        RTC is updated and ready. 
     332  @retval   EFI_SUCCESS        RTC is updated and ready.
    333333**/
    334334EFI_STATUS
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf

    r58459 r58466  
    6060[Depex]
    6161  gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid
    62  
     62
    6363[Pcd]
    6464  gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout  ## CONSUMES
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/PciHostBridgeDxe/IoFifo.h

    r58464 r58466  
    77  which accompanies this distribution.  The full text of the license may be found at
    88  http://opensource.org/licenses/bsd-license.php
    9  
     9
    1010  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
    1111  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212
    13 **/ 
     13**/
    1414
    1515#ifndef _IO_FIFO_H_INCLUDED_
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c

    r58459 r58466  
    1111WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212
    13 **/ 
     13**/
    1414
    1515#include "PciHostBridge.h"
     
    4040        0
    4141      },
    42  
     42
    4343      {
    4444        END_DEVICE_PATH_TYPE,
     
    104104  PCI_HOST_BRIDGE_INSTANCE    *HostBridge;
    105105  PCI_ROOT_BRIDGE_INSTANCE    *PrivateData;
    106  
     106
    107107  mDriverImageHandle = ImageHandle;
    108  
     108
    109109  //
    110110  // Create Host Bridge Device Handle
     
    115115      return EFI_OUT_OF_RESOURCES;
    116116    }
    117  
     117
    118118    HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
    119119    InitializeListHead (&HostBridge->Head);
    120120
    121121    Status = gBS->InstallMultipleProtocolInterfaces (
    122                     &HostBridge->HostBridgeHandle,             
     122                    &HostBridge->HostBridgeHandle,
    123123                    &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
    124124                    NULL
     
    128128      return EFI_DEVICE_ERROR;
    129129    }
    130  
     130
    131131    //
    132132    // Create Root Bridge Device Handle in this Host Bridge
    133133    //
    134  
     134
    135135    for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
    136136      PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
     
    143143
    144144      RootBridgeConstructor (
    145         &PrivateData->Io, 
    146         HostBridge->HostBridgeHandle, 
    147         RootBridgeAttribute[Loop1][Loop2], 
     145        &PrivateData->Io,
     146        HostBridge->HostBridgeHandle,
     147        RootBridgeAttribute[Loop1][Loop2],
    148148        &mResAppeture[Loop1][Loop2]
    149149        );
    150    
     150
    151151      Status = gBS->InstallMultipleProtocolInterfaces(
    152                       &PrivateData->Handle,             
     152                      &PrivateData->Handle,
    153153                      &gEfiDevicePathProtocolGuid,      PrivateData->DevicePath,
    154154                      &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,
     
    159159        return EFI_DEVICE_ERROR;
    160160      }
    161  
     161
    162162      InsertTailList (&HostBridge->Head, &PrivateData->Link);
    163163    }
    164   } 
     164  }
    165165
    166166  return EFI_SUCCESS;
     
    248248  EFI_STATUS                            Status;
    249249  EFI_STATUS                            ReturnStatus;
    250  
     250
    251251  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
    252  
     252
    253253  switch (Phase) {
    254254
     
    256256    if (HostBridgeInstance->CanRestarted) {
    257257      //
    258       // Reset the Each Root Bridge 
     258      // Reset the Each Root Bridge
    259259      //
    260260      List = HostBridgeInstance->Head.ForwardLink;
    261  
     261
    262262      while (List != &HostBridgeInstance->Head) {
    263263        RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
     
    268268          RootBridgeInstance->ResAllocNode[Index].Status    = ResNone;
    269269        }
    270          
     270
    271271        List = List->ForwardLink;
    272272      }
    273        
     273
    274274      HostBridgeInstance->ResourceSubmited = FALSE;
    275275      HostBridgeInstance->CanRestarted     = TRUE;
     
    277277      //
    278278      // Can not restart
    279       // 
     279      //
    280280      return EFI_NOT_READY;
    281     } 
     281    }
    282282    break;
    283283
     
    310310    if (HostBridgeInstance->ResourceSubmited) {
    311311      //
    312       // Take care of the resource dependencies between the root bridges 
     312      // Take care of the resource dependencies between the root bridges
    313313      //
    314314      List = HostBridgeInstance->Head.ForwardLink;
     
    318318        for (Index = TypeIo; Index < TypeBus; Index++) {
    319319          if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
    320                                        
     320
    321321            AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
    322            
     322
    323323            //
    324324            // Get the number of '1' in Alignment.
    325325            //
    326326            BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
    327                                  
     327
    328328            switch (Index) {
    329329
    330               case TypeIo: 
     330              case TypeIo:
    331331                //
    332332                // It is impossible for this chipset to align 0xFFFF for IO16
     
    336336                  BitsOfAlignment = 0;
    337337                }
    338                  
     338
    339339                Status = gDS->AllocateIoSpace (
    340                                 EfiGcdAllocateAnySearchBottomUp, 
    341                                 EfiGcdIoTypeIo, 
     340                                EfiGcdAllocateAnySearchBottomUp,
     341                                EfiGcdIoTypeIo,
    342342                                BitsOfAlignment,
    343343                                AddrLen,
     
    346346                                NULL
    347347                                );
    348                  
     348
    349349                if (!EFI_ERROR (Status)) {
    350350                  RootBridgeInstance->ResAllocNode[Index].Base   = (UINTN)BaseAddress;
    351                   RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated; 
     351                  RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
    352352                } else {
    353                   ReturnStatus = Status; 
     353                  ReturnStatus = Status;
    354354                  if (Status != EFI_OUT_OF_RESOURCES) {
    355355                    RootBridgeInstance->ResAllocNode[Index].Length = 0;
     
    363363                //
    364364                // It is impossible for this chipset to align 0xFFFFFFFF for Mem32
    365                 // So clear it 
     365                // So clear it
    366366                //
    367                  
     367
    368368                if (BitsOfAlignment >= 32) {
    369369                  BitsOfAlignment = 0;
    370370                }
    371                  
     371
    372372                Status = gDS->AllocateMemorySpace (
    373                                 EfiGcdAllocateAnySearchBottomUp, 
    374                                 EfiGcdMemoryTypeMemoryMappedIo, 
     373                                EfiGcdAllocateAnySearchBottomUp,
     374                                EfiGcdMemoryTypeMemoryMappedIo,
    375375                                BitsOfAlignment,
    376376                                AddrLen,
     
    379379                                NULL
    380380                                );
    381                  
     381
    382382                if (!EFI_ERROR (Status)) {
    383383                  // We were able to allocate the PCI memory
    384384                  RootBridgeInstance->ResAllocNode[Index].Base   = (UINTN)BaseAddress;
    385385                  RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
    386                    
     386
    387387                } else {
    388388                  // Not able to allocate enough PCI memory
    389                   ReturnStatus = Status; 
    390                    
     389                  ReturnStatus = Status;
     390
    391391                  if (Status != EFI_OUT_OF_RESOURCES) {
    392392                    RootBridgeInstance->ResAllocNode[Index].Length = 0;
    393                   } 
     393                  }
    394394                  ASSERT (FALSE);
    395395                }
    396396                break;
    397                  
    398               case TypePMem32:                 
    399               case TypeMem64:                 
     397
     398              case TypePMem32:
     399              case TypeMem64:
    400400              case TypePMem64:
    401401                  ReturnStatus = EFI_ABORTED;
    402                   break; 
     402                  break;
    403403              default:
    404404                ASSERT (FALSE);
     
    407407          }
    408408        }
    409          
     409
    410410        List = List->ForwardLink;
    411411      }
    412        
     412
    413413      return ReturnStatus;
    414414
     
    432432          switch (Index) {
    433433
    434           case TypeIo: 
    435             Status = gDS->FreeIoSpace (BaseAddress, AddrLen);               
     434          case TypeIo:
     435            Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
    436436            if (EFI_ERROR (Status)) {
    437437              ReturnStatus = Status;
     
    453453
    454454          case TypePMem64:
    455             break; 
     455            break;
    456456
    457457          default:
     
    466466        }
    467467      }
    468        
     468
    469469      List = List->ForwardLink;
    470470    }
    471              
     471
    472472    HostBridgeInstance->ResourceSubmited = FALSE;
    473     HostBridgeInstance->CanRestarted     = TRUE;     
     473    HostBridgeInstance->CanRestarted     = TRUE;
    474474    return ReturnStatus;
    475475
     
    481481    return EFI_INVALID_PARAMETER;
    482482  }
    483  
    484   return EFI_SUCCESS; 
     483
     484  return EFI_SUCCESS;
    485485}
    486486
     
    500500   @param[in]       This              The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
    501501   @param[in, out]  RootBridgeHandle  Returns the device handle of the next PCI root bridge.
    502    
     502
    503503   @retval EFI_SUCCESS            If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
    504                                   specific Host bridge and return EFI_SUCCESS. 
     504                                  specific Host bridge and return EFI_SUCCESS.
    505505   @retval EFI_NOT_FOUND          Can not find the any more root bridge in specific host bridge.
    506506   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not an EFI_HANDLE that was
     
    514514  )
    515515{
    516   BOOLEAN                               NoRootBridge; 
    517   LIST_ENTRY                            *List; 
     516  BOOLEAN                               NoRootBridge;
     517  LIST_ENTRY                            *List;
    518518  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
    519519  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
    520  
     520
    521521  NoRootBridge = TRUE;
    522522  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
    523523  List = HostBridgeInstance->Head.ForwardLink;
    524  
    525  
     524
     525
    526526  while (List != &HostBridgeInstance->Head) {
    527527    NoRootBridge = FALSE;
     
    542542          RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
    543543          *RootBridgeHandle = RootBridgeInstance->Handle;
    544           return EFI_SUCCESS; 
     544          return EFI_SUCCESS;
    545545        } else {
    546546          return EFI_NOT_FOUND;
     
    548548      }
    549549    }
    550      
     550
    551551    List = List->ForwardLink;
    552552  } //end while
    553  
     553
    554554  if (NoRootBridge) {
    555555    return EFI_NOT_FOUND;
     
    569569   GetNextRootBridge(). The attributes are static in the sense that they do not change during or
    570570   after the enumeration process. The hardware may provide mechanisms to change the attributes on
    571    the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is 
     571   the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
    572572   installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
    573573   "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
    574    For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to 
    575    include requests for the prefetchable memory in the nonprefetchable memory pool and not request any 
     574   For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
     575   include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
    576576   prefetchable memory.
    577577      Attribute                                 Description
     
    591591                                   EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
    592592   @param[out]  Attributes         The pointer to attribte of root bridge, it is output parameter
    593    
     593
    594594   @retval EFI_INVALID_PARAMETER   Attribute pointer is NULL
    595595   @retval EFI_INVALID_PARAMETER   RootBridgehandle is invalid.
     
    605605  )
    606606{
    607   LIST_ENTRY                            *List; 
     607  LIST_ENTRY                            *List;
    608608  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
    609609  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
    610  
     610
    611611  if (Attributes == NULL) {
    612612    return EFI_INVALID_PARAMETER;
    613613  }
    614  
     614
    615615  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
    616616  List = HostBridgeInstance->Head.ForwardLink;
    617  
     617
    618618  while (List != &HostBridgeInstance->Head) {
    619619    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
     
    624624    List = List->ForwardLink;
    625625  }
    626  
    627   //
    628   // RootBridgeHandle is not an EFI_HANDLE 
     626
     627  //
     628  // RootBridgeHandle is not an EFI_HANDLE
    629629  // that was returned on a previous call to GetNextRootBridge()
    630630  //
     
    641641   @param[in]   RootBridgeHandle  The PCI Root Bridge to be set up.
    642642   @param[out]  Configuration     Pointer to the pointer to the PCI bus resource descriptor.
    643    
     643
    644644   @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
    645645   @retval EFI_OUT_OF_RESOURCES  Fail to allocate ACPI resource descriptor tag.
     
    655655  )
    656656{
    657   LIST_ENTRY                            *List; 
     657  LIST_ENTRY                            *List;
    658658  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
    659659  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
     
    662662  UINT64                                BusStart;
    663663  UINT64                                BusEnd;
    664  
     664
    665665  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
    666666  List = HostBridgeInstance->Head.ForwardLink;
    667  
     667
    668668  while (List != &HostBridgeInstance->Head) {
    669669    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
     
    677677      // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
    678678      //
    679      
     679
    680680      Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
    681681      if (Buffer == NULL) {
    682682        return EFI_OUT_OF_RESOURCES;
    683683      }
    684      
     684
    685685      Temp = (UINT8 *)Buffer;
    686      
     686
    687687      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
    688688      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len  = 0x2B;
    689689      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
    690       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0; 
     690      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
    691691      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
    692692      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
    693693      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
    694694      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
    695       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;       
     695      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
    696696      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;
    697      
     697
    698698      Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
    699       ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;     
     699      ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
    700700      ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
    701      
    702       *Configuration = Buffer;     
     701
     702      *Configuration = Buffer;
    703703      return EFI_SUCCESS;
    704704    }
    705705    List = List->ForwardLink;
    706706  }
    707  
     707
    708708  return EFI_INVALID_PARAMETER;
    709709}
     
    719719   @param[in] RootBridgeHandle  The PCI Root Bridge whose bus range is to be programmed
    720720   @param[in] Configuration     The pointer to the PCI bus resource descriptor
    721    
     721
    722722   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
    723723   @retval EFI_INVALID_PARAMETER  Configuration is NULL.
    724724   @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
    725725   @retval EFI_INVALID_PARAMETER  Configuration does not include a valid ACPI 2.0 bus resource descriptor.
    726    @retval EFI_INVALID_PARAMETER  Configuration includes valid ACPI 2.0 resource descriptors other than 
     726   @retval EFI_INVALID_PARAMETER  Configuration includes valid ACPI 2.0 resource descriptors other than
    727727                                  bus descriptors.
    728728   @retval EFI_INVALID_PARAMETER  Configuration contains one or more invalid ACPI resource descriptors.
     
    741741  )
    742742{
    743   LIST_ENTRY                            *List; 
     743  LIST_ENTRY                            *List;
    744744  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
    745745  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
     
    748748  UINTN                                 BusEnd;
    749749  UINTN                                 BusLen;
    750  
     750
    751751  if (Configuration == NULL) {
    752752    return EFI_INVALID_PARAMETER;
    753753  }
    754    
     754
    755755  Ptr = Configuration;
    756  
     756
    757757  //
    758758  // Check the Configuration is valid
     
    761761    return EFI_INVALID_PARAMETER;
    762762  }
    763  
     763
    764764  if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
    765765    return EFI_INVALID_PARAMETER;
     
    770770    return EFI_INVALID_PARAMETER;
    771771  }
    772    
     772
    773773  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
    774774  List = HostBridgeInstance->Head.ForwardLink;
    775  
     775
    776776  Ptr = Configuration;
    777  
     777
    778778  while (List != &HostBridgeInstance->Head) {
    779779    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
     
    782782      BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
    783783      BusEnd = BusStart + BusLen - 1;
    784      
     784
    785785      if (BusStart > BusEnd) {
    786786        return EFI_INVALID_PARAMETER;
    787787      }
    788      
     788
    789789      if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {
    790790        return EFI_INVALID_PARAMETER;
    791791      }
    792      
     792
    793793      //
    794794      // Update the Bus Range
     
    797797      RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
    798798      RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
    799      
     799
    800800      //
    801801      // Program the Root Bridge Hardware
    802802      //
    803        
     803
    804804      return EFI_SUCCESS;
    805805    }
    806    
     806
    807807    List = List->ForwardLink;
    808808  }
    809  
     809
    810810  return EFI_INVALID_PARAMETER;
    811811}
     
    823823   @param[in] RootBridgeHandle  The PCI root bridge whose I/O and memory resource requirements are being submitted.
    824824   @param[in] Configuration     The pointer to the PCI I/O and PCI memory resource descriptor.
    825    
     825
    826826   @retval EFI_SUCCESS            The I/O and memory resource requests for a PCI root bridge were accepted.
    827827   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
    828828   @retval EFI_INVALID_PARAMETER  Configuration is NULL.
    829829   @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
    830    @retval EFI_INVALID_PARAMETER  Configuration includes requests for one or more resource types that are 
    831                                   not supported by this PCI root bridge. This error will happen if the caller 
     830   @retval EFI_INVALID_PARAMETER  Configuration includes requests for one or more resource types that are
     831                                  not supported by this PCI root bridge. This error will happen if the caller
    832832                                  did not combine resources according to Attributes that were returned by
    833833                                  GetAllocAttributes().
     
    845845  )
    846846{
    847   LIST_ENTRY                            *List; 
     847  LIST_ENTRY                            *List;
    848848  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
    849849  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
     
    852852  UINT64                                AddrLen;
    853853  UINT64                                Alignment;
    854  
     854
    855855  //
    856856  // Check the input parameter: Configuration
     
    859859    return EFI_INVALID_PARAMETER;
    860860  }
    861  
     861
    862862  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
    863863  List = HostBridgeInstance->Head.ForwardLink;
    864  
     864
    865865  Temp = (UINT8 *)Configuration;
    866   while ( *Temp == 0x8A) { 
     866  while ( *Temp == 0x8A) {
    867867    Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
    868868  }
     
    870870    return EFI_INVALID_PARAMETER;
    871871  }
    872  
     872
    873873  Temp = (UINT8 *)Configuration;
    874874  while (List != &HostBridgeInstance->Head) {
     
    891891          return EFI_INVALID_PARAMETER;
    892892        }
    893        
     893
    894894        switch (Ptr->ResType) {
    895895
    896896        case 0:
    897            
     897
    898898          //
    899899          // Check invalid Address Sapce Granularity
     
    902902            return EFI_INVALID_PARAMETER;
    903903          }
    904            
     904
    905905          //
    906906          // check the memory resource request is supported by PCI root bridge
     
    910910            return EFI_INVALID_PARAMETER;
    911911          }
    912            
     912
    913913          AddrLen = Ptr->AddrLen;
    914914          Alignment = Ptr->AddrRangeMax;
     
    922922              RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
    923923              RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;
    924               RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested; 
     924              RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;
    925925              HostBridgeInstance->ResourceSubmited = TRUE;
    926926            }
     
    942942          RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
    943943          RootBridgeInstance->ResAllocNode[TypeIo].Status  = ResRequested;
    944           HostBridgeInstance->ResourceSubmited = TRUE; 
     944          HostBridgeInstance->ResourceSubmited = TRUE;
    945945          break;
    946946
     
    948948            break;
    949949        };
    950    
     950
    951951        Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
    952       } 
    953      
     952      }
     953
    954954      return EFI_SUCCESS;
    955955    }
    956    
     956
    957957    List = List->ForwardLink;
    958958  }
    959  
     959
    960960  return EFI_INVALID_PARAMETER;
    961961}
     
    974974   @param[in]  RootBridgeHandle  The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
    975975   @param[out] Configuration     The pointer to the pointer to the PCI I/O and memory resource descriptor.
    976    
     976
    977977   @retval EFI_SUCCESS            The requested parameters were returned.
    978978   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
     
    989989  )
    990990{
    991   LIST_ENTRY                            *List; 
     991  LIST_ENTRY                            *List;
    992992  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
    993993  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
    994994  UINTN                                 Index;
    995   UINTN                                 Number; 
    996   VOID                                  *Buffer; 
     995  UINTN                                 Number;
     996  VOID                                  *Buffer;
    997997  UINT8                                 *Temp;
    998998  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     *Ptr;
    999999  UINT64                                ResStatus;
    1000    
     1000
    10011001  Buffer = NULL;
    10021002  Number = 0;
     
    10061006  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
    10071007  List = HostBridgeInstance->Head.ForwardLink;
    1008  
     1008
    10091009  //
    10101010  // Enumerate the root bridges in this host bridge
     
    10161016        if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
    10171017          Number ++;
    1018         } 
    1019       }
    1020      
     1018        }
     1019      }
     1020
    10211021      if (Number ==  0) {
    10221022        return EFI_INVALID_PARAMETER;
     
    10271027        return EFI_OUT_OF_RESOURCES;
    10281028      }
    1029      
     1029
    10301030      Temp = Buffer;
    10311031      for (Index = 0; Index < TypeBus; Index ++) {
     
    10331033          Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
    10341034          ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
    1035          
     1035
    10361036          switch (Index) {
    10371037
     
    10431043            Ptr->Len  = 0x2B;
    10441044            Ptr->ResType = 1;
    1045             Ptr->GenFlag = 0; 
     1045            Ptr->GenFlag = 0;
    10461046            Ptr->SpecificFlag = 0;
    10471047            Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
     
    10551055            //
    10561056            // Memory 32
    1057             // 
     1057            //
    10581058            Ptr->Desc = 0x8A;
    10591059            Ptr->Len  = 0x2B;
    10601060            Ptr->ResType = 0;
    1061             Ptr->GenFlag = 0; 
     1061            Ptr->GenFlag = 0;
    10621062            Ptr->SpecificFlag = 0;
    10631063            Ptr->AddrSpaceGranularity = 32;
     
    10651065            Ptr->AddrRangeMax = 0;
    10661066            Ptr->AddrTranslationOffset = \
    1067                  (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;             
     1067                 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
    10681068            Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
    10691069            break;
     
    10761076            Ptr->Len  = 0x2B;
    10771077            Ptr->ResType = 0;
    1078             Ptr->GenFlag = 0; 
     1078            Ptr->GenFlag = 0;
    10791079            Ptr->SpecificFlag = 6;
    10801080            Ptr->AddrSpaceGranularity = 32;
    10811081            Ptr->AddrRangeMin = 0;
    10821082            Ptr->AddrRangeMax = 0;
    1083             Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       
     1083            Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
    10841084            Ptr->AddrLen = 0;
    10851085            break;
     
    10921092            Ptr->Len  = 0x2B;
    10931093            Ptr->ResType = 0;
    1094             Ptr->GenFlag = 0; 
     1094            Ptr->GenFlag = 0;
    10951095            Ptr->SpecificFlag = 0;
    10961096            Ptr->AddrSpaceGranularity = 64;
    10971097            Ptr->AddrRangeMin = 0;
    10981098            Ptr->AddrRangeMax = 0;
    1099             Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       
     1099            Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
    11001100            Ptr->AddrLen = 0;
    11011101            break;
     
    11081108            Ptr->Len  = 0x2B;
    11091109            Ptr->ResType = 0;
    1110             Ptr->GenFlag = 0; 
     1110            Ptr->GenFlag = 0;
    11111111            Ptr->SpecificFlag = 6;
    11121112            Ptr->AddrSpaceGranularity = 64;
    11131113            Ptr->AddrRangeMin = 0;
    11141114            Ptr->AddrRangeMax = 0;
    1115             Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       
     1115            Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
    11161116            Ptr->AddrLen = 0;
    11171117            break;
    11181118          };
    1119          
     1119
    11201120          Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
    1121         } 
    1122       }
    1123      
    1124       ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;     
     1121        }
     1122      }
     1123
     1124      ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
    11251125      ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
    1126      
    1127       *Configuration = Buffer;     
    1128        
     1126
     1127      *Configuration = Buffer;
     1128
    11291129      return EFI_SUCCESS;
    11301130    }
    1131    
     1131
    11321132    List = List->ForwardLink;
    11331133  }
    1134  
     1134
    11351135  return EFI_INVALID_PARAMETER;
    11361136}
     
    11521152                            configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
    11531153                            the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
    1154    @param Phase             The phase of the PCI device enumeration. 
    1155    
     1154   @param Phase             The phase of the PCI device enumeration.
     1155
    11561156   @retval EFI_SUCCESS              The requested parameters were returned.
    11571157   @retval EFI_INVALID_PARAMETER    RootBridgeHandle is not a valid root bridge handle.
     
    11741174  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
    11751175  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
    1176   LIST_ENTRY                            *List; 
     1176  LIST_ENTRY                            *List;
    11771177
    11781178  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h

    r48674 r58466  
    11/** @file
    2   The Header file of the Pci Host Bridge Driver 
     2  The Header file of the Pci Host Bridge Driver
    33
    44  Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
     
    77  which accompanies this distribution.  The full text of the license may be found at
    88  http://opensource.org/licenses/bsd-license.php
    9  
     9
    1010  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
    1111  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212
    13 **/ 
     13**/
    1414
    1515#ifndef _PCI_HOST_BRIDGE_H_
     
    6060  UINTN                                             RootBridgeNumber;
    6161  LIST_ENTRY                                        Head;
    62   BOOLEAN                                           ResourceSubmited; 
    63   BOOLEAN                                           CanRestarted; 
     62  BOOLEAN                                           ResourceSubmited;
     63  BOOLEAN                                           CanRestarted;
    6464  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  ResAlloc;
    6565} PCI_HOST_BRIDGE_INSTANCE;
     
    6767#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
    6868  CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
    69  
     69
    7070//
    7171//  HostBridge Resource Allocation interface
     
    158158   @param[in]       This              The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
    159159   @param[in, out]  RootBridgeHandle  Returns the device handle of the next PCI root bridge.
    160    
     160
    161161   @retval EFI_SUCCESS            If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
    162                                   specific Host bridge and return EFI_SUCCESS. 
     162                                  specific Host bridge and return EFI_SUCCESS.
    163163   @retval EFI_NOT_FOUND          Can not find the any more root bridge in specific host bridge.
    164164   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not an EFI_HANDLE that was
     
    171171  IN OUT   EFI_HANDLE                                       *RootBridgeHandle
    172172  );
    173  
     173
    174174/**
    175175   Returns the allocation attributes of a PCI root bridge.
     
    182182   GetNextRootBridge(). The attributes are static in the sense that they do not change during or
    183183   after the enumeration process. The hardware may provide mechanisms to change the attributes on
    184    the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is 
     184   the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
    185185   installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
    186186   "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
    187    For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to 
    188    include requests for the prefetchable memory in the nonprefetchable memory pool and not request any 
     187   For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
     188   include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
    189189   prefetchable memory.
    190190      Attribute                                 Description
     
    204204                                   EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
    205205   @param[out]  Attributes         The pointer to attribte of root bridge, it is output parameter
    206    
     206
    207207   @retval EFI_INVALID_PARAMETER   Attribute pointer is NULL
    208208   @retval EFI_INVALID_PARAMETER   RootBridgehandle is invalid.
    209209   @retval EFI_SUCCESS             Success to get attribute of interested root bridge.
    210210
    211 **/ 
     211**/
    212212EFI_STATUS
    213213EFIAPI
     
    217217  OUT UINT64                                           *Attributes
    218218  );
    219  
     219
    220220/**
    221221   Sets up the specified PCI root bridge for the bus enumeration process.
     
    227227   @param[in]   RootBridgeHandle  The PCI Root Bridge to be set up.
    228228   @param[out]  Configuration     Pointer to the pointer to the PCI bus resource descriptor.
    229    
     229
    230230   @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
    231231   @retval EFI_OUT_OF_RESOURCES  Fail to allocate ACPI resource descriptor tag.
     
    240240  OUT VOID                                             **Configuration
    241241  );
    242  
     242
    243243/**
    244244   Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
     
    251251   @param[in] RootBridgeHandle  The PCI Root Bridge whose bus range is to be programmed
    252252   @param[in] Configuration     The pointer to the PCI bus resource descriptor
    253    
     253
    254254   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
    255255   @retval EFI_INVALID_PARAMETER  Configuration is NULL.
    256256   @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
    257257   @retval EFI_INVALID_PARAMETER  Configuration does not include a valid ACPI 2.0 bus resource descriptor.
    258    @retval EFI_INVALID_PARAMETER  Configuration includes valid ACPI 2.0 resource descriptors other than 
     258   @retval EFI_INVALID_PARAMETER  Configuration includes valid ACPI 2.0 resource descriptors other than
    259259                                  bus descriptors.
    260260   @retval EFI_INVALID_PARAMETER  Configuration contains one or more invalid ACPI resource descriptors.
     
    272272  IN VOID                                             *Configuration
    273273  );
    274  
     274
    275275/**
    276276   Submits the I/O and memory resource requirements for the specified PCI root bridge.
     
    284284   @param[in] RootBridgeHandle  The PCI root bridge whose I/O and memory resource requirements are being submitted.
    285285   @param[in] Configuration     The pointer to the PCI I/O and PCI memory resource descriptor.
    286    
     286
    287287   @retval EFI_SUCCESS            The I/O and memory resource requests for a PCI root bridge were accepted.
    288288   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
    289289   @retval EFI_INVALID_PARAMETER  Configuration is NULL.
    290290   @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
    291    @retval EFI_INVALID_PARAMETER  Configuration includes requests for one or more resource types that are 
    292                                   not supported by this PCI root bridge. This error will happen if the caller 
     291   @retval EFI_INVALID_PARAMETER  Configuration includes requests for one or more resource types that are
     292                                  not supported by this PCI root bridge. This error will happen if the caller
    293293                                  did not combine resources according to Attributes that were returned by
    294294                                  GetAllocAttributes().
     
    305305  IN VOID                                             *Configuration
    306306  );
    307  
     307
    308308/**
    309309   Returns the proposed resource settings for the specified PCI root bridge.
     
    319319   @param[in]  RootBridgeHandle  The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
    320320   @param[out] Configuration     The pointer to the pointer to the PCI I/O and memory resource descriptor.
    321    
     321
    322322   @retval EFI_SUCCESS            The requested parameters were returned.
    323323   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
     
    350350                            configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
    351351                            the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
    352    @param Phase             The phase of the PCI device enumeration. 
    353    
     352   @param Phase             The phase of the PCI device enumeration.
     353
    354354   @retval EFI_SUCCESS              The requested parameters were returned.
    355355   @retval EFI_INVALID_PARAMETER    RootBridgeHandle is not a valid root bridge handle.
     
    372372
    373373//
    374 // Define resource status constant 
     374// Define resource status constant
    375375//
    376376#define EFI_RESOURCE_NONEXISTENT   0xFFFFFFFFFFFFFFFFULL
     
    397397typedef struct {
    398398  UINT64          BusBase;
    399   UINT64          BusLimit;     
    400  
    401   UINT64          MemBase;     
    402   UINT64          MemLimit;   
    403  
    404   UINT64          IoBase; 
    405   UINT64          IoLimit;     
     399  UINT64          BusLimit;
     400
     401  UINT64          MemBase;
     402  UINT64          MemLimit;
     403
     404  UINT64          IoBase;
     405  UINT64          IoLimit;
    406406} PCI_ROOT_BRIDGE_RESOURCE_APPETURE;
    407407
     
    441441  UINT64                 Attributes;
    442442  UINT64                 Supports;
    443  
     443
    444444  //
    445445  // Specific for this memory controller: Bus, I/O, Mem
    446446  //
    447447  PCI_RES_NODE           ResAllocNode[6];
    448  
     448
    449449  //
    450450  // Addressing for Memory and I/O and Bus arrange
    451451  //
    452452  UINT64                 BusBase;
    453   UINT64                 MemBase;     
    454   UINT64                 IoBase; 
    455   UINT64                 BusLimit;     
    456   UINT64                 MemLimit;   
    457   UINT64                 IoLimit;     
     453  UINT64                 MemBase;
     454  UINT64                 IoBase;
     455  UINT64                 BusLimit;
     456  UINT64                 MemLimit;
     457  UINT64                 IoLimit;
    458458
    459459  UINTN                  PciAddress;
    460460  UINTN                  PciData;
    461  
     461
    462462  EFI_DEVICE_PATH_PROTOCOL                *DevicePath;
    463463  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL         Io;
  • trunk/src/VBox/Devices/EFI/Firmware/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c

    r58460 r58466  
    1111WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212
    13 **/ 
     13**/
    1414
    1515#include "PciHostBridge.h"
     
    2727RESOURCE_CONFIGURATION Configuration = {
    2828  {{0x8A, 0x2B, 1, 0, 0, 0, 0, 0, 0, 0},
    29   {0x8A, 0x2B, 0, 0, 0, 32, 0, 0, 0, 0}, 
     29  {0x8A, 0x2B, 0, 0, 0, 32, 0, 0, 0, 0},
    3030  {0x8A, 0x2B, 0, 0, 6, 32, 0, 0, 0, 0},
    3131  {0x8A, 0x2B, 0, 0, 0, 64, 0, 0, 0, 0},
     
    4040
    4141/**
    42    Polls an address in memory mapped I/O space until an exit condition is met, or 
    43    a timeout occurs. 
     42   Polls an address in memory mapped I/O space until an exit condition is met, or
     43   a timeout occurs.
    4444
    4545   This function provides a standard way to poll a PCI memory location. A PCI memory read
     
    6060                          be of poorer granularity.
    6161   @param[out]  Result    Pointer to the last value read from the memory location.
    62    
     62
    6363   @retval EFI_SUCCESS            The last data returned from the access matched the poll exit criteria.
    6464   @retval EFI_INVALID_PARAMETER  Width is invalid.
     
    7070EFI_STATUS
    7171EFIAPI
    72 RootBridgeIoPollMem ( 
     72RootBridgeIoPollMem (
    7373  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *This,
    7474  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
     
    7979  OUT UINT64                                 *Result
    8080  );
    81  
     81
    8282/**
    8383   Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
     
    101101                        be of poorer granularity.
    102102   @param[out] Result   Pointer to the last value read from the memory location.
    103    
     103
    104104   @retval EFI_SUCCESS            The last data returned from the access matched the poll exit criteria.
    105105   @retval EFI_INVALID_PARAMETER  Width is invalid.
     
    111111EFI_STATUS
    112112EFIAPI
    113 RootBridgeIoPollIo ( 
     113RootBridgeIoPollIo (
    114114  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *This,
    115115  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
     
    120120  OUT UINT64                                 *Result
    121121  );
    122  
     122
    123123/**
    124124   Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
     
    137137   @param[out]  Buffer    For read operations, the destination buffer to store the results. For
    138138                          write operations, the source buffer to write data from.
    139    
     139
    140140   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    141141   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    170170   @param[in]   Buffer    For read operations, the destination buffer to store the results. For
    171171                          write operations, the source buffer to write data from.
    172    
     172
    173173   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    174174   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    197197   @param[out]  UserBuffer  For read operations, the destination buffer to store the results. For
    198198                            write operations, the source buffer to write data from.
    199    
     199
    200200   @retval EFI_SUCCESS              The data was read from or written to the PCI root bridge.
    201201   @retval EFI_INVALID_PARAMETER    Width is invalid for this PCI root bridge.
     
    225225   @param[in]   UserBuffer  For read operations, the destination buffer to store the results. For
    226226                            write operations, the source buffer to write data from.
    227    
     227
    228228   @retval EFI_SUCCESS              The data was read from or written to the PCI root bridge.
    229229   @retval EFI_INVALID_PARAMETER    Width is invalid for this PCI root bridge.
     
    260260   @param[in] Count       The number of memory operations to perform. Bytes moved is
    261261                          Width size * Count, starting at DestAddress and SrcAddress.
    262    
     262
    263263   @retval  EFI_SUCCESS             The data was copied from one memory region to another memory region.
    264264   @retval  EFI_INVALID_PARAMETER   Width is invalid for this PCI root bridge.
     
    292292   @param[out]  Buffer    For read operations, the destination buffer to store the results. For
    293293                          write operations, the source buffer to write data from.
    294    
     294
    295295   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    296296   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    325325   @param[in]   Buffer    For read operations, the destination buffer to store the results. For
    326326                          write operations, the source buffer to write data from.
    327    
     327
    328328   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    329329   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    356356                                    to access the system memory's HostAddress.
    357357   @param[out]      Mapping         The value to pass to Unmap() when the bus master DMA operation is complete.
    358    
     358
    359359   @retval EFI_SUCCESS            The range was mapped for the returned NumberOfBytes.
    360360   @retval EFI_INVALID_PARAMETER  Operation is invalid.
     
    385385   If the operation was an EfiPciOperationBusMasterWrite or
    386386   EfiPciOperationBusMasterWrite64, the data is committed to the target system memory.
    387    Any resources used for the mapping are freed. 
     387   Any resources used for the mapping are freed.
    388388
    389389   @param[in] This      A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
    390390   @param[in] Mapping   The mapping value returned from Map().
    391    
     391
    392392   @retval EFI_SUCCESS            The range was unmapped.
    393393   @retval EFI_INVALID_PARAMETER  Mapping is not a value that was returned by Map().
     
    405405   Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or
    406406   EfiPciOperationBusMasterCommonBuffer64 mapping.
    407  
     407
    408408   @param This        A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
    409409   @param Type        This parameter is not used and must be ignored.
     
    412412   @param HostAddress A pointer to store the base system memory address of the allocated range.
    413413   @param Attributes  The requested bit mask of attributes for the allocated range. Only
    414                       the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED, 
     414                      the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED,
    415415                      and EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE may be used with this function.
    416    
     416
    417417   @retval EFI_SUCCESS            The requested memory pages were allocated.
    418418   @retval EFI_INVALID_PARAMETER  MemoryType is invalid.
     
    442442   @param Pages       The number of pages to free.
    443443   @param HostAddress The base system memory address of the allocated range.
    444    
     444
    445445   @retval EFI_SUCCESS            The requested memory pages were freed.
    446446   @retval EFI_INVALID_PARAMETER  The memory range specified by HostAddress and Pages
     
    468468
    469469   @param This        A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
    470    
     470
    471471   @retval EFI_SUCCESS        The PCI posted write transactions were flushed from the PCI host
    472472                              bridge to system memory.
     
    483483/**
    484484   Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the
    485    attributes that a PCI root bridge is currently using. 
     485   attributes that a PCI root bridge is currently using.
    486486
    487487   The GetAttributes() function returns the mask of attributes that this PCI root bridge supports
     
    493493   @param Attributes  A pointer to the mask of attributes that this PCI root bridge is
    494494                      currently using.
    495    
     495
    496496   @retval  EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI root
    497497                                  bridge supports is returned in Supports. If Attributes is
     
    533533   @param[in, out]  ResourceLength  A pointer to the length of the resource range to be modified by the
    534534                                    attributes specified by Attributes.
    535    
     535
    536536   @retval  EFI_SUCCESS     The current configuration of this PCI root bridge was returned in Resources.
    537537   @retval  EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.
     
    545545  IN     UINT64                           Attributes,
    546546  IN OUT UINT64                           *ResourceBase,
    547   IN OUT UINT64                           *ResourceLength 
    548   ); 
     547  IN OUT UINT64                           *ResourceLength
     548  );
    549549
    550550/**
     
    565565                            caller must treat the return buffer as read-only data, and the buffer
    566566                            must not be freed by the caller.
    567    
     567
    568568   @retval  EFI_SUCCESS     The current configuration of this PCI root bridge was returned in Resources.
    569569   @retval  EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.
     
    664664  PrivateData->BusBase  = ResAppeture->BusBase;
    665665  PrivateData->BusLimit = ResAppeture->BusLimit;
    666  
     666
    667667  //
    668668  // Specific for this chipset
     
    674674    PrivateData->ResAllocNode[Index].Status    = ResNone;
    675675  }
    676  
     676
    677677  PrivateData->PciAddress = 0xCF8;
    678678  PrivateData->PciData    = 0xCFC;
    679679
    680680  PrivateData->RootBridgeAttrib = Attri;
    681  
     681
    682682  PrivateData->Supports    = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO | \
    683683                             EFI_PCI_ATTRIBUTE_ISA_IO_16 | EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | \
     
    687687
    688688  Protocol->ParentHandle   = HostBridgeHandle;
    689  
     689
    690690  Protocol->PollMem        = RootBridgeIoPollMem;
    691691  Protocol->PollIo         = RootBridgeIoPollIo;
     
    726726  Check parameters for IO,MMIO,PCI read/write services of PCI Root Bridge IO.
    727727
    728   The I/O operations are carried out exactly as requested. The caller is responsible 
    729   for satisfying any alignment and I/O width restrictions that a PI System on a 
    730   platform might require. For example on some platforms, width requests of 
    731   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
     728  The I/O operations are carried out exactly as requested. The caller is responsible
     729  for satisfying any alignment and I/O width restrictions that a PI System on a
     730  platform might require. For example on some platforms, width requests of
     731  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
    732732  be handled by the driver.
    733  
     733
    734734  @param[in] This           A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
    735735  @param[in] OperationType  I/O operation type: IO/MMIO/PCI.
    736736  @param[in] Width          Signifies the width of the I/O or Memory operation.
    737   @param[in] Address        The base address of the I/O operation. 
    738   @param[in] Count          The number of I/O operations to perform. The number of 
     737  @param[in] Address        The base address of the I/O operation.
     738  @param[in] Count          The number of I/O operations to perform. The number of
    739739                            bytes moved is Width size * Count, starting at Address.
    740740  @param[in] Buffer         For read operations, the destination buffer to store the results.
     
    745745  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    746746  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    747   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
     747  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
    748748                                 and Count is not valid for this PI system.
    749749
     
    806806
    807807  //
    808   // Check to see if any address associated with this transfer exceeds the maximum 
     808  // Check to see if any address associated with this transfer exceeds the maximum
    809809  // allowed address.  The maximum address implied by the parameters passed in is
    810810  // Address + Size * Count.  If the following condition is met, then the transfer
     
    813813  //    Address + Size * Count > Limit + 1
    814814  //
    815   // Since Limit can be the maximum integer value supported by the CPU and Count 
     815  // Since Limit can be the maximum integer value supported by the CPU and Count
    816816  // can also be the maximum integer value supported by the CPU, this range
    817817  // check must be adjusted to avoid all oveflow conditions.
    818   //   
    819   // The following form of the range check is equivalent but assumes that 
     818  //
     819  // The following form of the range check is equivalent but assumes that
    820820  // Limit is of the form (2^n - 1).
    821821  //
     
    853853      return EFI_UNSUPPORTED;
    854854    }
    855   } else { 
     855  } else {
    856856    MaxCount = RShiftU64 (Limit, Width);
    857857    if (MaxCount < (Count - 1)) {
     
    877877   @param[in, out] UserBuffer For read operations, the destination buffer to store the results. For
    878878                              write operations, the source buffer to write data from.
    879    
     879
    880880   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    881881   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    955955    }
    956956  }
    957   return EFI_SUCCESS; 
     957  return EFI_SUCCESS;
    958958}
    959959
     
    969969   @param[in, out] UserBuffer For read operations, the destination buffer to store the results. For
    970970                              write operations, the source buffer to write data from.
    971    
     971
    972972   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    973973   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    10871087   @param[in, out] UserBuffer For read operations, the destination buffer to store the results. For
    10881088                              write operations, the source buffer to write data from.
    1089    
     1089
    10901090   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    10911091   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    11771177
    11781178/**
    1179    Polls an address in memory mapped I/O space until an exit condition is met, or 
    1180    a timeout occurs. 
     1179   Polls an address in memory mapped I/O space until an exit condition is met, or
     1180   a timeout occurs.
    11811181
    11821182   This function provides a standard way to poll a PCI memory location. A PCI memory read
     
    11971197                          be of poorer granularity.
    11981198   @param[out]  Result    Pointer to the last value read from the memory location.
    1199    
     1199
    12001200   @retval EFI_SUCCESS            The last data returned from the access matched the poll exit criteria.
    12011201   @retval EFI_INVALID_PARAMETER  Width is invalid.
     
    12071207EFI_STATUS
    12081208EFIAPI
    1209 RootBridgeIoPollMem ( 
     1209RootBridgeIoPollMem (
    12101210  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *This,
    12111211  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
     
    12351235  if (EFI_ERROR (Status)) {
    12361236    return Status;
    1237   }   
     1237  }
    12381238  if ((*Result & Mask) == Value) {
    12391239    return EFI_SUCCESS;
     
    12421242  if (Delay == 0) {
    12431243    return EFI_SUCCESS;
    1244  
     1244
    12451245  } else {
    12461246
     
    12591259    }
    12601260    NumberOfTicks += 1;
    1261  
     1261
    12621262    while (NumberOfTicks != 0) {
    12631263
    12641264      mMetronome->WaitForTick (mMetronome, 1);
    1265    
     1265
    12661266      Status = This->Mem.Read (This, Width, Address, 1, Result);
    12671267      if (EFI_ERROR (Status)) {
    12681268        return Status;
    12691269      }
    1270    
     1270
    12711271      if ((*Result & Mask) == Value) {
    12721272        return EFI_SUCCESS;
     
    12781278  return EFI_TIMEOUT;
    12791279}
    1280  
     1280
    12811281/**
    12821282   Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
     
    13001300                        be of poorer granularity.
    13011301   @param[out] Result   Pointer to the last value read from the memory location.
    1302    
     1302
    13031303   @retval EFI_SUCCESS            The last data returned from the access matched the poll exit criteria.
    13041304   @retval EFI_INVALID_PARAMETER  Width is invalid.
     
    13101310EFI_STATUS
    13111311EFIAPI
    1312 RootBridgeIoPollIo ( 
     1312RootBridgeIoPollIo (
    13131313  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *This,
    13141314  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
     
    13351335    return EFI_INVALID_PARAMETER;
    13361336  }
    1337  
     1337
    13381338  Status = This->Io.Read (This, Width, Address, 1, Result);
    13391339  if (EFI_ERROR (Status)) {
    13401340    return Status;
    1341   }   
     1341  }
    13421342  if ((*Result & Mask) == Value) {
    13431343    return EFI_SUCCESS;
     
    13461346  if (Delay == 0) {
    13471347    return EFI_SUCCESS;
    1348  
     1348
    13491349  } else {
    13501350
     
    13601360    }
    13611361    NumberOfTicks += 1;
    1362  
     1362
    13631363    while (NumberOfTicks != 0) {
    13641364
    13651365      mMetronome->WaitForTick (mMetronome, 1);
    1366    
     1366
    13671367      Status = This->Io.Read (This, Width, Address, 1, Result);
    13681368      if (EFI_ERROR (Status)) {
    13691369        return Status;
    13701370      }
    1371    
     1371
    13721372      if ((*Result & Mask) == Value) {
    13731373        return EFI_SUCCESS;
     
    13961396   @param[out]  Buffer    For read operations, the destination buffer to store the results. For
    13971397                          write operations, the source buffer to write data from.
    1398    
     1398
    13991399   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    14001400   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    14321432   @param[in]   Buffer    For read operations, the destination buffer to store the results. For
    14331433                          write operations, the source buffer to write data from.
    1434    
     1434
    14351435   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    14361436   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    14481448  )
    14491449{
    1450   return RootBridgeIoMemRW (This, TRUE, Width, Address, Count, Buffer); 
     1450  return RootBridgeIoMemRW (This, TRUE, Width, Address, Count, Buffer);
    14511451}
    14521452
     
    14621462   @param[out]  Buffer      For read operations, the destination buffer to store the results. For
    14631463                            write operations, the source buffer to write data from.
    1464    
     1464
    14651465   @retval EFI_SUCCESS              The data was read from or written to the PCI root bridge.
    14661466   @retval EFI_INVALID_PARAMETER    Width is invalid for this PCI root bridge.
     
    14791479  )
    14801480{
    1481   return RootBridgeIoIoRW (This, FALSE, Width, Address, Count, Buffer); 
     1481  return RootBridgeIoIoRW (This, FALSE, Width, Address, Count, Buffer);
    14821482}
    14831483
     
    14931493   @param[in]   Buffer       For read operations, the destination buffer to store the results. For
    14941494                            write operations, the source buffer to write data from.
    1495    
     1495
    14961496   @retval EFI_SUCCESS              The data was read from or written to the PCI root bridge.
    14971497   @retval EFI_INVALID_PARAMETER    Width is invalid for this PCI root bridge.
     
    15101510  )
    15111511{
    1512   return RootBridgeIoIoRW (This, TRUE, Width, Address, Count, Buffer); 
     1512  return RootBridgeIoIoRW (This, TRUE, Width, Address, Count, Buffer);
    15131513}
    15141514
     
    15311531   @param[in] Count       The number of memory operations to perform. Bytes moved is
    15321532                          Width size * Count, starting at DestAddress and SrcAddress.
    1533    
     1533
    15341534   @retval  EFI_SUCCESS             The data was copied from one memory region to another memory region.
    15351535   @retval  EFI_INVALID_PARAMETER   Width is invalid for this PCI root bridge.
     
    15551555  if ((UINT32)Width > EfiPciWidthUint64) {
    15561556    return EFI_INVALID_PARAMETER;
    1557   }   
     1557  }
    15581558
    15591559  if (DestAddress == SrcAddress) {
     
    16181618   @param[out]  Buffer    For read operations, the destination buffer to store the results. For
    16191619                          write operations, the source buffer to write data from.
    1620    
     1620
    16211621   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    16221622   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    16541654   @param[in]   Buffer    For read operations, the destination buffer to store the results. For
    16551655                          write operations, the source buffer to write data from.
    1656    
     1656
    16571657   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
    16581658   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
     
    16881688                                    to access the system memory's HostAddress.
    16891689   @param[out]      Mapping         The value to pass to Unmap() when the bus master DMA operation is complete.
    1690    
     1690
    16911691   @retval EFI_SUCCESS            The range was mapped for the returned NumberOfBytes.
    16921692   @retval EFI_INVALID_PARAMETER  Operation is invalid.
     
    17181718    return EFI_INVALID_PARAMETER;
    17191719  }
    1720  
     1720
    17211721  //
    17221722  // Initialize the return values to their defaults
     
    17411741    //
    17421742    // Common Buffer operations can not be remapped.  If the common buffer
    1743     // if above 4GB, then it is not possible to generate a mapping, so return 
     1743    // if above 4GB, then it is not possible to generate a mapping, so return
    17441744    // an error.
    17451745    //
     
    17531753    //
    17541754    Status = gBS->AllocatePool (
    1755                     EfiBootServicesData, 
    1756                     sizeof(MAP_INFO), 
     1755                    EfiBootServicesData,
     1756                    sizeof(MAP_INFO),
    17571757                    (VOID **)&MapInfo
    17581758                    );
     
    17801780    //
    17811781    Status = gBS->AllocatePages (
    1782                     AllocateMaxAddress, 
    1783                     EfiBootServicesData, 
     1782                    AllocateMaxAddress,
     1783                    EfiBootServicesData,
    17841784                    MapInfo->NumberOfPages,
    17851785                    &MapInfo->MappedHostAddress
     
    17981798    if (Operation == EfiPciOperationBusMasterRead || Operation == EfiPciOperationBusMasterRead64) {
    17991799      CopyMem (
    1800         (VOID *)(UINTN)MapInfo->MappedHostAddress, 
     1800        (VOID *)(UINTN)MapInfo->MappedHostAddress,
    18011801        (VOID *)(UINTN)MapInfo->HostAddress,
    18021802        MapInfo->NumberOfBytes
     
    18241824   If the operation was an EfiPciOperationBusMasterWrite or
    18251825   EfiPciOperationBusMasterWrite64, the data is committed to the target system memory.
    1826    Any resources used for the mapping are freed. 
     1826   Any resources used for the mapping are freed.
    18271827
    18281828   @param[in] This      A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
    18291829   @param[in] Mapping   The mapping value returned from Map().
    1830    
     1830
    18311831   @retval EFI_SUCCESS            The range was unmapped.
    18321832   @retval EFI_INVALID_PARAMETER  Mapping is not a value that was returned by Map().
     
    18601860    if (MapInfo->Operation == EfiPciOperationBusMasterWrite || MapInfo->Operation == EfiPciOperationBusMasterWrite64) {
    18611861      CopyMem (
    1862         (VOID *)(UINTN)MapInfo->HostAddress, 
     1862        (VOID *)(UINTN)MapInfo->HostAddress,
    18631863        (VOID *)(UINTN)MapInfo->MappedHostAddress,
    18641864        MapInfo->NumberOfBytes
     
    18781878   Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or
    18791879   EfiPciOperationBusMasterCommonBuffer64 mapping.
    1880  
     1880
    18811881   @param This        A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
    18821882   @param Type        This parameter is not used and must be ignored.
     
    18851885   @param HostAddress A pointer to store the base system memory address of the allocated range.
    18861886   @param Attributes  The requested bit mask of attributes for the allocated range. Only
    1887                       the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED, 
     1887                      the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED,
    18881888                      and EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE may be used with this function.
    1889    
     1889
    18901890   @retval EFI_SUCCESS            The requested memory pages were allocated.
    18911891   @retval EFI_INVALID_PARAMETER  MemoryType is invalid.
     
    19231923    return EFI_INVALID_PARAMETER;
    19241924  }
    1925  
     1925
    19261926  //
    19271927  // The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
     
    19541954   @param Pages       The number of pages to free.
    19551955   @param HostAddress The base system memory address of the allocated range.
    1956    
     1956
    19571957   @retval EFI_SUCCESS            The requested memory pages were freed.
    19581958   @retval EFI_INVALID_PARAMETER  The memory range specified by HostAddress and Pages
     
    19831983
    19841984   @param This        A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
    1985    
     1985
    19861986   @retval EFI_SUCCESS        The PCI posted write transactions were flushed from the PCI host
    19871987                              bridge to system memory.
     
    20042004/**
    20052005   Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the
    2006    attributes that a PCI root bridge is currently using. 
     2006   attributes that a PCI root bridge is currently using.
    20072007
    20082008   The GetAttributes() function returns the mask of attributes that this PCI root bridge supports
     
    20142014   @param Attributes  A pointer to the mask of attributes that this PCI root bridge is
    20152015                      currently using.
    2016    
     2016
    20172017   @retval  EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI root
    20182018                                  bridge supports is returned in Supports. If Attributes is
     
    20422042  //
    20432043  if (Supported != NULL) {
    2044     *Supported  = PrivateData->Supports; 
     2044    *Supported  = PrivateData->Supports;
    20452045  }
    20462046
     
    20482048    *Attributes = PrivateData->Attributes;
    20492049  }
    2050  
     2050
    20512051  return EFI_SUCCESS;
    20522052}
     
    20762076   @param[in, out]  ResourceLength  A pointer to the length of the resource range to be modified by the
    20772077                                    attributes specified by Attributes.
    2078    
     2078
    20792079   @retval  EFI_SUCCESS     The current configuration of this PCI root bridge was returned in Resources.
    20802080   @retval  EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.
     
    20882088  IN     UINT64                           Attributes,
    20892089  IN OUT UINT64                           *ResourceBase,
    2090   IN OUT UINT64                           *ResourceLength 
     2090  IN OUT UINT64                           *ResourceLength
    20912091  )
    20922092{
    20932093  PCI_ROOT_BRIDGE_INSTANCE            *PrivateData;
    2094  
     2094
    20952095  PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(This);
    2096  
     2096
    20972097  if (Attributes != 0) {
    20982098    if ((Attributes & (~(PrivateData->Supports))) != 0) {
     
    21002100    }
    21012101  }
    2102  
     2102
    21032103  //
    21042104  // This is a generic driver for a PC-AT class system.  It does not have any
    2105   // chipset specific knowlegde, so none of the attributes can be set or 
    2106   // cleared.  Any attempt to set attribute that are already set will succeed, 
     2105  // chipset specific knowlegde, so none of the attributes can be set or
     2106  // cleared.  Any attempt to set attribute that are already set will succeed,
    21072107  // and any attempt to set an attribute that is not supported will fail.
    21082108  //
     
    21312131                            caller must treat the return buffer as read-only data, and the buffer
    21322132                            must not be freed by the caller.
    2133    
     2133
    21342134   @retval  EFI_SUCCESS     The current configuration of this PCI root bridge was returned in Resources.
    21352135   @retval  EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.
     
    21482148
    21492149  PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);
    2150  
     2150
    21512151  for (Index = 0; Index < TypeMax; Index++) {
    21522152    if (PrivateData->ResAllocNode[Index].Status == ResAllocated) {
     
    21542154      Configuration.SpaceDesp[Index].AddrRangeMax = PrivateData->ResAllocNode[Index].Base + PrivateData->ResAllocNode[Index].Length - 1;
    21552155      Configuration.SpaceDesp[Index].AddrLen      = PrivateData->ResAllocNode[Index].Length;
    2156     } 
    2157   } 
    2158    
    2159   *Resources = &Configuration;     
     2156    }
     2157  }
     2158
     2159  *Resources = &Configuration;
    21602160  return EFI_SUCCESS;
    21612161}
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette