VirtualBox

Ignore:
Timestamp:
Oct 29, 2015 4:30:44 AM (9 years ago)
Author:
vboxsync
Message:

EFI/Firmware: Merged in the svn:eol-style, svn:mime-type and trailing whitespace cleanup that was done after the initial UDK2014.SP1 import: svn merge /vendor/edk2/UDK2014.SP1 /vendor/edk2/current .

Location:
trunk/src/VBox/Devices/EFI/Firmware
Files:
4 edited

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Unmodified
Added
Removed

  • trunk/src/VBox/Devices/EFI/Firmware

  • trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c

    r58459 r58466  
    33
    44Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
    5 This program and the accompanying materials                         
    6 are licensed and made available under the terms and conditions of the BSD License         
    7 which accompanies this distribution.  The full text of the license may be found at       
    8 http://opensource.org/licenses/bsd-license.php                                           
    9                                                                                          
    10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5This program and the accompanying materials
     6are licensed and made available under the terms and conditions of the BSD License
     7which accompanies this distribution.  The full text of the license may be found at
     8http://opensource.org/licenses/bsd-license.php
     9
     10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212
    1313**/
    … …  
    7373  Check parameters to a CPU I/O 2 Protocol service request.
    7474
    75   The I/O operations are carried out exactly as requested. The caller is responsible 
    76   for satisfying any alignment and I/O width restrictions that a PI System on a 
    77   platform might require. For example on some platforms, width requests of 
    78   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
     75  The I/O operations are carried out exactly as requested. The caller is responsible
     76  for satisfying any alignment and I/O width restrictions that a PI System on a
     77  platform might require. For example on some platforms, width requests of
     78  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
    7979  be handled by the driver.
    80  
     80
    8181  @param[in] MmioOperation  TRUE for an MMIO operation, FALSE for I/O Port operation.
    8282  @param[in] Width          Signifies the width of the I/O or Memory operation.
    83   @param[in] Address        The base address of the I/O operation. 
    84   @param[in] Count          The number of I/O operations to perform. The number of 
     83  @param[in] Address        The base address of the I/O operation.
     84  @param[in] Count          The number of I/O operations to perform. The number of
    8585                            bytes moved is Width size * Count, starting at Address.
    8686  @param[in] Buffer         For read operations, the destination buffer to store the results.
    … …  
    9191  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    9292  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    93   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
     93  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
    9494                                 and Count is not valid for this PI system.
    9595
    … …  
    136136    return EFI_INVALID_PARAMETER;
    137137  }
    138  
     138
    139139  //
    140140  // Check to see if Address is aligned
    … …  
    145145
    146146  //
    147   // Check to see if any address associated with this transfer exceeds the maximum 
     147  // Check to see if any address associated with this transfer exceeds the maximum
    148148  // allowed address.  The maximum address implied by the parameters passed in is
    149149  // Address + Size * Count.  If the following condition is met, then the transfer
    … …  
    152152  //    Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
    153153  //
    154   // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count 
     154  // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
    155155  // can also be the maximum integer value supported by the CPU, this range
    156156  // check must be adjusted to avoid all oveflow conditions.
    157   //   
    158   // The following form of the range check is equivalent but assumes that 
     157  //
     158  // The following form of the range check is equivalent but assumes that
    159159  // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
    160160  //
    … …  
    164164      return EFI_UNSUPPORTED;
    165165    }
    166   } else { 
     166  } else {
    167167    MaxCount = RShiftU64 (Limit, Width);
    168168    if (MaxCount < (Count - 1)) {
    … …  
    188188  Reads memory-mapped registers.
    189189
    190   The I/O operations are carried out exactly as requested. The caller is responsible 
    191   for satisfying any alignment and I/O width restrictions that a PI System on a 
    192   platform might require. For example on some platforms, width requests of 
    193   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
     190  The I/O operations are carried out exactly as requested. The caller is responsible
     191  for satisfying any alignment and I/O width restrictions that a PI System on a
     192  platform might require. For example on some platforms, width requests of
     193  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
    194194  be handled by the driver.
    195  
    196   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, 
    197   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for 
     195
     196  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
     197  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
    198198  each of the Count operations that is performed.
    199  
    200   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, 
    201   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is 
    202   incremented for each of the Count operations that is performed. The read or 
     199
     200  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
     201  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
     202  incremented for each of the Count operations that is performed. The read or
    203203  write operation is performed Count times on the same Address.
    204  
    205   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, 
    206   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is 
    207   incremented for each of the Count operations that is performed. The read or 
     204
     205  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
     206  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
     207  incremented for each of the Count operations that is performed. The read or
    208208  write operation is performed Count times from the first element of Buffer.
    209  
     209
    210210  @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
    211211  @param[in]  Width    Signifies the width of the I/O or Memory operation.
    212   @param[in]  Address  The base address of the I/O operation. 
    213   @param[in]  Count    The number of I/O operations to perform. The number of 
     212  @param[in]  Address  The base address of the I/O operation.
     213  @param[in]  Count    The number of I/O operations to perform. The number of
    214214                       bytes moved is Width size * Count, starting at Address.
    215215  @param[out] Buffer   For read operations, the destination buffer to store the results.
    … …  
    220220  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    221221  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    222   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
     222  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
    223223                                 and Count is not valid for this PI system.
    224224
    … …  
    268268  Writes memory-mapped registers.
    269269
    270   The I/O operations are carried out exactly as requested. The caller is responsible 
    271   for satisfying any alignment and I/O width restrictions that a PI System on a 
    272   platform might require. For example on some platforms, width requests of 
    273   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
     270  The I/O operations are carried out exactly as requested. The caller is responsible
     271  for satisfying any alignment and I/O width restrictions that a PI System on a
     272  platform might require. For example on some platforms, width requests of
     273  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
    274274  be handled by the driver.
    275  
    276   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, 
    277   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for 
     275
     276  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
     277  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
    278278  each of the Count operations that is performed.
    279  
    280   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, 
    281   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is 
    282   incremented for each of the Count operations that is performed. The read or 
     279
     280  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
     281  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
     282  incremented for each of the Count operations that is performed. The read or
    283283  write operation is performed Count times on the same Address.
    284  
    285   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, 
    286   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is 
    287   incremented for each of the Count operations that is performed. The read or 
     284
     285  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
     286  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
     287  incremented for each of the Count operations that is performed. The read or
    288288  write operation is performed Count times from the first element of Buffer.
    289  
     289
    290290  @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
    291291  @param[in]  Width    Signifies the width of the I/O or Memory operation.
    292   @param[in]  Address  The base address of the I/O operation. 
    293   @param[in]  Count    The number of I/O operations to perform. The number of 
     292  @param[in]  Address  The base address of the I/O operation.
     293  @param[in]  Count    The number of I/O operations to perform. The number of
    294294                       bytes moved is Width size * Count, starting at Address.
    295295  @param[in]  Buffer   For read operations, the destination buffer to store the results.
    … …  
    300300  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    301301  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    302   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
     302  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
    303303                                 and Count is not valid for this PI system.
    304304
    … …  
    348348  Reads I/O registers.
    349349
    350   The I/O operations are carried out exactly as requested. The caller is responsible 
    351   for satisfying any alignment and I/O width restrictions that a PI System on a 
    352   platform might require. For example on some platforms, width requests of 
    353   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
     350  The I/O operations are carried out exactly as requested. The caller is responsible
     351  for satisfying any alignment and I/O width restrictions that a PI System on a
     352  platform might require. For example on some platforms, width requests of
     353  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
    354354  be handled by the driver.
    355  
    356   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, 
    357   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for 
     355
     356  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
     357  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
    358358  each of the Count operations that is performed.
    359  
    360   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, 
    361   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is 
    362   incremented for each of the Count operations that is performed. The read or 
     359
     360  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
     361  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
     362  incremented for each of the Count operations that is performed. The read or
    363363  write operation is performed Count times on the same Address.
    364  
    365   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, 
    366   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is 
    367   incremented for each of the Count operations that is performed. The read or 
     364
     365  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
     366  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
     367  incremented for each of the Count operations that is performed. The read or
    368368  write operation is performed Count times from the first element of Buffer.
    369  
     369
    370370  @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
    371371  @param[in]  Width    Signifies the width of the I/O or Memory operation.
    372   @param[in]  Address  The base address of the I/O operation. 
    373   @param[in]  Count    The number of I/O operations to perform. The number of 
     372  @param[in]  Address  The base address of the I/O operation.
     373  @param[in]  Count    The number of I/O operations to perform. The number of
    374374                       bytes moved is Width size * Count, starting at Address.
    375375  @param[out] Buffer   For read operations, the destination buffer to store the results.
    … …  
    380380  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    381381  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    382   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
     382  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
    383383                                 and Count is not valid for this PI system.
    384384
    … …  
    427427  Write I/O registers.
    428428
    429   The I/O operations are carried out exactly as requested. The caller is responsible 
    430   for satisfying any alignment and I/O width restrictions that a PI System on a 
    431   platform might require. For example on some platforms, width requests of 
    432   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
     429  The I/O operations are carried out exactly as requested. The caller is responsible
     430  for satisfying any alignment and I/O width restrictions that a PI System on a
     431  platform might require. For example on some platforms, width requests of
     432  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
    433433  be handled by the driver.
    434  
    435   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, 
    436   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for 
     434
     435  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
     436  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
    437437  each of the Count operations that is performed.
    438  
    439   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, 
    440   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is 
    441   incremented for each of the Count operations that is performed. The read or 
     438
     439  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
     440  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
     441  incremented for each of the Count operations that is performed. The read or
    442442  write operation is performed Count times on the same Address.
    443  
    444   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, 
    445   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is 
    446   incremented for each of the Count operations that is performed. The read or 
     443
     444  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
     445  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
     446  incremented for each of the Count operations that is performed. The read or
    447447  write operation is performed Count times from the first element of Buffer.
    448  
     448
    449449  @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
    450450  @param[in]  Width    Signifies the width of the I/O or Memory operation.
    451   @param[in]  Address  The base address of the I/O operation. 
    452   @param[in]  Count    The number of I/O operations to perform. The number of 
     451  @param[in]  Address  The base address of the I/O operation.
     452  @param[in]  Count    The number of I/O operations to perform. The number of
    453453                       bytes moved is Width size * Count, starting at Address.
    454454  @param[in]  Buffer   For read operations, the destination buffer to store the results.
    … …  
    459459  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    460460  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    461   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
     461  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
    462462                                 and Count is not valid for this PI system.
    463                                  
     463
    464464**/
    465465EFI_STATUS
    … …  
    502502    }
    503503  }
    504  
     504
    505505  return EFI_SUCCESS;
    506506}
    … …  
    509509  The user Entry Point for module CpuIo2Dxe. The user code starts with this function.
    510510
    511   @param[in] ImageHandle    The firmware allocated handle for the EFI image. 
     511  @param[in] ImageHandle    The firmware allocated handle for the EFI image.
    512512  @param[in] SystemTable    A pointer to the EFI System Table.
    513  
     513
    514514  @retval EFI_SUCCESS       The entry point is executed successfully.
    515515  @retval other             Some error occurs when executing this entry point.

  • trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h

    r48674 r58466  
    33
    44Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
    5 This program and the accompanying materials                         
    6 are licensed and made available under the terms and conditions of the BSD License         
    7 which accompanies this distribution.  The full text of the license may be found at       
    8 http://opensource.org/licenses/bsd-license.php                                           
    9                                                                                          
    10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
    11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
     5This program and the accompanying materials
     6are licensed and made available under the terms and conditions of the BSD License
     7which accompanies this distribution.  The full text of the license may be found at
     8http://opensource.org/licenses/bsd-license.php
     9
     10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1212
    1313**/
    … …  
    3030  Reads memory-mapped registers.
    3131
    32   The I/O operations are carried out exactly as requested. The caller is responsible 
    33   for satisfying any alignment and I/O width restrictions that a PI System on a 
    34   platform might require. For example on some platforms, width requests of 
    35   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
    36   be handled by the driver.
    37  
    38   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, 
    39   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for 
    40   each of the Count operations that is performed.
    41  
    42   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, 
    43   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is 
    44   incremented for each of the Count operations that is performed. The read or 
    45   write operation is performed Count times on the same Address.
    46  
    47   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, 
    48   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is 
    49   incremented for each of the Count operations that is performed. The read or 
    50   write operation is performed Count times from the first element of Buffer.
    51  
    52   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
    53   @param[in]  Width    Signifies the width of the I/O or Memory operation.
    54   @param[in]  Address  The base address of the I/O operation. 
    55   @param[in]  Count    The number of I/O operations to perform. The number of 
     32  The I/O operations are carried out exactly as requested. The caller is responsible
     33  for satisfying any alignment and I/O width restrictions that a PI System on a
     34  platform might require. For example on some platforms, width requests of
     35  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
     36  be handled by the driver.
     37
     38  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
     39  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
     40  each of the Count operations that is performed.
     41
     42  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
     43  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
     44  incremented for each of the Count operations that is performed. The read or
     45  write operation is performed Count times on the same Address.
     46
     47  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
     48  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
     49  incremented for each of the Count operations that is performed. The read or
     50  write operation is performed Count times from the first element of Buffer.
     51
     52  @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
     53  @param[in]  Width    Signifies the width of the I/O or Memory operation.
     54  @param[in]  Address  The base address of the I/O operation.
     55  @param[in]  Count    The number of I/O operations to perform. The number of
    5656                       bytes moved is Width size * Count, starting at Address.
    5757  @param[out] Buffer   For read operations, the destination buffer to store the results.
    … …  
    6262  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    6363  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    64   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
     64  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
    6565                                 and Count is not valid for this PI system.
    6666
    … …  
    7979  Writes memory-mapped registers.
    8080
    81   The I/O operations are carried out exactly as requested. The caller is responsible 
    82   for satisfying any alignment and I/O width restrictions that a PI System on a 
    83   platform might require. For example on some platforms, width requests of 
    84   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
    85   be handled by the driver.
    86  
    87   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, 
    88   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for 
    89   each of the Count operations that is performed.
    90  
    91   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, 
    92   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is 
    93   incremented for each of the Count operations that is performed. The read or 
    94   write operation is performed Count times on the same Address.
    95  
    96   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, 
    97   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is 
    98   incremented for each of the Count operations that is performed. The read or 
    99   write operation is performed Count times from the first element of Buffer.
    100  
    101   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
    102   @param[in]  Width    Signifies the width of the I/O or Memory operation.
    103   @param[in]  Address  The base address of the I/O operation. 
    104   @param[in]  Count    The number of I/O operations to perform. The number of 
     81  The I/O operations are carried out exactly as requested. The caller is responsible
     82  for satisfying any alignment and I/O width restrictions that a PI System on a
     83  platform might require. For example on some platforms, width requests of
     84  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
     85  be handled by the driver.
     86
     87  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
     88  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
     89  each of the Count operations that is performed.
     90
     91  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
     92  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
     93  incremented for each of the Count operations that is performed. The read or
     94  write operation is performed Count times on the same Address.
     95
     96  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
     97  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
     98  incremented for each of the Count operations that is performed. The read or
     99  write operation is performed Count times from the first element of Buffer.
     100
     101  @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
     102  @param[in]  Width    Signifies the width of the I/O or Memory operation.
     103  @param[in]  Address  The base address of the I/O operation.
     104  @param[in]  Count    The number of I/O operations to perform. The number of
    105105                       bytes moved is Width size * Count, starting at Address.
    106106  @param[in]  Buffer   For read operations, the destination buffer to store the results.
    … …  
    111111  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    112112  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    113   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
     113  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
    114114                                 and Count is not valid for this PI system.
    115115
    … …  
    128128  Reads I/O registers.
    129129
    130   The I/O operations are carried out exactly as requested. The caller is responsible 
    131   for satisfying any alignment and I/O width restrictions that a PI System on a 
    132   platform might require. For example on some platforms, width requests of 
    133   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
    134   be handled by the driver.
    135  
    136   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, 
    137   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for 
    138   each of the Count operations that is performed.
    139  
    140   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, 
    141   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is 
    142   incremented for each of the Count operations that is performed. The read or 
    143   write operation is performed Count times on the same Address.
    144  
    145   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, 
    146   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is 
    147   incremented for each of the Count operations that is performed. The read or 
    148   write operation is performed Count times from the first element of Buffer.
    149  
    150   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
    151   @param[in]  Width    Signifies the width of the I/O or Memory operation.
    152   @param[in]  Address  The base address of the I/O operation. 
    153   @param[in]  Count    The number of I/O operations to perform. The number of 
     130  The I/O operations are carried out exactly as requested. The caller is responsible
     131  for satisfying any alignment and I/O width restrictions that a PI System on a
     132  platform might require. For example on some platforms, width requests of
     133  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
     134  be handled by the driver.
     135
     136  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
     137  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
     138  each of the Count operations that is performed.
     139
     140  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
     141  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
     142  incremented for each of the Count operations that is performed. The read or
     143  write operation is performed Count times on the same Address.
     144
     145  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
     146  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
     147  incremented for each of the Count operations that is performed. The read or
     148  write operation is performed Count times from the first element of Buffer.
     149
     150  @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
     151  @param[in]  Width    Signifies the width of the I/O or Memory operation.
     152  @param[in]  Address  The base address of the I/O operation.
     153  @param[in]  Count    The number of I/O operations to perform. The number of
    154154                       bytes moved is Width size * Count, starting at Address.
    155155  @param[out] Buffer   For read operations, the destination buffer to store the results.
    … …  
    160160  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    161161  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    162   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
     162  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
    163163                                 and Count is not valid for this PI system.
    164164
    … …  
    177177  Write I/O registers.
    178178
    179   The I/O operations are carried out exactly as requested. The caller is responsible 
    180   for satisfying any alignment and I/O width restrictions that a PI System on a 
    181   platform might require. For example on some platforms, width requests of 
    182   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 
    183   be handled by the driver.
    184  
    185   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, 
    186   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for 
    187   each of the Count operations that is performed.
    188  
    189   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, 
    190   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is 
    191   incremented for each of the Count operations that is performed. The read or 
    192   write operation is performed Count times on the same Address.
    193  
    194   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, 
    195   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is 
    196   incremented for each of the Count operations that is performed. The read or 
    197   write operation is performed Count times from the first element of Buffer.
    198  
    199   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
    200   @param[in]  Width    Signifies the width of the I/O or Memory operation.
    201   @param[in]  Address  The base address of the I/O operation. 
    202   @param[in]  Count    The number of I/O operations to perform. The number of 
     179  The I/O operations are carried out exactly as requested. The caller is responsible
     180  for satisfying any alignment and I/O width restrictions that a PI System on a
     181  platform might require. For example on some platforms, width requests of
     182  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
     183  be handled by the driver.
     184
     185  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
     186  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
     187  each of the Count operations that is performed.
     188
     189  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
     190  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
     191  incremented for each of the Count operations that is performed. The read or
     192  write operation is performed Count times on the same Address.
     193
     194  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
     195  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
     196  incremented for each of the Count operations that is performed. The read or
     197  write operation is performed Count times from the first element of Buffer.
     198
     199  @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
     200  @param[in]  Width    Signifies the width of the I/O or Memory operation.
     201  @param[in]  Address  The base address of the I/O operation.
     202  @param[in]  Count    The number of I/O operations to perform. The number of
    203203                       bytes moved is Width size * Count, starting at Address.
    204204  @param[in]  Buffer   For read operations, the destination buffer to store the results.
    … …  
    209209  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
    210210  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
    211   @retval EFI_UNSUPPORTED        The address range specified by Address, Width, 
    212                                  and Count is not valid for this PI system.
    213                                  
     211  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
     212                                 and Count is not valid for this PI system.
     213
    214214**/
    215215EFI_STATUS

  • trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf

    r58459 r58466  
    1919  FILE_GUID                      = A19B1FE7-C1BC-49F8-875F-54A5D542443F
    2020  MODULE_TYPE                    = DXE_DRIVER
    21   VERSION_STRING                 = 1.0 
     21  VERSION_STRING                 = 1.0
    2222  ENTRY_POINT                    = CpuIo2Initialize
    2323
    … …  
    3131  CpuIo2Dxe.c
    3232  CpuIo2Dxe.h
    33  
     33
    3434[Packages]
    3535  MdePkg/MdePkg.dec
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