VirtualBox

Ignore:
Timestamp:
Oct 29, 2015 4:30:44 AM (9 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
103777
Message:

EFI/Firmware: Merged in the svn:eol-style, svn:mime-type and trailing whitespace cleanup that was done after the initial UDK2014.SP1 import: svn merge /vendor/edk2/UDK2014.SP1 /vendor/edk2/current .

Location:
trunk/src/VBox/Devices/EFI/Firmware
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/EFI/Firmware

  • trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf

    r58459 r58466  
    99#  which accompanies this distribution.  The full text of the license may be found at
    1010#  http://opensource.org/licenses/bsd-license.php
    11 # 
     11#
    1212#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
    1313#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    14 # 
     14#
    1515##
    1616
    … …  
    2222  MODULE_TYPE                    = BASE
    2323  VERSION_STRING                 = 1.0
    24   LIBRARY_CLASS                  = UefiCpuLib 
     24  LIBRARY_CLASS                  = UefiCpuLib
    2525
    2626#

  • trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S

    r48674 r58466  
    1414
    1515#
    16 # Float control word initial value: 
     16# Float control word initial value:
    1717# all exceptions masked, double-precision, round-to-nearest
    1818#
    … …  
    4242    finit
    4343    fldcw   ASM_PFX(mFpuControlWord)
    44    
     44
    4545    #
    4646    # Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
    … …  
    5151    btl     $25, %edx
    5252    jnc     Done
    53    
     53
    5454    #
    5555    # Set OSFXSR bit 9 in CR4
    5656    #
    57     movl    %cr4, %eax 
     57    movl    %cr4, %eax
    5858    or      $0x200, %eax
    5959    movl    %eax, %cr4
    60    
     60
    6161    #
    6262    # The processor should support SSE instruction and we can use

  • trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm

    r48674 r58466  
    1010;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
    1111;*
    12 ;*   
     12;*
    1313;------------------------------------------------------------------------------
    1414
    … …  
    1818    .const
    1919;
    20 ; Float control word initial value: 
     20; Float control word initial value:
    2121; all exceptions masked, double-precision, round-to-nearest
    2222;
    … …  
    2626; all exceptions masked, round-to-nearest, flush to zero for masked underflow
    2727;
    28 mMmxControlWord       DD      01F80h 
     28mMmxControlWord       DD      01F80h
    2929
    3030    .xmm
    … …  
    4848    finit
    4949    fldcw   mFpuControlWord
    50    
     50
    5151    ;
    5252    ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
    … …  
    5757    bt      edx, 25
    5858    jnc     Done
    59    
     59
    6060    ;
    6161    ; Set OSFXSR bit 9 in CR4
    … …  
    6464    or      eax, BIT9
    6565    mov     cr4, eax
    66    
     66
    6767    ;
    6868    ; The processor should support SSE instruction and we can use

  • trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S

    r58459 r58466  
    2828    #
    2929    finit
    30    
     30
    3131    #
    32     # Float control word initial value: 
     32    # Float control word initial value:
    3333    # all exceptions masked, double-precision, round-to-nearest
    3434    #
    3535    pushq   $0x037F
    36     lea     (%rsp), %rax 
     36    lea     (%rsp), %rax
    3737    fldcw   (%rax)
    3838    popq    %rax
    39    
     39
    4040    #
    4141    # Set OSFXSR bit 9 in CR4
    4242    #
    43     movq    %cr4, %rax 
     43    movq    %cr4, %rax
    4444    or      $0x200, %rax
    4545    movq    %rax, %cr4
    … …  
    4848    # Multimedia-extensions control word:
    4949    # all exceptions masked, round-to-nearest, flush to zero for masked underflow
    50     #   
     50    #
    5151    pushq   $0x01F80
    5252    lea     (%rsp), %rax
    5353    ldmxcsr (%rax)
    5454    popq    %rax
    55    
     55
    5656    ret
    5757

  • trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm

    r58459 r58466  
    1616.const
    1717;
    18 ; Float control word initial value: 
     18; Float control word initial value:
    1919; all exceptions masked, double-extended-precision, round-to-nearest
    2020;
    … …  
    2424; all exceptions masked, round-to-nearest, flush to zero for masked underflow
    2525;
    26 mMmxControlWord       DD      01F80h 
     26mMmxControlWord       DD      01F80h
    2727
    2828.code
    … …  
    4242    ; Initialize floating point units
    4343    ;
    44     ; The following opcodes stand for instruction 'finit' 
     44    ; The following opcodes stand for instruction 'finit'
    4545    ; to be supported by some 64-bit assemblers
    4646    ;
    4747    DB      9Bh, 0DBh, 0E3h
    4848    fldcw   mFpuControlWord
    49    
     49
    5050    ;
    5151    ; Set OSFXSR bit 9 in CR4
    … …  
    5656
    5757    ldmxcsr mMmxControlWord
    58    
     58
    5959    ret
    6060InitializeFloatingPointUnits ENDP
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