- Timestamp:
- Nov 2, 2015 8:44:55 PM (9 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r58487 r58545 612 612 static void hmR0SvmSetMsrPermission(PVMCPU pVCpu, unsigned uMsr, SVMMSREXITREAD enmRead, SVMMSREXITWRITE enmWrite) 613 613 { 614 unsigned u lBit;614 unsigned uBit; 615 615 uint8_t *pbMsrBitmap = (uint8_t *)pVCpu->hm.s.svm.pvMsrBitmap; 616 616 … … 626 626 { 627 627 /* Pentium-compatible MSRs. */ 628 u lBit = uMsr * 2;628 uBit = uMsr * 2; 629 629 } 630 630 else if ( uMsr >= 0xC0000000 … … 632 632 { 633 633 /* AMD Sixth Generation x86 Processor MSRs. */ 634 u lBit = (uMsr - 0xC0000000) * 2;634 uBit = (uMsr - 0xC0000000) * 2; 635 635 pbMsrBitmap += 0x800; 636 636 } … … 639 639 { 640 640 /* AMD Seventh and Eighth Generation Processor MSRs. */ 641 u lBit = (uMsr - 0xC0001000) * 2;641 uBit = (uMsr - 0xC0001000) * 2; 642 642 pbMsrBitmap += 0x1000; 643 643 } … … 648 648 } 649 649 650 Assert(u lBit < 0x3fff /* 16 * 1024 - 1 */);650 Assert(uBit < 0x3fff /* 16 * 1024 - 1 */); 651 651 if (enmRead == SVMMSREXIT_INTERCEPT_READ) 652 ASMBitSet(pbMsrBitmap, u lBit);652 ASMBitSet(pbMsrBitmap, uBit); 653 653 else 654 ASMBitClear(pbMsrBitmap, u lBit);654 ASMBitClear(pbMsrBitmap, uBit); 655 655 656 656 if (enmWrite == SVMMSREXIT_INTERCEPT_WRITE) 657 ASMBitSet(pbMsrBitmap, u lBit + 1);657 ASMBitSet(pbMsrBitmap, uBit + 1); 658 658 else 659 ASMBitClear(pbMsrBitmap, u lBit + 1);659 ASMBitClear(pbMsrBitmap, uBit + 1); 660 660 661 661 PSVMVMCB pVmcb = (PSVMVMCB)pVCpu->hm.s.svm.pvVmcb;
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