Changeset 58705 in vbox
- Timestamp:
- Nov 16, 2015 4:26:56 PM (9 years ago)
- svn:sync-xref-src-repo-rev:
- 104132
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/iprt/asm-amd64-x86.h
r57926 r58705 93 93 uint16_t cbIdt; 94 94 /** Address of the IDT. */ 95 uintptr_t pIdt; 95 #if ARCH_BITS != 64 96 uint32_t pIdt; 97 #else 98 uint64_t pIdt; 99 #endif 96 100 } RTIDTR, *PRTIDTR; 97 101 #pragma pack() … … 102 106 { 103 107 /** Alignment padding. */ 104 uint 8_tau16Padding[ARCH_BITS == 64 ? 3 : 1];108 uint16_t au16Padding[ARCH_BITS == 64 ? 3 : 1]; 105 109 /** The IDTR structure. */ 106 110 RTIDTR Idtr; … … 116 120 RTIDTRALIGNEDINT s; 117 121 } RTIDTRALIGNED; 118 AssertCompileSize(RTIDTRALIGNED, ARCH_BITS * 2 /8);122 AssertCompileSize(RTIDTRALIGNED, ((ARCH_BITS == 64) + 1) * 8); 119 123 /** Pointer to a an RTIDTR alignment wrapper. */ 120 124 typedef RTIDTRALIGNED *PRIDTRALIGNED; … … 128 132 uint16_t cbGdt; 129 133 /** Address of the GDT. */ 130 uintptr_t pGdt; 134 #if ARCH_BITS != 64 135 uint32_t pGdt; 136 #else 137 uint64_t pGdt; 138 #endif 131 139 } RTGDTR, *PRTGDTR; 132 140 #pragma pack() … … 137 145 { 138 146 /** Alignment padding. */ 139 uint 8_tau16Padding[ARCH_BITS == 64 ? 3 : 1];147 uint16_t au16Padding[ARCH_BITS == 64 ? 3 : 1]; 140 148 /** The GDTR structure. */ 141 149 RTGDTR Gdtr; … … 151 159 RTGDTRALIGNEDINT s; 152 160 } RTGDTRALIGNED; 153 AssertCompileSize(RT GDTRALIGNED, ARCH_BITS * 2 /8);161 AssertCompileSize(RTIDTRALIGNED, ((ARCH_BITS == 64) + 1) * 8); 154 162 /** Pointer to a an RTGDTR alignment wrapper. */ 155 163 typedef RTGDTRALIGNED *PRGDTRALIGNED; … … 1553 1561 */ 1554 1562 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 1555 DECLASM(RTCCUINT REG) ASMGetCR0(void);1556 #else 1557 DECLINLINE(RTCCUINT REG) ASMGetCR0(void)1558 { 1559 RTCCUINT REG uCR0;1563 DECLASM(RTCCUINTXREG) ASMGetCR0(void); 1564 #else 1565 DECLINLINE(RTCCUINTXREG) ASMGetCR0(void) 1566 { 1567 RTCCUINTXREG uCR0; 1560 1568 # if RT_INLINE_ASM_USES_INTRIN 1561 1569 uCR0 = __readcr0(); … … 1589 1597 */ 1590 1598 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 1591 DECLASM(void) ASMSetCR0(RTCCUINT REG uCR0);1592 #else 1593 DECLINLINE(void) ASMSetCR0(RTCCUINT REG uCR0)1599 DECLASM(void) ASMSetCR0(RTCCUINTXREG uCR0); 1600 #else 1601 DECLINLINE(void) ASMSetCR0(RTCCUINTXREG uCR0) 1594 1602 { 1595 1603 # if RT_INLINE_ASM_USES_INTRIN … … 1623 1631 */ 1624 1632 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 1625 DECLASM(RTCCUINT REG) ASMGetCR2(void);1626 #else 1627 DECLINLINE(RTCCUINT REG) ASMGetCR2(void)1628 { 1629 RTCCUINT REG uCR2;1633 DECLASM(RTCCUINTXREG) ASMGetCR2(void); 1634 #else 1635 DECLINLINE(RTCCUINTXREG) ASMGetCR2(void) 1636 { 1637 RTCCUINTXREG uCR2; 1630 1638 # if RT_INLINE_ASM_USES_INTRIN 1631 1639 uCR2 = __readcr2(); … … 1659 1667 */ 1660 1668 #if RT_INLINE_ASM_EXTERNAL 1661 DECLASM(void) ASMSetCR2(RTCCUINT REG uCR2);1662 #else 1663 DECLINLINE(void) ASMSetCR2(RTCCUINT REG uCR2)1669 DECLASM(void) ASMSetCR2(RTCCUINTXREG uCR2); 1670 #else 1671 DECLINLINE(void) ASMSetCR2(RTCCUINTXREG uCR2) 1664 1672 { 1665 1673 # if RT_INLINE_ASM_GNU_STYLE … … 1690 1698 */ 1691 1699 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 1692 DECLASM(RTCCUINT REG) ASMGetCR3(void);1693 #else 1694 DECLINLINE(RTCCUINT REG) ASMGetCR3(void)1695 { 1696 RTCCUINT REG uCR3;1700 DECLASM(RTCCUINTXREG) ASMGetCR3(void); 1701 #else 1702 DECLINLINE(RTCCUINTXREG) ASMGetCR3(void) 1703 { 1704 RTCCUINTXREG uCR3; 1697 1705 # if RT_INLINE_ASM_USES_INTRIN 1698 1706 uCR3 = __readcr3(); … … 1727 1735 */ 1728 1736 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 1729 DECLASM(void) ASMSetCR3(RTCCUINT REG uCR3);1730 #else 1731 DECLINLINE(void) ASMSetCR3(RTCCUINT REG uCR3)1737 DECLASM(void) ASMSetCR3(RTCCUINTXREG uCR3); 1738 #else 1739 DECLINLINE(void) ASMSetCR3(RTCCUINTXREG uCR3) 1732 1740 { 1733 1741 # if RT_INLINE_ASM_USES_INTRIN … … 1768 1776 1769 1777 # elif RT_INLINE_ASM_GNU_STYLE 1770 RTCCUINT REG u;1778 RTCCUINTXREG u; 1771 1779 # ifdef RT_ARCH_AMD64 1772 1780 __asm__ __volatile__("movq %%cr3, %0\n\t" … … 1799 1807 */ 1800 1808 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 1801 DECLASM(RTCCUINT REG) ASMGetCR4(void);1802 #else 1803 DECLINLINE(RTCCUINT REG) ASMGetCR4(void)1804 { 1805 RTCCUINT REG uCR4;1809 DECLASM(RTCCUINTXREG) ASMGetCR4(void); 1810 #else 1811 DECLINLINE(RTCCUINTXREG) ASMGetCR4(void) 1812 { 1813 RTCCUINTXREG uCR4; 1806 1814 # if RT_INLINE_ASM_USES_INTRIN 1807 1815 uCR4 = __readcr4(); … … 1841 1849 */ 1842 1850 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 1843 DECLASM(void) ASMSetCR4(RTCCUINT REG uCR4);1844 #else 1845 DECLINLINE(void) ASMSetCR4(RTCCUINT REG uCR4)1851 DECLASM(void) ASMSetCR4(RTCCUINTXREG uCR4); 1852 #else 1853 DECLINLINE(void) ASMSetCR4(RTCCUINTXREG uCR4) 1846 1854 { 1847 1855 # if RT_INLINE_ASM_USES_INTRIN … … 1878 1886 */ 1879 1887 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 1880 DECLASM(RTCCUINT REG) ASMGetCR8(void);1881 #else 1882 DECLINLINE(RTCCUINT REG) ASMGetCR8(void)1888 DECLASM(RTCCUINTXREG) ASMGetCR8(void); 1889 #else 1890 DECLINLINE(RTCCUINTXREG) ASMGetCR8(void) 1883 1891 { 1884 1892 # ifdef RT_ARCH_AMD64 1885 RTCCUINT REG uCR8;1893 RTCCUINTXREG uCR8; 1886 1894 # if RT_INLINE_ASM_USES_INTRIN 1887 1895 uCR8 = __readcr8(); … … 2118 2126 */ 2119 2127 #if RT_INLINE_ASM_EXTERNAL 2120 DECLASM(uint64_t) ASMRdMsrEx(uint32_t uRegister, RTCCUINT REG uXDI);2121 #else 2122 DECLINLINE(uint64_t) ASMRdMsrEx(uint32_t uRegister, RTCCUINT REG uXDI)2128 DECLASM(uint64_t) ASMRdMsrEx(uint32_t uRegister, RTCCUINTXREG uXDI); 2129 #else 2130 DECLINLINE(uint64_t) ASMRdMsrEx(uint32_t uRegister, RTCCUINTXREG uXDI) 2123 2131 { 2124 2132 RTUINT64U u; … … 2156 2164 */ 2157 2165 #if RT_INLINE_ASM_EXTERNAL 2158 DECLASM(void) ASMWrMsrEx(uint32_t uRegister, RTCCUINT REG uXDI, uint64_t u64Val);2159 #else 2160 DECLINLINE(void) ASMWrMsrEx(uint32_t uRegister, RTCCUINT REG uXDI, uint64_t u64Val)2166 DECLASM(void) ASMWrMsrEx(uint32_t uRegister, RTCCUINTXREG uXDI, uint64_t u64Val); 2167 #else 2168 DECLINLINE(void) ASMWrMsrEx(uint32_t uRegister, RTCCUINTXREG uXDI, uint64_t u64Val) 2161 2169 { 2162 2170 RTUINT64U u; … … 2262 2270 */ 2263 2271 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2264 DECLASM(RTCCUINT REG) ASMGetDR0(void);2265 #else 2266 DECLINLINE(RTCCUINT REG) ASMGetDR0(void)2267 { 2268 RTCCUINT REG uDR0;2272 DECLASM(RTCCUINTXREG) ASMGetDR0(void); 2273 #else 2274 DECLINLINE(RTCCUINTXREG) ASMGetDR0(void) 2275 { 2276 RTCCUINTXREG uDR0; 2269 2277 # if RT_INLINE_ASM_USES_INTRIN 2270 2278 uDR0 = __readdr(0); … … 2298 2306 */ 2299 2307 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2300 DECLASM(RTCCUINT REG) ASMGetDR1(void);2301 #else 2302 DECLINLINE(RTCCUINT REG) ASMGetDR1(void)2303 { 2304 RTCCUINT REG uDR1;2308 DECLASM(RTCCUINTXREG) ASMGetDR1(void); 2309 #else 2310 DECLINLINE(RTCCUINTXREG) ASMGetDR1(void) 2311 { 2312 RTCCUINTXREG uDR1; 2305 2313 # if RT_INLINE_ASM_USES_INTRIN 2306 2314 uDR1 = __readdr(1); … … 2334 2342 */ 2335 2343 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2336 DECLASM(RTCCUINT REG) ASMGetDR2(void);2337 #else 2338 DECLINLINE(RTCCUINT REG) ASMGetDR2(void)2339 { 2340 RTCCUINT REG uDR2;2344 DECLASM(RTCCUINTXREG) ASMGetDR2(void); 2345 #else 2346 DECLINLINE(RTCCUINTXREG) ASMGetDR2(void) 2347 { 2348 RTCCUINTXREG uDR2; 2341 2349 # if RT_INLINE_ASM_USES_INTRIN 2342 2350 uDR2 = __readdr(2); … … 2370 2378 */ 2371 2379 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2372 DECLASM(RTCCUINT REG) ASMGetDR3(void);2373 #else 2374 DECLINLINE(RTCCUINT REG) ASMGetDR3(void)2375 { 2376 RTCCUINT REG uDR3;2380 DECLASM(RTCCUINTXREG) ASMGetDR3(void); 2381 #else 2382 DECLINLINE(RTCCUINTXREG) ASMGetDR3(void) 2383 { 2384 RTCCUINTXREG uDR3; 2377 2385 # if RT_INLINE_ASM_USES_INTRIN 2378 2386 uDR3 = __readdr(3); … … 2406 2414 */ 2407 2415 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2408 DECLASM(RTCCUINT REG) ASMGetDR6(void);2409 #else 2410 DECLINLINE(RTCCUINT REG) ASMGetDR6(void)2411 { 2412 RTCCUINT REG uDR6;2416 DECLASM(RTCCUINTXREG) ASMGetDR6(void); 2417 #else 2418 DECLINLINE(RTCCUINTXREG) ASMGetDR6(void) 2419 { 2420 RTCCUINTXREG uDR6; 2413 2421 # if RT_INLINE_ASM_USES_INTRIN 2414 2422 uDR6 = __readdr(6); … … 2442 2450 */ 2443 2451 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2444 DECLASM(RTCCUINT REG) ASMGetAndClearDR6(void);2445 #else 2446 DECLINLINE(RTCCUINT REG) ASMGetAndClearDR6(void)2447 { 2448 RTCCUINT REG uDR6;2452 DECLASM(RTCCUINTXREG) ASMGetAndClearDR6(void); 2453 #else 2454 DECLINLINE(RTCCUINTXREG) ASMGetAndClearDR6(void) 2455 { 2456 RTCCUINTXREG uDR6; 2449 2457 # if RT_INLINE_ASM_USES_INTRIN 2450 2458 uDR6 = __readdr(6); 2451 2459 __writedr(6, 0xffff0ff0U); /* 31-16 and 4-11 are 1's, 12 and 63-31 are zero. */ 2452 2460 # elif RT_INLINE_ASM_GNU_STYLE 2453 RTCCUINT REG uNewValue = 0xffff0ff0U;/* 31-16 and 4-11 are 1's, 12 and 63-31 are zero. */2461 RTCCUINTXREG uNewValue = 0xffff0ff0U;/* 31-16 and 4-11 are 1's, 12 and 63-31 are zero. */ 2454 2462 # ifdef RT_ARCH_AMD64 2455 2463 __asm__ __volatile__("movq %%dr6, %0\n\t" … … 2491 2499 */ 2492 2500 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2493 DECLASM(RTCCUINT REG) ASMGetDR7(void);2494 #else 2495 DECLINLINE(RTCCUINT REG) ASMGetDR7(void)2496 { 2497 RTCCUINT REG uDR7;2501 DECLASM(RTCCUINTXREG) ASMGetDR7(void); 2502 #else 2503 DECLINLINE(RTCCUINTXREG) ASMGetDR7(void) 2504 { 2505 RTCCUINTXREG uDR7; 2498 2506 # if RT_INLINE_ASM_USES_INTRIN 2499 2507 uDR7 = __readdr(7); … … 2527 2535 */ 2528 2536 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2529 DECLASM(void) ASMSetDR0(RTCCUINT REG uDRVal);2530 #else 2531 DECLINLINE(void) ASMSetDR0(RTCCUINT REG uDRVal)2537 DECLASM(void) ASMSetDR0(RTCCUINTXREG uDRVal); 2538 #else 2539 DECLINLINE(void) ASMSetDR0(RTCCUINTXREG uDRVal) 2532 2540 { 2533 2541 # if RT_INLINE_ASM_USES_INTRIN … … 2561 2569 */ 2562 2570 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2563 DECLASM(void) ASMSetDR1(RTCCUINT REG uDRVal);2564 #else 2565 DECLINLINE(void) ASMSetDR1(RTCCUINT REG uDRVal)2571 DECLASM(void) ASMSetDR1(RTCCUINTXREG uDRVal); 2572 #else 2573 DECLINLINE(void) ASMSetDR1(RTCCUINTXREG uDRVal) 2566 2574 { 2567 2575 # if RT_INLINE_ASM_USES_INTRIN … … 2595 2603 */ 2596 2604 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2597 DECLASM(void) ASMSetDR2(RTCCUINT REG uDRVal);2598 #else 2599 DECLINLINE(void) ASMSetDR2(RTCCUINT REG uDRVal)2605 DECLASM(void) ASMSetDR2(RTCCUINTXREG uDRVal); 2606 #else 2607 DECLINLINE(void) ASMSetDR2(RTCCUINTXREG uDRVal) 2600 2608 { 2601 2609 # if RT_INLINE_ASM_USES_INTRIN … … 2629 2637 */ 2630 2638 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2631 DECLASM(void) ASMSetDR3(RTCCUINT REG uDRVal);2632 #else 2633 DECLINLINE(void) ASMSetDR3(RTCCUINT REG uDRVal)2639 DECLASM(void) ASMSetDR3(RTCCUINTXREG uDRVal); 2640 #else 2641 DECLINLINE(void) ASMSetDR3(RTCCUINTXREG uDRVal) 2634 2642 { 2635 2643 # if RT_INLINE_ASM_USES_INTRIN … … 2663 2671 */ 2664 2672 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2665 DECLASM(void) ASMSetDR6(RTCCUINT REG uDRVal);2666 #else 2667 DECLINLINE(void) ASMSetDR6(RTCCUINT REG uDRVal)2673 DECLASM(void) ASMSetDR6(RTCCUINTXREG uDRVal); 2674 #else 2675 DECLINLINE(void) ASMSetDR6(RTCCUINTXREG uDRVal) 2668 2676 { 2669 2677 # if RT_INLINE_ASM_USES_INTRIN … … 2697 2705 */ 2698 2706 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 2699 DECLASM(void) ASMSetDR7(RTCCUINT REG uDRVal);2700 #else 2701 DECLINLINE(void) ASMSetDR7(RTCCUINT REG uDRVal)2707 DECLASM(void) ASMSetDR7(RTCCUINTXREG uDRVal); 2708 #else 2709 DECLINLINE(void) ASMSetDR7(RTCCUINTXREG uDRVal) 2702 2710 { 2703 2711 # if RT_INLINE_ASM_USES_INTRIN … … 3314 3322 #endif /* !_MSC_VER) || !RT_ARCH_AMD64 */ 3315 3323 3324 #if defined(__WATCOMC__) && ARCH_BITS == 16 3325 # include "asm-amd64-x86-watcom-16.h" 3326 #elif defined(__WATCOMC__) && ARCH_BITS == 32 3327 # include "asm-amd64-x86-watcom-32.h" 3328 #endif 3329 3316 3330 /** @} */ 3317 3331 #endif
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