Changeset 58917 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Nov 30, 2015 12:50:29 AM (9 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r58915 r58917 316 316 * VMX VM-exit handler. 317 317 * 318 * @returns VBox status code.318 * @returns Strict VBox status code. 319 319 * @param pVCpu The cross context virtual CPU structure. 320 320 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 324 324 */ 325 325 #ifndef HMVMX_USE_FUNCTION_TABLE 326 typedef intFNVMXEXITHANDLER(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);326 typedef DECLINLINE(VBOXSTRICTRC) FNVMXEXITHANDLER(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 327 327 #else 328 typedef DECLCALLBACK( int)FNVMXEXITHANDLER(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);328 typedef DECLCALLBACK(VBOXSTRICTRC) FNVMXEXITHANDLER(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 329 329 /** Pointer to VM-exit handler. */ 330 typedef FNVMXEXITHANDLER *PFNVMXEXITHANDLER; 330 typedef FNVMXEXITHANDLER *PFNVMXEXITHANDLER; 331 #endif 332 333 /** 334 * VMX VM-exit handler, non-strict status code. 335 * 336 * This is generally the same as FNVMXEXITHANDLER, the NSRC bit is just FYI. 337 * 338 * @returns VBox status code, no informational status code returned. 339 * @param pVCpu The cross context virtual CPU structure. 340 * @param pMixedCtx Pointer to the guest-CPU context. The data may be 341 * out-of-sync. Make sure to update the required 342 * fields before using them. 343 * @param pVmxTransient Pointer to the VMX-transient structure. 344 * 345 * @remarks This is not used on anything returning VERR_EM_INTERPRETER as the 346 * use of that status code will be replaced with VINF_EM_SOMETHING 347 * later when switching over to IEM. 348 */ 349 #ifndef HMVMX_USE_FUNCTION_TABLE 350 typedef DECLINLINE(int) FNVMXEXITHANDLERNSRC(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 351 #else 352 typedef FNVMXEXITHANDLER FNVMXEXITHANDLERNSRC; 331 353 #endif 332 354 … … 345 367 #endif 346 368 #ifndef HMVMX_USE_FUNCTION_TABLE 347 DECLINLINE(int) hmR0VmxHandleExit(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient, uint32_t rcReason); 348 # define HMVMX_EXIT_DECL static int 369 DECLINLINE(VBOXSTRICTRC) hmR0VmxHandleExit(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient, uint32_t rcReason); 370 # define HMVMX_EXIT_DECL DECLINLINE(VBOXSTRICTRC) 371 # define HMVMX_EXIT_NSRC_DECL DECLINLINE(int) 349 372 #else 350 # define HMVMX_EXIT_DECL static DECLCALLBACK(int) 373 # define HMVMX_EXIT_DECL static DECLCALLBACK(VBOXSTRICTRC) 374 # define HMVMX_EXIT_NSRC_DECL HMVMX_EXIT_DECL 351 375 #endif 376 352 377 DECLINLINE(VBOXSTRICTRC) hmR0VmxHandleExitStep(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient, 353 378 uint32_t uExitReason, uint16_t uCsStart, uint64_t uRipStart); … … 356 381 * @{ 357 382 */ 358 static FNVMXEXITHANDLER hmR0VmxExitXcptOrNmi;359 static FNVMXEXITHANDLER hmR0VmxExitExtInt;360 static FNVMXEXITHANDLER hmR0VmxExitTripleFault;361 static FNVMXEXITHANDLER hmR0VmxExitInitSignal;362 static FNVMXEXITHANDLER hmR0VmxExitSipi;363 static FNVMXEXITHANDLER hmR0VmxExitIoSmi;364 static FNVMXEXITHANDLER hmR0VmxExitSmi;365 static FNVMXEXITHANDLER hmR0VmxExitIntWindow;366 static FNVMXEXITHANDLER hmR0VmxExitNmiWindow;367 static FNVMXEXITHANDLER hmR0VmxExitTaskSwitch;368 static FNVMXEXITHANDLER hmR0VmxExitCpuid;369 static FNVMXEXITHANDLER hmR0VmxExitGetsec;370 static FNVMXEXITHANDLER hmR0VmxExitHlt;371 static FNVMXEXITHANDLER hmR0VmxExitInvd;372 static FNVMXEXITHANDLER hmR0VmxExitInvlpg;373 static FNVMXEXITHANDLER hmR0VmxExitRdpmc;374 static FNVMXEXITHANDLER hmR0VmxExitVmcall;375 static FNVMXEXITHANDLER hmR0VmxExitRdtsc;376 static FNVMXEXITHANDLER hmR0VmxExitRsm;377 static FNVMXEXITHANDLER hmR0VmxExitSetPendingXcptUD;378 static FNVMXEXITHANDLER hmR0VmxExitMovCRx;379 static FNVMXEXITHANDLER hmR0VmxExitMovDRx;380 static FNVMXEXITHANDLER hmR0VmxExitIoInstr;381 static FNVMXEXITHANDLER hmR0VmxExitRdmsr;382 static FNVMXEXITHANDLER hmR0VmxExitWrmsr;383 static FNVMXEXITHANDLER hmR0VmxExitErrInvalidGuestState;384 static FNVMXEXITHANDLER hmR0VmxExitErrMsrLoad;385 static FNVMXEXITHANDLER hmR0VmxExitErrUndefined;386 static FNVMXEXITHANDLER hmR0VmxExitMwait;387 static FNVMXEXITHANDLER hmR0VmxExitMtf;388 static FNVMXEXITHANDLER hmR0VmxExitMonitor;389 static FNVMXEXITHANDLER hmR0VmxExitPause;390 static FNVMXEXITHANDLER hmR0VmxExitErrMachineCheck;391 static FNVMXEXITHANDLER hmR0VmxExitTprBelowThreshold;392 static FNVMXEXITHANDLER hmR0VmxExitApicAccess;393 static FNVMXEXITHANDLER hmR0VmxExitXdtrAccess;394 static FNVMXEXITHANDLER hmR0VmxExitXdtrAccess;395 static FNVMXEXITHANDLER hmR0VmxExitEptViolation;396 static FNVMXEXITHANDLER hmR0VmxExitEptMisconfig;397 static FNVMXEXITHANDLER hmR0VmxExitRdtscp;398 static FNVMXEXITHANDLER hmR0VmxExitPreemptTimer;399 static FNVMXEXITHANDLER hmR0VmxExitWbinvd;400 static FNVMXEXITHANDLER hmR0VmxExitXsetbv;401 static FNVMXEXITHANDLER hmR0VmxExitRdrand;402 static FNVMXEXITHANDLER hmR0VmxExitInvpcid;383 static FNVMXEXITHANDLER hmR0VmxExitXcptOrNmi; 384 static FNVMXEXITHANDLER hmR0VmxExitExtInt; 385 static FNVMXEXITHANDLER hmR0VmxExitTripleFault; 386 static FNVMXEXITHANDLERNSRC hmR0VmxExitInitSignal; 387 static FNVMXEXITHANDLERNSRC hmR0VmxExitSipi; 388 static FNVMXEXITHANDLERNSRC hmR0VmxExitIoSmi; 389 static FNVMXEXITHANDLERNSRC hmR0VmxExitSmi; 390 static FNVMXEXITHANDLERNSRC hmR0VmxExitIntWindow; 391 static FNVMXEXITHANDLERNSRC hmR0VmxExitNmiWindow; 392 static FNVMXEXITHANDLER hmR0VmxExitTaskSwitch; 393 static FNVMXEXITHANDLER hmR0VmxExitCpuid; 394 static FNVMXEXITHANDLER hmR0VmxExitGetsec; 395 static FNVMXEXITHANDLER hmR0VmxExitHlt; 396 static FNVMXEXITHANDLERNSRC hmR0VmxExitInvd; 397 static FNVMXEXITHANDLER hmR0VmxExitInvlpg; 398 static FNVMXEXITHANDLER hmR0VmxExitRdpmc; 399 static FNVMXEXITHANDLER hmR0VmxExitVmcall; 400 static FNVMXEXITHANDLER hmR0VmxExitRdtsc; 401 static FNVMXEXITHANDLERNSRC hmR0VmxExitRsm; 402 static FNVMXEXITHANDLERNSRC hmR0VmxExitSetPendingXcptUD; 403 static FNVMXEXITHANDLER hmR0VmxExitMovCRx; 404 static FNVMXEXITHANDLER hmR0VmxExitMovDRx; 405 static FNVMXEXITHANDLER hmR0VmxExitIoInstr; 406 static FNVMXEXITHANDLER hmR0VmxExitRdmsr; 407 static FNVMXEXITHANDLER hmR0VmxExitWrmsr; 408 static FNVMXEXITHANDLERNSRC hmR0VmxExitErrInvalidGuestState; 409 static FNVMXEXITHANDLERNSRC hmR0VmxExitErrMsrLoad; 410 static FNVMXEXITHANDLERNSRC hmR0VmxExitErrUndefined; 411 static FNVMXEXITHANDLER hmR0VmxExitMwait; 412 static FNVMXEXITHANDLER hmR0VmxExitMtf; 413 static FNVMXEXITHANDLER hmR0VmxExitMonitor; 414 static FNVMXEXITHANDLER hmR0VmxExitPause; 415 static FNVMXEXITHANDLERNSRC hmR0VmxExitErrMachineCheck; 416 static FNVMXEXITHANDLERNSRC hmR0VmxExitTprBelowThreshold; 417 static FNVMXEXITHANDLER hmR0VmxExitApicAccess; 418 static FNVMXEXITHANDLER hmR0VmxExitXdtrAccess; 419 static FNVMXEXITHANDLER hmR0VmxExitXdtrAccess; 420 static FNVMXEXITHANDLER hmR0VmxExitEptViolation; 421 static FNVMXEXITHANDLER hmR0VmxExitEptMisconfig; 422 static FNVMXEXITHANDLER hmR0VmxExitRdtscp; 423 static FNVMXEXITHANDLER hmR0VmxExitPreemptTimer; 424 static FNVMXEXITHANDLERNSRC hmR0VmxExitWbinvd; 425 static FNVMXEXITHANDLER hmR0VmxExitXsetbv; 426 static FNVMXEXITHANDLER hmR0VmxExitRdrand; 427 static FNVMXEXITHANDLER hmR0VmxExitInvpcid; 403 428 /** @} */ 404 429 … … 8970 8995 8971 8996 #ifndef HMVMX_USE_FUNCTION_TABLE 8972 DECLINLINE(int) hmR0VmxHandleExit(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient, uint32_t rcReason) 8973 { 8974 #ifdef DEBUG_ramshankar 8975 # define SVVMCS() do { int rc2 = hmR0VmxSaveGuestState(pVCpu, pMixedCtx); AssertRC(rc2); } while (0) 8976 # define LDVMCS() do { HMCPU_CF_SET(pVCpu, HM_CHANGED_ALL_GUEST); } while (0) 8977 #endif 8978 int rc; 8997 DECLINLINE(VBOXSTRICTRC) hmR0VmxHandleExit(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient, uint32_t rcReason) 8998 { 8999 # ifdef DEBUG_ramshankar 9000 # define RETURN_EXIT_CALL(a_CallExpr) \ 9001 do { \ 9002 /* int rc2 = hmR0VmxSaveGuestState(pVCpu, pMixedCtx); AssertRC(rc2); */ \ 9003 VBOXSTRICTRC rcStrict = a_CallExpr; \ 9004 /* HMCPU_CF_SET(pVCpu, HM_CHANGED_ALL_GUEST); */ \ 9005 return rcStrict; \ 9006 } while (0) 9007 # else 9008 # define RETURN_EXIT_CALL(a_CallExpr) return a_CallExpr 9009 # endif 8979 9010 switch (rcReason) 8980 9011 { 8981 case VMX_EXIT_EPT_MISCONFIG: /* SVVMCS(); */ rc = hmR0VmxExitEptMisconfig(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8982 case VMX_EXIT_EPT_VIOLATION: /* SVVMCS(); */ rc = hmR0VmxExitEptViolation(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8983 case VMX_EXIT_IO_INSTR: /* SVVMCS(); */ rc = hmR0VmxExitIoInstr(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8984 case VMX_EXIT_CPUID: /* SVVMCS(); */ rc = hmR0VmxExitCpuid(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8985 case VMX_EXIT_RDTSC: /* SVVMCS(); */ rc = hmR0VmxExitRdtsc(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8986 case VMX_EXIT_RDTSCP: /* SVVMCS(); */ rc = hmR0VmxExitRdtscp(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8987 case VMX_EXIT_APIC_ACCESS: /* SVVMCS(); */ rc = hmR0VmxExitApicAccess(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8988 case VMX_EXIT_XCPT_OR_NMI: /* SVVMCS(); */ rc = hmR0VmxExitXcptOrNmi(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8989 case VMX_EXIT_MOV_CRX: /* SVVMCS(); */ rc = hmR0VmxExitMovCRx(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8990 case VMX_EXIT_EXT_INT: /* SVVMCS(); */ rc = hmR0VmxExitExtInt(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8991 case VMX_EXIT_INT_WINDOW: /* SVVMCS(); */ rc = hmR0VmxExitIntWindow(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8992 case VMX_EXIT_MWAIT: /* SVVMCS(); */ rc = hmR0VmxExitMwait(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8993 case VMX_EXIT_MONITOR: /* SVVMCS(); */ rc = hmR0VmxExitMonitor(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8994 case VMX_EXIT_TASK_SWITCH: /* SVVMCS(); */ rc = hmR0VmxExitTaskSwitch(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8995 case VMX_EXIT_PREEMPT_TIMER: /* SVVMCS(); */ rc = hmR0VmxExitPreemptTimer(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8996 case VMX_EXIT_RDMSR: /* SVVMCS(); */ rc = hmR0VmxExitRdmsr(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8997 case VMX_EXIT_WRMSR: /* SVVMCS(); */ rc = hmR0VmxExitWrmsr(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8998 case VMX_EXIT_MOV_DRX: /* SVVMCS(); */ rc = hmR0VmxExitMovDRx(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;8999 case VMX_EXIT_TPR_BELOW_THRESHOLD: /* SVVMCS(); */ rc = hmR0VmxExitTprBelowThreshold(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9000 case VMX_EXIT_HLT: /* SVVMCS(); */ rc = hmR0VmxExitHlt(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9001 case VMX_EXIT_INVD: /* SVVMCS(); */ rc = hmR0VmxExitInvd(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9002 case VMX_EXIT_INVLPG: /* SVVMCS(); */ rc = hmR0VmxExitInvlpg(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9003 case VMX_EXIT_RSM: /* SVVMCS(); */ rc = hmR0VmxExitRsm(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9004 case VMX_EXIT_MTF: /* SVVMCS(); */ rc = hmR0VmxExitMtf(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9005 case VMX_EXIT_PAUSE: /* SVVMCS(); */ rc = hmR0VmxExitPause(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9006 case VMX_EXIT_XDTR_ACCESS: /* SVVMCS(); */ rc = hmR0VmxExitXdtrAccess(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9007 case VMX_EXIT_TR_ACCESS: /* SVVMCS(); */ rc = hmR0VmxExitXdtrAccess(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9008 case VMX_EXIT_WBINVD: /* SVVMCS(); */ rc = hmR0VmxExitWbinvd(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9009 case VMX_EXIT_XSETBV: /* SVVMCS(); */ rc = hmR0VmxExitXsetbv(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9010 case VMX_EXIT_RDRAND: /* SVVMCS(); */ rc = hmR0VmxExitRdrand(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9011 case VMX_EXIT_INVPCID: /* SVVMCS(); */ rc = hmR0VmxExitInvpcid(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9012 case VMX_EXIT_GETSEC: /* SVVMCS(); */ rc = hmR0VmxExitGetsec(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9013 case VMX_EXIT_RDPMC: /* SVVMCS(); */ rc = hmR0VmxExitRdpmc(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9014 case VMX_EXIT_VMCALL: /* SVVMCS(); */ rc = hmR0VmxExitVmcall(pVCpu, pMixedCtx, pVmxTransient); /* LDVMCS(); */ break;9015 9016 case VMX_EXIT_TRIPLE_FAULT: r c = hmR0VmxExitTripleFault(pVCpu, pMixedCtx, pVmxTransient); break;9017 case VMX_EXIT_NMI_WINDOW: r c = hmR0VmxExitNmiWindow(pVCpu, pMixedCtx, pVmxTransient); break;9018 case VMX_EXIT_INIT_SIGNAL: r c = hmR0VmxExitInitSignal(pVCpu, pMixedCtx, pVmxTransient); break;9019 case VMX_EXIT_SIPI: r c = hmR0VmxExitSipi(pVCpu, pMixedCtx, pVmxTransient); break;9020 case VMX_EXIT_IO_SMI: r c = hmR0VmxExitIoSmi(pVCpu, pMixedCtx, pVmxTransient); break;9021 case VMX_EXIT_SMI: r c = hmR0VmxExitSmi(pVCpu, pMixedCtx, pVmxTransient); break;9022 case VMX_EXIT_ERR_MSR_LOAD: r c = hmR0VmxExitErrMsrLoad(pVCpu, pMixedCtx, pVmxTransient); break;9023 case VMX_EXIT_ERR_INVALID_GUEST_STATE: r c = hmR0VmxExitErrInvalidGuestState(pVCpu, pMixedCtx, pVmxTransient); break;9024 case VMX_EXIT_ERR_MACHINE_CHECK: r c = hmR0VmxExitErrMachineCheck(pVCpu, pMixedCtx, pVmxTransient); break;9012 case VMX_EXIT_EPT_MISCONFIG: RETURN_EXIT_CALL(hmR0VmxExitEptMisconfig(pVCpu, pMixedCtx, pVmxTransient)); 9013 case VMX_EXIT_EPT_VIOLATION: RETURN_EXIT_CALL(hmR0VmxExitEptViolation(pVCpu, pMixedCtx, pVmxTransient)); 9014 case VMX_EXIT_IO_INSTR: RETURN_EXIT_CALL(hmR0VmxExitIoInstr(pVCpu, pMixedCtx, pVmxTransient)); 9015 case VMX_EXIT_CPUID: RETURN_EXIT_CALL(hmR0VmxExitCpuid(pVCpu, pMixedCtx, pVmxTransient)); 9016 case VMX_EXIT_RDTSC: RETURN_EXIT_CALL(hmR0VmxExitRdtsc(pVCpu, pMixedCtx, pVmxTransient)); 9017 case VMX_EXIT_RDTSCP: RETURN_EXIT_CALL(hmR0VmxExitRdtscp(pVCpu, pMixedCtx, pVmxTransient)); 9018 case VMX_EXIT_APIC_ACCESS: RETURN_EXIT_CALL(hmR0VmxExitApicAccess(pVCpu, pMixedCtx, pVmxTransient)); 9019 case VMX_EXIT_XCPT_OR_NMI: RETURN_EXIT_CALL(hmR0VmxExitXcptOrNmi(pVCpu, pMixedCtx, pVmxTransient)); 9020 case VMX_EXIT_MOV_CRX: RETURN_EXIT_CALL(hmR0VmxExitMovCRx(pVCpu, pMixedCtx, pVmxTransient)); 9021 case VMX_EXIT_EXT_INT: RETURN_EXIT_CALL(hmR0VmxExitExtInt(pVCpu, pMixedCtx, pVmxTransient)); 9022 case VMX_EXIT_INT_WINDOW: RETURN_EXIT_CALL(hmR0VmxExitIntWindow(pVCpu, pMixedCtx, pVmxTransient)); 9023 case VMX_EXIT_MWAIT: RETURN_EXIT_CALL(hmR0VmxExitMwait(pVCpu, pMixedCtx, pVmxTransient)); 9024 case VMX_EXIT_MONITOR: RETURN_EXIT_CALL(hmR0VmxExitMonitor(pVCpu, pMixedCtx, pVmxTransient)); 9025 case VMX_EXIT_TASK_SWITCH: RETURN_EXIT_CALL(hmR0VmxExitTaskSwitch(pVCpu, pMixedCtx, pVmxTransient)); 9026 case VMX_EXIT_PREEMPT_TIMER: RETURN_EXIT_CALL(hmR0VmxExitPreemptTimer(pVCpu, pMixedCtx, pVmxTransient)); 9027 case VMX_EXIT_RDMSR: RETURN_EXIT_CALL(hmR0VmxExitRdmsr(pVCpu, pMixedCtx, pVmxTransient)); 9028 case VMX_EXIT_WRMSR: RETURN_EXIT_CALL(hmR0VmxExitWrmsr(pVCpu, pMixedCtx, pVmxTransient)); 9029 case VMX_EXIT_MOV_DRX: RETURN_EXIT_CALL(hmR0VmxExitMovDRx(pVCpu, pMixedCtx, pVmxTransient)); 9030 case VMX_EXIT_TPR_BELOW_THRESHOLD: RETURN_EXIT_CALL(hmR0VmxExitTprBelowThreshold(pVCpu, pMixedCtx, pVmxTransient)); 9031 case VMX_EXIT_HLT: RETURN_EXIT_CALL(hmR0VmxExitHlt(pVCpu, pMixedCtx, pVmxTransient)); 9032 case VMX_EXIT_INVD: RETURN_EXIT_CALL(hmR0VmxExitInvd(pVCpu, pMixedCtx, pVmxTransient)); 9033 case VMX_EXIT_INVLPG: RETURN_EXIT_CALL(hmR0VmxExitInvlpg(pVCpu, pMixedCtx, pVmxTransient)); 9034 case VMX_EXIT_RSM: RETURN_EXIT_CALL(hmR0VmxExitRsm(pVCpu, pMixedCtx, pVmxTransient)); 9035 case VMX_EXIT_MTF: RETURN_EXIT_CALL(hmR0VmxExitMtf(pVCpu, pMixedCtx, pVmxTransient)); 9036 case VMX_EXIT_PAUSE: RETURN_EXIT_CALL(hmR0VmxExitPause(pVCpu, pMixedCtx, pVmxTransient)); 9037 case VMX_EXIT_XDTR_ACCESS: RETURN_EXIT_CALL(hmR0VmxExitXdtrAccess(pVCpu, pMixedCtx, pVmxTransient)); 9038 case VMX_EXIT_TR_ACCESS: RETURN_EXIT_CALL(hmR0VmxExitXdtrAccess(pVCpu, pMixedCtx, pVmxTransient)); 9039 case VMX_EXIT_WBINVD: RETURN_EXIT_CALL(hmR0VmxExitWbinvd(pVCpu, pMixedCtx, pVmxTransient)); 9040 case VMX_EXIT_XSETBV: RETURN_EXIT_CALL(hmR0VmxExitXsetbv(pVCpu, pMixedCtx, pVmxTransient)); 9041 case VMX_EXIT_RDRAND: RETURN_EXIT_CALL(hmR0VmxExitRdrand(pVCpu, pMixedCtx, pVmxTransient)); 9042 case VMX_EXIT_INVPCID: RETURN_EXIT_CALL(hmR0VmxExitInvpcid(pVCpu, pMixedCtx, pVmxTransient)); 9043 case VMX_EXIT_GETSEC: RETURN_EXIT_CALL(hmR0VmxExitGetsec(pVCpu, pMixedCtx, pVmxTransient)); 9044 case VMX_EXIT_RDPMC: RETURN_EXIT_CALL(hmR0VmxExitRdpmc(pVCpu, pMixedCtx, pVmxTransient)); 9045 case VMX_EXIT_VMCALL: RETURN_EXIT_CALL(hmR0VmxExitVmcall(pVCpu, pMixedCtx, pVmxTransient)); 9046 9047 case VMX_EXIT_TRIPLE_FAULT: return hmR0VmxExitTripleFault(pVCpu, pMixedCtx, pVmxTransient); 9048 case VMX_EXIT_NMI_WINDOW: return hmR0VmxExitNmiWindow(pVCpu, pMixedCtx, pVmxTransient); 9049 case VMX_EXIT_INIT_SIGNAL: return hmR0VmxExitInitSignal(pVCpu, pMixedCtx, pVmxTransient); 9050 case VMX_EXIT_SIPI: return hmR0VmxExitSipi(pVCpu, pMixedCtx, pVmxTransient); 9051 case VMX_EXIT_IO_SMI: return hmR0VmxExitIoSmi(pVCpu, pMixedCtx, pVmxTransient); 9052 case VMX_EXIT_SMI: return hmR0VmxExitSmi(pVCpu, pMixedCtx, pVmxTransient); 9053 case VMX_EXIT_ERR_MSR_LOAD: return hmR0VmxExitErrMsrLoad(pVCpu, pMixedCtx, pVmxTransient); 9054 case VMX_EXIT_ERR_INVALID_GUEST_STATE: return hmR0VmxExitErrInvalidGuestState(pVCpu, pMixedCtx, pVmxTransient); 9055 case VMX_EXIT_ERR_MACHINE_CHECK: return hmR0VmxExitErrMachineCheck(pVCpu, pMixedCtx, pVmxTransient); 9025 9056 9026 9057 case VMX_EXIT_VMCLEAR: … … 9038 9069 case VMX_EXIT_XSAVES: 9039 9070 case VMX_EXIT_XRSTORS: 9040 rc = hmR0VmxExitSetPendingXcptUD(pVCpu, pMixedCtx, pVmxTransient); 9041 break; 9071 return hmR0VmxExitSetPendingXcptUD(pVCpu, pMixedCtx, pVmxTransient); 9042 9072 case VMX_EXIT_RESERVED_60: 9043 9073 case VMX_EXIT_RDSEED: /* only spurious exits, so undefined */ 9044 9074 case VMX_EXIT_RESERVED_62: 9045 9075 default: 9046 rc = hmR0VmxExitErrUndefined(pVCpu, pMixedCtx, pVmxTransient); 9047 break; 9048 } 9049 return rc; 9076 return hmR0VmxExitErrUndefined(pVCpu, pMixedCtx, pVmxTransient); 9077 } 9050 9078 } 9051 9079 #endif /* !HMVMX_USE_FUNCTION_TABLE */ … … 9194 9222 * Advances the guest RIP after reading it from the VMCS. 9195 9223 * 9196 * @returns VBox status code .9224 * @returns VBox status code, no informational status codes. 9197 9225 * @param pVCpu The cross context virtual CPU structure. 9198 9226 * @param pMixedCtx Pointer to the guest-CPU context. The data maybe … … 9223 9251 hmR0VmxSetPendingDebugXcptVmcs(pVCpu); 9224 9252 9225 return rc;9253 return VINF_SUCCESS; 9226 9254 } 9227 9255 … … 9881 9909 9882 9910 /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ 9883 rc = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 9884 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 9885 { 9886 if (rc == VINF_HM_DOUBLE_FAULT) 9887 rc = VINF_SUCCESS; 9911 VBOXSTRICTRC rcStrictRc1 = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 9912 if (RT_UNLIKELY(rcStrictRc1 == VINF_SUCCESS)) 9913 { /* likely */ } 9914 else 9915 { 9916 if (rcStrictRc1 == VINF_HM_DOUBLE_FAULT) 9917 rcStrictRc1 = VINF_SUCCESS; 9888 9918 STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatExitXcptNmi, y3); 9889 return rc ;9919 return rcStrictRc1; 9890 9920 } 9891 9921 … … 9973 10003 * VM-exit handler for interrupt-window exiting (VMX_EXIT_INT_WINDOW). 9974 10004 */ 9975 HMVMX_EXIT_ DECL hmR0VmxExitIntWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10005 HMVMX_EXIT_NSRC_DECL hmR0VmxExitIntWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 9976 10006 { 9977 10007 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 9989 10019 * VM-exit handler for NMI-window exiting (VMX_EXIT_NMI_WINDOW). 9990 10020 */ 9991 HMVMX_EXIT_ DECL hmR0VmxExitNmiWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10021 HMVMX_EXIT_NSRC_DECL hmR0VmxExitNmiWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 9992 10022 { 9993 10023 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 10026 10056 * VM-exit handler for WBINVD (VMX_EXIT_WBINVD). Conditional VM-exit. 10027 10057 */ 10028 HMVMX_EXIT_ DECL hmR0VmxExitWbinvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10058 HMVMX_EXIT_NSRC_DECL hmR0VmxExitWbinvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10029 10059 { 10030 10060 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 10037 10067 * VM-exit handler for INVD (VMX_EXIT_INVD). Unconditional VM-exit. 10038 10068 */ 10039 HMVMX_EXIT_ DECL hmR0VmxExitInvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10069 HMVMX_EXIT_NSRC_DECL hmR0VmxExitInvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10040 10070 { 10041 10071 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 10123 10153 PVM pVM = pVCpu->CTX_SUFF(pVM); 10124 10154 rc = EMInterpretRdtscp(pVM, pVCpu, pMixedCtx); 10125 if (RT_ LIKELY(rc == VINF_SUCCESS))10155 if (RT_SUCCESS(rc)) 10126 10156 { 10127 10157 rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient); … … 10191 10221 /** @todo pre-increment RIP before hypercall will break when we have to implement 10192 10222 * continuing hypercalls (e.g. Hyper-V). */ 10223 /** @todo r=bird: GIMHypercall will probably have to be able to return 10224 * informational status codes, so it should be made VBOXSTRICTRC. Not 10225 * doing that now because the status code handling isn't clean (i.e. 10226 * if you use RT_SUCCESS(rc) on the result of something, you don't 10227 * return rc in the success case, you return VINF_SUCCESS). */ 10193 10228 rc = GIMHypercall(pVCpu, pMixedCtx); 10194 10229 /* If the hypercall changes anything other than guest general-purpose registers, … … 10196 10231 return rc; 10197 10232 } 10198 else 10199 { 10200 Log4(("hmR0VmxExitVmcall: Hypercalls not enabled\n")); 10201 hmR0VmxSetPendingXcptUD(pVCpu, pMixedCtx); 10202 } 10203 10233 10234 Log4(("hmR0VmxExitVmcall: Hypercalls not enabled\n")); 10235 hmR0VmxSetPendingXcptUD(pVCpu, pMixedCtx); 10204 10236 return VINF_SUCCESS; 10205 10237 } … … 10219 10251 AssertRCReturn(rc, rc); 10220 10252 10221 VBOXSTRICTRC rc2 = EMInterpretInvlpg(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx), pVmxTransient->uExitQualification); 10222 rc = VBOXSTRICTRC_VAL(rc2); 10223 if (RT_LIKELY(rc == VINF_SUCCESS)) 10224 rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient); 10253 VBOXSTRICTRC rcStrict = EMInterpretInvlpg(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx), pVmxTransient->uExitQualification); 10254 if (RT_LIKELY(rcStrict == VINF_SUCCESS)) 10255 rcStrict = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient); 10225 10256 else 10226 { 10227 AssertMsg(rc == VERR_EM_INTERPRETER, ("hmR0VmxExitInvlpg: EMInterpretInvlpg %#RX64 failed with %Rrc\n", 10228 pVmxTransient->uExitQualification, rc)); 10229 } 10257 AssertMsg(rcStrict == VERR_EM_INTERPRETER, ("hmR0VmxExitInvlpg: EMInterpretInvlpg %#RX64 failed with %Rrc\n", 10258 pVmxTransient->uExitQualification, VBOXSTRICTRC_VAL(rcStrict))); 10230 10259 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitInvlpg); 10231 return rc ;10260 return rcStrict; 10232 10261 } 10233 10262 … … 10299 10328 * VM-exit handler for RSM (VMX_EXIT_RSM). Unconditional VM-exit. 10300 10329 */ 10301 HMVMX_EXIT_ DECL hmR0VmxExitRsm(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10330 HMVMX_EXIT_NSRC_DECL hmR0VmxExitRsm(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10302 10331 { 10303 10332 /* … … 10316 10345 * VM-exit handler for SMI (VMX_EXIT_SMI). Unconditional VM-exit. 10317 10346 */ 10318 HMVMX_EXIT_ DECL hmR0VmxExitSmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10347 HMVMX_EXIT_NSRC_DECL hmR0VmxExitSmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10319 10348 { 10320 10349 /* … … 10333 10362 * VM-exit handler for IO SMI (VMX_EXIT_IO_SMI). Unconditional VM-exit. 10334 10363 */ 10335 HMVMX_EXIT_ DECL hmR0VmxExitIoSmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10364 HMVMX_EXIT_NSRC_DECL hmR0VmxExitIoSmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10336 10365 { 10337 10366 /* Same treatment as VMX_EXIT_SMI. See comment in hmR0VmxExitSmi(). */ … … 10345 10374 * VM-exit handler for SIPI (VMX_EXIT_SIPI). Conditional VM-exit. 10346 10375 */ 10347 HMVMX_EXIT_ DECL hmR0VmxExitSipi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10376 HMVMX_EXIT_NSRC_DECL hmR0VmxExitSipi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10348 10377 { 10349 10378 /* … … 10362 10391 * VM-exit. 10363 10392 */ 10364 HMVMX_EXIT_ DECL hmR0VmxExitInitSignal(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10393 HMVMX_EXIT_NSRC_DECL hmR0VmxExitInitSignal(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10365 10394 { 10366 10395 /* … … 10416 10445 * the guest. 10417 10446 */ 10418 HMVMX_EXIT_ DECL hmR0VmxExitSetPendingXcptUD(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10447 HMVMX_EXIT_NSRC_DECL hmR0VmxExitSetPendingXcptUD(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10419 10448 { 10420 10449 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 10459 10488 pVCpu->hm.s.fLoadSaveGuestXcr0 = (pMixedCtx->cr4 & X86_CR4_OSXSAVE) && pMixedCtx->aXcr[0] != ASMGetXcr0(); 10460 10489 10461 return VBOXSTRICTRC_TODO(rcStrict);10490 return rcStrict; 10462 10491 } 10463 10492 … … 10480 10509 * Error VM-exit. 10481 10510 */ 10482 HMVMX_EXIT_ DECL hmR0VmxExitErrInvalidGuestState(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10511 HMVMX_EXIT_NSRC_DECL hmR0VmxExitErrInvalidGuestState(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10483 10512 { 10484 10513 int rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx); … … 10534 10563 * (VMX_EXIT_ERR_MSR_LOAD). Error VM-exit. 10535 10564 */ 10536 HMVMX_EXIT_ DECL hmR0VmxExitErrMsrLoad(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10565 HMVMX_EXIT_NSRC_DECL hmR0VmxExitErrMsrLoad(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10537 10566 { 10538 10567 NOREF(pVmxTransient); … … 10546 10575 * (VMX_EXIT_ERR_MACHINE_CHECK). Error VM-exit. 10547 10576 */ 10548 HMVMX_EXIT_ DECL hmR0VmxExitErrMachineCheck(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10577 HMVMX_EXIT_NSRC_DECL hmR0VmxExitErrMachineCheck(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10549 10578 { 10550 10579 NOREF(pVmxTransient); … … 10558 10587 * theory. 10559 10588 */ 10560 HMVMX_EXIT_ DECL hmR0VmxExitErrUndefined(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10589 HMVMX_EXIT_NSRC_DECL hmR0VmxExitErrUndefined(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10561 10590 { 10562 10591 AssertMsgFailed(("Huh!? Undefined VM-exit reason %d. pVCpu=%p pMixedCtx=%p\n", pVmxTransient->uExitReason, pVCpu, pMixedCtx)); … … 10645 10674 ("hmR0VmxExitRdmsr: failed, invalid error code %Rrc\n", rc)); 10646 10675 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdmsr); 10647 if (RT_ LIKELY(rc == VINF_SUCCESS))10676 if (RT_SUCCESS(rc)) 10648 10677 { 10649 10678 rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient); … … 10679 10708 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitWrmsr); 10680 10709 10681 if (RT_ LIKELY(rc == VINF_SUCCESS))10710 if (RT_SUCCESS(rc)) 10682 10711 { 10683 10712 rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient); … … 10790 10819 * threshold (VMX_EXIT_TPR_BELOW_THRESHOLD). Conditional VM-exit. 10791 10820 */ 10792 HMVMX_EXIT_ DECL hmR0VmxExitTprBelowThreshold(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)10821 HMVMX_EXIT_NSRC_DECL hmR0VmxExitTprBelowThreshold(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 10793 10822 { 10794 10823 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 10839 10868 VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification), 10840 10869 VMX_EXIT_QUALIFICATION_CRX_GENREG(uExitQualification)); 10841 AssertMsg( rcStrict == VINF_SUCCESS || rcStrict == VINF_IEM_RAISED_XCPT || rcStrict == VINF_PGM_CHANGE_MODE10870 AssertMsg( rcStrict == VINF_SUCCESS || rcStrict == VINF_IEM_RAISED_XCPT || rcStrict == VINF_PGM_CHANGE_MODE 10842 10871 || rcStrict == VINF_PGM_SYNC_CR3, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 10843 10872 switch (VMX_EXIT_QUALIFICATION_CRX_REGISTER(uExitQualification)) … … 10928 10957 STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatExitMovCRx, y2); 10929 10958 NOREF(pVM); 10930 return VBOXSTRICTRC_TODO(rcStrict);10959 return rcStrict; 10931 10960 } 10932 10961 … … 11164 11193 11165 11194 STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatExitIO, y1); 11166 return VBOXSTRICTRC_TODO(rcStrict);11195 return rcStrict; 11167 11196 } 11168 11197 … … 11242 11271 11243 11272 /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ 11244 int rc = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 11245 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 11246 { 11247 if (rc == VINF_HM_DOUBLE_FAULT) 11248 rc = VINF_SUCCESS; 11249 return rc; 11273 VBOXSTRICTRC rcStrict1 = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 11274 if (RT_LIKELY(rcStrict1 == VINF_SUCCESS)) 11275 { /* likely */ } 11276 else 11277 { 11278 if (rcStrict1 == VINF_HM_DOUBLE_FAULT) 11279 rcStrict1 = VINF_SUCCESS; 11280 return rcStrict1; 11250 11281 } 11251 11282 … … 11253 11284 /** @todo Investigate if IOMMMIOPhysHandler() requires a lot of state, for now 11254 11285 * just sync the whole thing. */ 11255 rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);11286 int rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx); 11256 11287 #else 11257 11288 /* Aggressive state sync. for now. */ 11258 rc = hmR0VmxSaveGuestRipRspRflags(pVCpu, pMixedCtx);11289 int rc = hmR0VmxSaveGuestRipRspRflags(pVCpu, pMixedCtx); 11259 11290 rc |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx); 11260 11291 rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx); … … 11265 11296 /* See Intel spec. 27-6 "Exit Qualifications for APIC-access VM-exits from Linear Accesses & Guest-Phyiscal Addresses" */ 11266 11297 uint32_t uAccessType = VMX_EXIT_QUALIFICATION_APIC_ACCESS_TYPE(pVmxTransient->uExitQualification); 11298 VBOXSTRICTRC rcStrict2; 11267 11299 switch (uAccessType) 11268 11300 { … … 11281 11313 VMX_EXIT_QUALIFICATION_APIC_ACCESS_OFFSET(pVmxTransient->uExitQualification))); 11282 11314 11283 VBOXSTRICTRC rc2 = IOMMMIOPhysHandler(pVM, pVCpu, 11284 uAccessType == VMX_APIC_ACCESS_TYPE_LINEAR_READ ? 0 : X86_TRAP_PF_RW, 11285 CPUMCTX2CORE(pMixedCtx), GCPhys); 11286 rc = VBOXSTRICTRC_VAL(rc2); 11287 Log4(("ApicAccess rc=%d\n", rc)); 11288 if ( rc == VINF_SUCCESS 11289 || rc == VERR_PAGE_TABLE_NOT_PRESENT 11290 || rc == VERR_PAGE_NOT_PRESENT) 11315 rcStrict2 = IOMMMIOPhysHandler(pVM, pVCpu, 11316 uAccessType == VMX_APIC_ACCESS_TYPE_LINEAR_READ ? 0 : X86_TRAP_PF_RW, 11317 CPUMCTX2CORE(pMixedCtx), GCPhys); 11318 Log4(("ApicAccess rcStrict2=%d\n", VBOXSTRICTRC_VAL(rcStrict2))); 11319 if ( rcStrict2 == VINF_SUCCESS 11320 || rcStrict2 == VERR_PAGE_TABLE_NOT_PRESENT 11321 || rcStrict2 == VERR_PAGE_NOT_PRESENT) 11291 11322 { 11292 11323 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_RIP … … 11294 11325 | HM_CHANGED_GUEST_RFLAGS 11295 11326 | HM_CHANGED_VMX_GUEST_APIC_STATE); 11296 rc = VINF_SUCCESS;11327 rcStrict2 = VINF_SUCCESS; 11297 11328 } 11298 11329 break; … … 11301 11332 default: 11302 11333 Log4(("ApicAccess uAccessType=%#x\n", uAccessType)); 11303 rc = VINF_EM_RAW_EMULATE_INSTR;11334 rcStrict2 = VINF_EM_RAW_EMULATE_INSTR; 11304 11335 break; 11305 11336 } 11306 11337 11307 11338 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitApicAccess); 11308 if (rc != VINF_SUCCESS)11339 if (rcStrict2 != VINF_SUCCESS) 11309 11340 STAM_COUNTER_INC(&pVCpu->hm.s.StatSwitchApicAccessToR3); 11310 return rc ;11341 return rcStrict2; 11311 11342 } 11312 11343 … … 11327 11358 } 11328 11359 11329 int rc = VERR_INTERNAL_ERROR_5;11330 11360 if ( !pVCpu->hm.s.fSingleInstruction 11331 11361 && !pVmxTransient->fWasHyperDebugStateActive) … … 11336 11366 /* Don't intercept MOV DRx any more. */ 11337 11367 pVCpu->hm.s.vmx.u32ProcCtls &= ~VMX_VMCS_CTRL_PROC_EXEC_MOV_DR_EXIT; 11338 rc = VMXWriteVmcs32(VMX_VMCS32_CTRL_PROC_EXEC, pVCpu->hm.s.vmx.u32ProcCtls);11368 int rc = VMXWriteVmcs32(VMX_VMCS32_CTRL_PROC_EXEC, pVCpu->hm.s.vmx.u32ProcCtls); 11339 11369 AssertRCReturn(rc, rc); 11340 11370 … … 11366 11396 * Update the segment registers and DR7 from the CPU. 11367 11397 */ 11368 rc= hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);11369 rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);11370 rc |= hmR0VmxSaveGuestDR7(pVCpu, pMixedCtx);11398 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 11399 rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx); 11400 rc |= hmR0VmxSaveGuestDR7(pVCpu, pMixedCtx); 11371 11401 AssertRCReturn(rc, rc); 11372 11402 Log4(("CS:RIP=%04x:%08RX64\n", pMixedCtx->cs.Sel, pMixedCtx->rip)); … … 11395 11425 int rc2 = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient); 11396 11426 AssertRCReturn(rc2, rc2); 11427 return VINF_SUCCESS; 11397 11428 } 11398 11429 return rc; … … 11410 11441 11411 11442 /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ 11412 int rc = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 11413 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 11414 { 11415 if (rc == VINF_HM_DOUBLE_FAULT) 11416 rc = VINF_SUCCESS; 11417 return rc; 11443 VBOXSTRICTRC rcStrict1 = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 11444 if (RT_LIKELY(rcStrict1 == VINF_SUCCESS)) 11445 { /* likely */ } 11446 else 11447 { 11448 if (rcStrict1 == VINF_HM_DOUBLE_FAULT) 11449 rcStrict1 = VINF_SUCCESS; 11450 return rcStrict1; 11418 11451 } 11419 11452 11420 11453 RTGCPHYS GCPhys = 0; 11421 rc = VMXReadVmcs64(VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL, &GCPhys);11454 int rc = VMXReadVmcs64(VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL, &GCPhys); 11422 11455 11423 11456 #if 0 … … 11439 11472 */ 11440 11473 PVM pVM = pVCpu->CTX_SUFF(pVM); 11441 VBOXSTRICTRC rc2 = PGMR0Trap0eHandlerNPMisconfig(pVM, pVCpu, PGMMODE_EPT, CPUMCTX2CORE(pMixedCtx), GCPhys, UINT32_MAX); 11442 rc = VBOXSTRICTRC_VAL(rc2); 11443 Log4(("EPT misconfig at %#RGv RIP=%#RX64 rc=%d\n", GCPhys, pMixedCtx->rip, rc)); 11444 if ( rc == VINF_SUCCESS 11445 || rc == VERR_PAGE_TABLE_NOT_PRESENT 11446 || rc == VERR_PAGE_NOT_PRESENT) 11474 VBOXSTRICTRC rcStrict2 = PGMR0Trap0eHandlerNPMisconfig(pVM, pVCpu, PGMMODE_EPT, CPUMCTX2CORE(pMixedCtx), GCPhys, UINT32_MAX); 11475 Log4(("EPT misconfig at %#RGv RIP=%#RX64 rc=%Rrc\n", GCPhys, pMixedCtx->rip, VBOXSTRICTRC_VAL(rcStrict2))); 11476 if ( rcStrict2 == VINF_SUCCESS 11477 || rcStrict2 == VERR_PAGE_TABLE_NOT_PRESENT 11478 || rcStrict2 == VERR_PAGE_NOT_PRESENT) 11447 11479 { 11448 11480 /* Successfully handled MMIO operation. */ … … 11451 11483 | HM_CHANGED_GUEST_RFLAGS 11452 11484 | HM_CHANGED_VMX_GUEST_APIC_STATE); 11453 r c =VINF_SUCCESS;11454 } 11455 return rc ;11485 return VINF_SUCCESS; 11486 } 11487 return rcStrict2; 11456 11488 } 11457 11489 … … 11467 11499 11468 11500 /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ 11469 int rc = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 11470 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 11471 { 11472 if (rc == VINF_HM_DOUBLE_FAULT) 11473 rc = VINF_SUCCESS; 11474 return rc; 11501 VBOXSTRICTRC rcStrict1 = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 11502 if (RT_LIKELY(rcStrict1 == VINF_SUCCESS)) 11503 { /* likely */ } 11504 else 11505 { 11506 if (rcStrict1 == VINF_HM_DOUBLE_FAULT) 11507 rcStrict1 = VINF_SUCCESS; 11508 return rcStrict1; 11475 11509 } 11476 11510 11477 11511 RTGCPHYS GCPhys = 0; 11478 rc = VMXReadVmcs64(VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL, &GCPhys);11512 int rc = VMXReadVmcs64(VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL, &GCPhys); 11479 11513 rc |= hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 11480 11514 #if 0 … … 11506 11540 /* Handle the pagefault trap for the nested shadow table. */ 11507 11541 PVM pVM = pVCpu->CTX_SUFF(pVM); 11508 rc= PGMR0Trap0eHandlerNestedPaging(pVM, pVCpu, PGMMODE_EPT, uErrorCode, CPUMCTX2CORE(pMixedCtx), GCPhys);11542 VBOXSTRICTRC rcStrict2 = PGMR0Trap0eHandlerNestedPaging(pVM, pVCpu, PGMMODE_EPT, uErrorCode, CPUMCTX2CORE(pMixedCtx), GCPhys); 11509 11543 TRPMResetTrap(pVCpu); 11510 11544 11511 11545 /* Same case as PGMR0Trap0eHandlerNPMisconfig(). See comment above, @bugref{6043}. */ 11512 if ( rc == VINF_SUCCESS11513 || rc == VERR_PAGE_TABLE_NOT_PRESENT11514 || rc == VERR_PAGE_NOT_PRESENT)11546 if ( rcStrict2 == VINF_SUCCESS 11547 || rcStrict2 == VERR_PAGE_TABLE_NOT_PRESENT 11548 || rcStrict2 == VERR_PAGE_NOT_PRESENT) 11515 11549 { 11516 11550 /* Successfully synced our nested page tables. */ … … 11522 11556 } 11523 11557 11524 Log4(("EPT return to ring-3 rc =%Rrc\n", rc));11525 return rc ;11558 Log4(("EPT return to ring-3 rcStrict2=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2))); 11559 return rcStrict2; 11526 11560 } 11527 11561
Note:
See TracChangeset
for help on using the changeset viewer.