Changeset 59322 in vbox
- Timestamp:
- Jan 13, 2016 2:32:34 PM (9 years ago)
- svn:sync-xref-src-repo-rev:
- 104991
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevIchHda.cpp
r59283 r59322 572 572 typedef struct HDASTREAMSTATE 573 573 { 574 /** Number of BDLEs (Buffer Descriptor List Entry).575 * Should be SDnLVI + 1 usually. */576 uint16_t cBDLE;577 574 /** Current BDLE to use. Wraps around to 0 if 578 575 * maximum (cBDLE) is reached. */ … … 590 587 /** Event signalling that the stream's state has been changed. */ 591 588 RTSEMEVENT hStateChangedEvent; 592 /** Array of BDLEs. */593 R3PTRTYPE(PHDABDLE) paBDLE;589 /** Current BDLE (Buffer Descriptor List Entry). */ 590 HDABDLE BDLE; 594 591 } HDASTREAMSTATE, *PHDASTREAMSTATE; 595 592 … … 806 803 * {IOB}SDn read/write functions. 807 804 */ 808 static int hdaRegWriteSDCBL(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 809 static int hdaRegWriteSDCTL(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 810 static int hdaRegWriteSDSTS(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 811 static int hdaRegWriteSDLVI(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 812 static int hdaRegWriteSDFIFOW(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 813 static int hdaRegWriteSDFIFOS(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 814 static int hdaRegWriteSDFMT(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 815 static int hdaRegWriteSDBDPL(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 816 static int hdaRegWriteSDBDPU(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 805 static int hdaRegWriteSDCBL(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 806 static int hdaRegWriteSDCTL(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 807 static int hdaRegWriteSDSTS(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 808 static int hdaRegWriteSDLVI(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 809 static int hdaRegWriteSDFIFOW(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 810 static int hdaRegWriteSDFIFOS(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 811 static int hdaRegWriteSDFMT(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 812 static int hdaRegWriteSDBDPL(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 813 static int hdaRegWriteSDBDPU(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 814 inline bool hdaRegWriteSDIsAllowed(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value); 817 815 818 816 /* … … 829 827 830 828 #ifdef IN_RING3 831 static int hdaStreamInit(PHDASTATE pThis, PHDASTREAM pStrmSt, uint8_t u8Strm);832 829 static void hdaStreamDestroy(PHDASTREAM pStrmSt); 833 830 static int hdaStreamStart(PHDASTREAM pStrmSt); … … 841 838 static void hdaStreamUpdateLPIB(PHDASTATE pThis, PHDASTREAM pStrmSt, uint32_t u32LPIB); 842 839 # ifdef LOG_ENABLED 843 static void hdaBDLEDumpAll(PHDASTATE pThis, uint64_t u64BaseDMA, uint16_t u16LVI);840 static void hdaBDLEDumpAll(PHDASTATE pThis, uint64_t u64BaseDMA, uint16_t cBDLE); 844 841 # endif 845 static void hdaBDLEReset(PHDABDLE pBDLE);846 842 #endif 847 843 … … 988 984 989 985 #ifdef IN_RING3 990 /** HDABDLESTATE field descriptors for the v5+ saved state. */ 991 static SSMFIELD const g_aSSMBDLEStateFields5[] = 986 /** HDABDLE field descriptors for the v6+ saved state. */ 987 static SSMFIELD const g_aSSMBDLEFields6[] = 988 { 989 SSMFIELD_ENTRY(HDABDLE, u64BufAdr), 990 SSMFIELD_ENTRY(HDABDLE, u32BufSize), 991 SSMFIELD_ENTRY(HDABDLE, fIntOnCompletion), 992 SSMFIELD_ENTRY_TERM() 993 }; 994 995 /** HDABDLESTATE field descriptors for the v6+ saved state. */ 996 static SSMFIELD const g_aSSMBDLEStateFields6[] = 992 997 { 993 998 SSMFIELD_ENTRY(HDABDLESTATE, u32BDLIndex), … … 998 1003 }; 999 1004 1000 /** HDASTREAMSTATE field descriptors for the v5+ saved state. */ 1001 static SSMFIELD const g_aSSMStreamStateFields5[] = 1002 { 1003 SSMFIELD_ENTRY (HDASTREAMSTATE, cBDLE), 1004 SSMFIELD_ENTRY (HDASTREAMSTATE, uCurBDLE), 1005 SSMFIELD_ENTRY_IGNORE(HDASTREAMSTATE, paBDLE), 1005 /** HDASTREAMSTATE field descriptors for the v6+ saved state. */ 1006 static SSMFIELD const g_aSSMStreamStateFields6[] = 1007 { 1008 SSMFIELD_ENTRY_OLD(cBDLE, 2), 1009 SSMFIELD_ENTRY(HDASTREAMSTATE, uCurBDLE), 1010 SSMFIELD_ENTRY(HDASTREAMSTATE, fDoStop), 1011 SSMFIELD_ENTRY(HDASTREAMSTATE, fActive), 1012 SSMFIELD_ENTRY(HDASTREAMSTATE, fInReset), 1006 1013 SSMFIELD_ENTRY_TERM() 1007 1014 }; … … 1034 1041 { 1035 1042 int rc2 = PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), 1036 (pThis->u64DPBase & DPBASE_ADDR_MASK) + (pStrmSt->u8Strm * 8),1043 (pThis->u64DPBase & DPBASE_ADDR_MASK) + (pStrmSt->u8Strm * 2 * sizeof(uint32_t)), 1037 1044 (void *)&u32LPIB, sizeof(uint32_t)); 1038 1045 AssertRC(rc2); 1046 #ifdef DEBUG 1047 hdaBDLEDumpAll(pThis, pStrmSt->u64BaseDMA, pStrmSt->State.uCurBDLE); 1048 #endif 1039 1049 } 1040 1050 } … … 1096 1106 #ifdef IN_RING3 1097 1107 /** 1098 * Returns the current BDLE to use for a stream.1108 * Fetches the next BDLE to use for a stream. 1099 1109 * 1100 * @return BDLE to use, NULL if none found. 1101 */ 1102 DECLINLINE(PHDABDLE) hdaStreamGetCurrentBDLE(PHDASTATE pThis, PHDASTREAM pStrmSt) 1103 { 1104 AssertPtrReturn(pThis, NULL); 1105 AssertPtrReturn(pStrmSt, NULL); 1106 1107 Assert(pStrmSt->State.paBDLE); 1108 Assert(pStrmSt->State.uCurBDLE < pStrmSt->State.cBDLE); 1109 1110 PHDABDLE pBDLE = &pStrmSt->State.paBDLE[pStrmSt->State.uCurBDLE]; 1111 return pBDLE; 1112 } 1113 1114 /** 1115 * Returns the next BDLE to use for a stream. 1116 * 1117 * @return BDLE to use next, NULL if none found. 1118 */ 1119 DECLINLINE(PHDABDLE) hdaStreamGetNextBDLE(PHDASTATE pThis, PHDASTREAM pStrmSt) 1120 { 1121 AssertPtrReturn(pThis, NULL); 1122 AssertPtrReturn(pStrmSt, NULL); 1110 * @return IPRT status code. 1111 */ 1112 DECLINLINE(int) hdaStreamGetNextBDLE(PHDASTATE pThis, PHDASTREAM pStrmSt) 1113 { 1114 AssertPtrReturn(pThis, VERR_INVALID_POINTER); 1115 AssertPtrReturn(pStrmSt, VERR_INVALID_POINTER); 1123 1116 1124 1117 NOREF(pThis); 1125 1118 1126 Assert(pStrmSt->State.paBDLE); 1127 Assert(pStrmSt->State.uCurBDLE < pStrmSt->State.cBDLE); 1119 Assert(pStrmSt->State.uCurBDLE < pStrmSt->u16LVI + 1); 1128 1120 1129 1121 #ifdef DEBUG … … 1136 1128 */ 1137 1129 pStrmSt->State.uCurBDLE++; 1138 if (pStrmSt->State.uCurBDLE == pStrmSt-> State.cBDLE)1130 if (pStrmSt->State.uCurBDLE == pStrmSt->u16LVI + 1) 1139 1131 { 1140 1132 pStrmSt->State.uCurBDLE = 0; … … 1143 1135 } 1144 1136 1145 Assert(pStrmSt->State.uCurBDLE < pStrmSt->State.cBDLE); 1146 1147 PHDABDLE pBDLE = &pStrmSt->State.paBDLE[pStrmSt->State.uCurBDLE]; 1148 AssertPtr(pBDLE); 1149 1150 hdaBDLEReset(pBDLE); 1137 Assert(pStrmSt->State.uCurBDLE < pStrmSt->u16LVI + 1); 1138 1139 int rc = hdaBDLEFetch(pThis, &pStrmSt->State.BDLE, pStrmSt->u64BaseDMA, pStrmSt->State.uCurBDLE); 1151 1140 1152 1141 #ifdef DEBUG 1153 LogFlowFunc(("[SD%RU8]: uOldBDLE=%RU16, uCurBDLE=%RU16, cBDLE=%RU32, %R[bdle]\n",1154 pStrmSt->u8Strm, uOldBDLE, pStrmSt->State.uCurBDLE, pStrmSt-> State.cBDLE, pBDLE));1155 #endif 1156 return pBDLE;1142 LogFlowFunc(("[SD%RU8]: uOldBDLE=%RU16, uCurBDLE=%RU16, LVI=%RU32, %R[bdle]\n", 1143 pStrmSt->u8Strm, uOldBDLE, pStrmSt->State.uCurBDLE, pStrmSt->u16LVI, &pStrmSt->State.BDLE)); 1144 #endif 1145 return rc; 1157 1146 } 1158 1147 #endif … … 1454 1443 AssertRC(rc); 1455 1444 1445 pStrmSt->u8Strm = UINT8_MAX; 1446 1456 1447 pStrmSt->State.fActive = false; 1457 1448 pStrmSt->State.fInReset = false; … … 1462 1453 } 1463 1454 1455 static void hdaStreamDestroy(PHDASTREAM pStrmSt) 1456 { 1457 AssertPtrReturnVoid(pStrmSt); 1458 1459 LogFlowFunc(("[SD%RU8]: Destroy\n", pStrmSt->u8Strm)); 1460 1461 int rc2 = hdaStreamStop(pStrmSt); 1462 AssertRC(rc2); 1463 1464 if (pStrmSt->State.hStateChangedEvent != NIL_RTSEMEVENT) 1465 { 1466 rc2 = RTSemEventDestroy(pStrmSt->State.hStateChangedEvent); 1467 AssertRC(rc2); 1468 } 1469 1470 LogFlowFuncLeave(); 1471 } 1472 1464 1473 static int hdaStreamInit(PHDASTATE pThis, PHDASTREAM pStrmSt, uint8_t u8Strm) 1465 1474 { … … 1468 1477 1469 1478 pStrmSt->u8Strm = u8Strm; 1470 pStrmSt->u64BaseDMA = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, u8Strm), 1479 pStrmSt->u64BaseDMA = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, pStrmSt->u8Strm), 1480 HDA_STREAM_REG(pThis, BDPU, pStrmSt->u8Strm)); 1481 pStrmSt->u16LVI = HDA_STREAM_REG(pThis, LVI, pStrmSt->u8Strm); 1482 pStrmSt->u32CBL = HDA_STREAM_REG(pThis, CBL, pStrmSt->u8Strm); 1483 pStrmSt->u16FIFOS = hdaSDFIFOSToBytes(HDA_STREAM_REG(pThis, FIFOS, pStrmSt->u8Strm)); 1484 1485 RT_ZERO(pStrmSt->State.BDLE); 1486 pStrmSt->State.uCurBDLE = 0; 1487 1488 LogFlowFunc(("[SD%RU8]: DMA @ 0x%x (%RU32 bytes), LVI=%RU16, FIFOS=%RU16\n", 1489 pStrmSt->u8Strm, pStrmSt->u64BaseDMA, pStrmSt->u32CBL, pStrmSt->u16LVI, pStrmSt->u16FIFOS)); 1490 1491 #ifdef DEBUG 1492 uint64_t u64BaseDMA = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, u8Strm), 1471 1493 HDA_STREAM_REG(pThis, BDPU, u8Strm)); 1472 pStrmSt->u16LVI = HDA_STREAM_REG(pThis, LVI, u8Strm); 1473 pStrmSt->u32CBL = HDA_STREAM_REG(pThis, CBL, u8Strm); 1474 pStrmSt->u16FIFOS = hdaSDFIFOSToBytes(HDA_STREAM_REG(pThis, FIFOS, u8Strm)); 1475 1476 int rc = VINF_SUCCESS; 1477 1478 if (pStrmSt->State.paBDLE) 1479 { 1480 Assert(pStrmSt->State.cBDLE); 1481 RTMemFree(pStrmSt->State.paBDLE); 1482 pStrmSt->State.paBDLE = NULL; 1483 } 1484 1485 pStrmSt->State.cBDLE = 0; 1486 1487 if (/* Is there a base DMA address set? */ 1488 pStrmSt->u64BaseDMA 1489 /* Any BDLEs to fetch? */ 1490 && pStrmSt->u16LVI) 1491 { 1492 uint32_t cbBDLE = 0; 1493 1494 pStrmSt->State.cBDLE = pStrmSt->u16LVI + 1; /* See 18.2.37: If LVI is n, then there are n + 1 entries. */ 1495 pStrmSt->State.paBDLE = (PHDABDLE)RTMemAllocZ(sizeof(HDABDLE) * pStrmSt->State.cBDLE); 1496 if (pStrmSt->State.paBDLE) 1497 { 1498 for (uint16_t i = 0; i < pStrmSt->State.cBDLE; i++) 1499 { 1500 rc = hdaBDLEFetch(pThis, &pStrmSt->State.paBDLE[i], pStrmSt->u64BaseDMA, i); 1501 if (RT_FAILURE(rc)) 1502 break; 1503 1504 cbBDLE += pStrmSt->State.paBDLE[i].u32BufSize; 1505 } 1506 1507 #ifdef DEBUG 1508 hdaBDLEDumpAll(pThis, pStrmSt->u64BaseDMA, pStrmSt->State.cBDLE); 1509 #endif 1510 if (RT_SUCCESS(rc)) 1511 { 1512 if (pStrmSt->u32CBL != cbBDLE) 1513 { 1514 AssertMsgFailed(("CBL (%RU32) does not match BDL entries (%RU32)\n", pStrmSt->u32CBL, cbBDLE)); 1515 LogRel(("HDA: Warning: CBL (%RU32) does not match BDL entries (%RU32); expect sound hickups\n", 1516 pStrmSt->u32CBL, cbBDLE)); 1517 } 1518 1519 HDA_STREAM_REG(pThis, STS, pStrmSt->u8Strm) |= HDA_REG_FIELD_FLAG_MASK(SDSTS, BCIS); 1520 } 1521 } 1522 else 1523 rc = VERR_NO_MEMORY; 1524 } 1525 1526 LogFunc(("[SD%RU8]: DMA=0x%x, LVI=%RU16, CBL=%RU32, FIFOS=%RU16\n", 1527 u8Strm, pStrmSt->u64BaseDMA, pStrmSt->u16LVI, pStrmSt->u32CBL, pStrmSt->u16FIFOS)); 1528 1529 return rc; 1530 } 1531 1532 static void hdaStreamDestroy(PHDASTREAM pStrmSt) 1533 { 1534 AssertPtrReturnVoid(pStrmSt); 1535 1536 LogFlowFuncEnter(); 1537 1538 int rc2 = hdaStreamStop(pStrmSt); 1539 AssertRC(rc2); 1540 1541 if (pStrmSt->State.hStateChangedEvent != NIL_RTSEMEVENT) 1542 { 1543 rc2 = RTSemEventDestroy(pStrmSt->State.hStateChangedEvent); 1544 AssertRC(rc2); 1545 } 1546 1547 /* 1548 * Destroy. 1549 */ 1550 if (pStrmSt->State.paBDLE) 1551 { 1552 Assert(pStrmSt->State.cBDLE); 1553 RTMemFree(pStrmSt->State.paBDLE); 1554 pStrmSt->State.paBDLE = NULL; 1555 } 1556 1557 pStrmSt->State.cBDLE = 0; 1558 1559 LogFlowFuncLeave(); 1494 uint16_t u16LVI = HDA_STREAM_REG(pThis, LVI, u8Strm); 1495 uint32_t u32CBL = HDA_STREAM_REG(pThis, CBL, u8Strm); 1496 1497 LogFlowFunc(("\t-> DMA @ 0x%x, LVI=%RU16, CBL=%RU32\n", u64BaseDMA, u16LVI, u32CBL)); 1498 1499 hdaBDLEDumpAll(pThis, u64BaseDMA, u16LVI + 1); 1500 #endif 1501 1502 return VINF_SUCCESS; 1560 1503 } 1561 1504 … … 1580 1523 * First, reset the internal stream state. 1581 1524 */ 1582 pStrmSt->u8Strm = u8Strm; 1583 pStrmSt->u64BaseDMA = 0; 1584 pStrmSt->u32CBL = 0; 1585 pStrmSt->u16FMT = 0; 1586 pStrmSt->u16FIFOS = 0; 1587 pStrmSt->u16LVI = 0; 1525 RT_BZERO(pStrmSt, sizeof(HDASTREAM)); 1588 1526 1589 1527 /* … … 1605 1543 HDA_STREAM_REG(pThis, BDPL, u8Strm) = 0; 1606 1544 1545 /* 1546 * Third, set the internal state according to the just set registers. 1547 */ 1548 pStrmSt->u8Strm = u8Strm; 1549 pStrmSt->u16FIFOS = HDA_STREAM_REG(pThis, FIFOS, u8Strm); 1550 1551 1607 1552 /* Report that we're done resetting this stream. */ 1608 1553 HDA_STREAM_REG(pThis, CTL, u8Strm) = 0; … … 1980 1925 if (fInRun != fRun) 1981 1926 { 1982 if (fRun)1983 {1984 int rc2 = hdaStreamInit(pThis, pStrmSt, u8Strm);1985 AssertRC(rc2);1986 }1987 1988 1927 Assert(!fReset && !fInReset); 1989 1928 LogFunc(("[SD%RU8]: fRun=%RTbool\n", u8Strm, fRun)); … … 2020 1959 } 2021 1960 } 1961 1962 if (!fInRun && !fRun) 1963 hdaStreamInit(pThis, pStrmSt, u8Strm); 1964 2022 1965 #else /* !IN_RING3 */ 2023 1966 return VINF_IOM_R3_MMIO_WRITE; … … 2039 1982 static int hdaRegWriteSDLVI(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value) 2040 1983 { 2041 /* Only can be modified if RUN bit is 0. */ 2042 bool fIsRunning = RT_BOOL(HDA_REG_IND(pThis, iReg) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN)); 2043 if (fIsRunning) 2044 { 2045 AssertMsgFailed(("Cannot write to register when RUN bit is set\n")); 1984 if (!hdaRegWriteSDIsAllowed(pThis, iReg, u32Value)) 2046 1985 return VINF_SUCCESS; 2047 }2048 1986 2049 1987 int rc = hdaRegWriteU32(pThis, iReg, u32Value); … … 2259 2197 static int hdaRegWriteSDBDPL(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value) 2260 2198 { 2199 if (!hdaRegWriteSDIsAllowed(pThis, iReg, u32Value)) 2200 return VINF_SUCCESS; 2201 2202 LogFlowFunc(("[SD%RU8]: DMA BDPL -> 0x%x\n", HDA_SD_NUM_FROM_REG(pThis, CTL, iReg), u32Value)); 2203 2261 2204 int rc = hdaRegWriteU32(pThis, iReg, u32Value); 2262 2205 if (RT_FAILURE(rc)) … … 2267 2210 static int hdaRegWriteSDBDPU(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value) 2268 2211 { 2212 if (!hdaRegWriteSDIsAllowed(pThis, iReg, u32Value)) 2213 return VINF_SUCCESS; 2214 2215 LogFlowFunc(("[SD%RU8]: DMA BDPU -> 0x%x\n", HDA_SD_NUM_FROM_REG(pThis, CTL, iReg), u32Value)); 2216 2269 2217 int rc = hdaRegWriteU32(pThis, iReg, u32Value); 2270 2218 if (RT_FAILURE(rc)) 2271 2219 AssertRCReturn(rc, VINF_SUCCESS); 2272 2220 return rc; 2221 } 2222 2223 /** 2224 * Checks whether a write to a specific SDnXXX register is allowed or not. 2225 * 2226 * @return bool Returns @true if write is allowed, @false if not. 2227 * @param pThis Pointer to HDA state. 2228 * @param iReg Register to write. 2229 * @param u32Value Value to write. 2230 */ 2231 inline bool hdaRegWriteSDIsAllowed(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value) 2232 { 2233 /* Check if the SD's RUN bit is set. */ 2234 bool fIsRunning = RT_BOOL(HDA_REG_IND(pThis, iReg) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN)); 2235 if (fIsRunning) 2236 { 2237 #ifdef VBOX_STRICT 2238 AssertMsgFailed(("[SD%RU8]: Cannot write to register 0x%x (0x%x) when RUN bit is set\n", 2239 HDA_SD_NUM_FROM_REG(pThis, CTL, iReg), iReg, u32Value)); 2240 #endif 2241 return false; 2242 } 2243 2244 return true; 2273 2245 } 2274 2246 … … 2380 2352 2381 2353 /* Also make sure to handle the DMA position enable bit. */ 2382 bool fEnabled = pThis->au32Regs[iRegMem] & RT_BIT_32(0); 2383 if (pThis->fDMAPosition != fEnabled) 2384 { 2385 LogRel(("HDA: %s DMA position buffer\n", fEnabled ? "Enabled" : "Disabled")); 2386 pThis->fDMAPosition = fEnabled; 2387 } 2354 pThis->fDMAPosition = pThis->au32Regs[iRegMem] & RT_BIT_32(0); 2355 LogRel(("HDA: %s DMA position buffer\n", pThis->fDMAPosition ? "Enabled" : "Disabled")); 2388 2356 break; 2389 2357 } … … 2414 2382 static void hdaBDLEDumpAll(PHDASTATE pThis, uint64_t u64BaseDMA, uint16_t cBDLE) 2415 2383 { 2384 LogFlowFunc(("BDLEs @ 0x%x (%RU16):\n", u64BaseDMA, cBDLE)); 2385 if (!u64BaseDMA) 2386 return; 2387 2416 2388 uint32_t cbBDLE = 0; 2417 2418 2389 for (uint16_t i = 0; i < cBDLE; i++) 2419 2390 { … … 2425 2396 uint32_t ioc = *(uint32_t *)&bdle[12]; 2426 2397 2427 LogFlowFunc((" #%03d BDLE(adr:0x%llx, size:%RU32, ioc:%RTbool)\n",2398 LogFlowFunc(("\t#%03d BDLE(adr:0x%llx, size:%RU32, ioc:%RTbool)\n", 2428 2399 i, addr, len, RT_BOOL(ioc & 0x1))); 2429 2400 … … 2436 2407 return; 2437 2408 2409 LogFlowFunc(("DMA counters:\n", cbBDLE)); 2410 2438 2411 for (int i = 0; i < 8; i++) /** @todo Use a define for MAX_STREAMS! */ 2439 2412 { 2440 2413 uint32_t uDMACnt; 2441 PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), (pThis->u64DPBase & DPBASE_ADDR_MASK) + i * 8, /** @todo Use a define. */2414 PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), (pThis->u64DPBase & DPBASE_ADDR_MASK) + (i * 2 * sizeof(uint32_t)), 2442 2415 &uDMACnt, sizeof(&uDMACnt)); 2443 2416 2444 LogFlowFunc(("%s #%02d STREAM(0x%x)\n", 2445 i == HDA_SDCTL_NUM(pThis, 4) || i == HDA_SDCTL_NUM(pThis, 0) ? "*" : " ", i , uDMACnt)); 2417 LogFlowFunc(("\t#%03d DMA @ 0x%x\n", i , uDMACnt)); 2446 2418 } 2447 2419 } … … 2469 2441 return rc; 2470 2442 2443 RT_BZERO(pBDLE, sizeof(HDABDLE)); 2444 2471 2445 pBDLE->State.u32BDLIndex = u16Entry; 2472 2446 pBDLE->u64BufAdr = *(uint64_t *) uBundleEntry; … … 2480 2454 } 2481 2455 2482 static void hdaBDLEReset(PHDABDLE pBDLE)2483 {2484 AssertPtrReturnVoid(pBDLE);2485 2486 pBDLE->State.u32BufOff = 0;2487 pBDLE->State.cbBelowFIFOW = 0;2488 }2489 2490 2456 /** 2491 2457 * Returns the number of outstanding stream data bytes which need to be processed … … 2502 2468 return 0; 2503 2469 2504 PHDABDLE pBDLE = hdaStreamGetCurrentBDLE(pThis, pStrmSt);2470 PHDABDLE pBDLE = &pStrmSt->State.BDLE; 2505 2471 2506 2472 uint32_t cbFree = pStrmSt->u32CBL - HDA_STREAM_REG(pThis, LPIB, pStrmSt->u8Strm); … … 2573 2539 AssertPtrReturn(pStrmSt, false); 2574 2540 2575 PHDABDLE pBDLE = hdaStreamGetCurrentBDLE(pThis, pStrmSt);2541 PHDABDLE pBDLE = &pStrmSt->State.BDLE; 2576 2542 uint32_t u32LPIB = HDA_STREAM_REG(pThis, LPIB, pStrmSt->u8Strm); 2577 2543 … … 2582 2548 * the CBL limit or our internal DMA buffer is full. */ 2583 2549 bool fNeedsNextBDLE = ( fCBLLimitReached 2584 || ( pBDLE->State.u32BufOff 2585 && pBDLE->State.u32BufOff >= pBDLE->u32BufSize) 2586 ); 2550 || (pBDLE->State.u32BufOff >= pBDLE->u32BufSize)); 2587 2551 2588 2552 Assert(u32LPIB <= pStrmSt->u32CBL); … … 2599 2563 } 2600 2564 2601 if (fNeedsNextBDLE)2602 {2603 /* Reset current BDLE. */2604 hdaBDLEReset(pBDLE);2605 }2606 2607 2565 return fNeedsNextBDLE; 2608 2566 } … … 2617 2575 Assert(cbInc <= pStrmSt->u16FIFOS); 2618 2576 2619 PHDABDLE pBDLE = hdaStreamGetCurrentBDLE(pThis, pStrmSt);2577 PHDABDLE pBDLE = &pStrmSt->State.BDLE; 2620 2578 2621 2579 /* … … 2645 2603 bool fIsComplete = false; 2646 2604 2647 PHDABDLE pBDLE = hdaStreamGetCurrentBDLE(pThis, pStrmSt);2605 PHDABDLE pBDLE = &pStrmSt->State.BDLE; 2648 2606 const uint32_t u32LPIB = HDA_STREAM_REG(pThis, LPIB, pStrmSt->u8Strm); 2649 2607 … … 2701 2659 /* pcbRead is optional. */ 2702 2660 2703 PHDABDLE pBDLE = hdaStreamGetCurrentBDLE(pThis, pStrmSt);2661 PHDABDLE pBDLE = &pStrmSt->State.BDLE; 2704 2662 2705 2663 int rc; … … 2768 2726 /* pcbWritten is optional. */ 2769 2727 2770 PHDABDLE pBDLE = hdaStreamGetCurrentBDLE(pThis, pStrmSt); 2771 int rc; 2728 PHDABDLE pBDLE = &pStrmSt->State.BDLE; 2772 2729 2773 2730 uint32_t cbWritten = 0; … … 2780 2737 * previous unreported transfer we write at offset 'pBDLE->State.cbUnderFifoW'). 2781 2738 */ 2739 int rc; 2782 2740 if (!cbData) 2783 2741 { … … 3151 3109 /* pcbProcessed is optional. */ 3152 3110 3153 LogFlowFunc(("enmSrc=%RU32, cbToProcess=%RU32\n", enmSrc, cbToProcess));3154 3155 3111 if (ASMAtomicReadBool(&pThis->fInReset)) /* HDA controller in reset mode? Bail out. */ 3156 3112 { … … 3206 3162 /* Is the stream not in a running state currently? */ 3207 3163 else if (!(HDA_STREAM_REG(pThis, CTL, pStrmSt->u8Strm) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN))) 3208 fProceed = false;3209 /* There must be BDLEs defined in order to have a working stream. */3210 else if (pStrmSt->State.cBDLE == 0)3211 3164 fProceed = false; 3212 3165 /* Nothing to process? */ … … 3221 3174 } 3222 3175 3176 LogFlowFunc(("enmSrc=%RU32, cbToProcess=%RU32\n", enmSrc, cbToProcess)); 3177 3223 3178 /* Sanity checks. */ 3224 3179 Assert(pStrmSt->u8Strm <= 7); /** @todo Use a define for MAX_STREAMS! */ … … 3227 3182 3228 3183 /* State sanity checks. */ 3229 AssertPtr(pStrmSt->State.paBDLE);3230 3184 Assert(ASMAtomicReadBool(&pStrmSt->State.fInReset) == false); 3231 3185 … … 3395 3349 { 3396 3350 if (pThis->fInReset && idxRegDsc != HDA_REG_GCTL) 3397 LogFunc(("access to registers except GCTL is blocked while reset\n")); /** @todo where is this enforced? */ 3351 { 3352 LogRel2(("HDA: Access to register 0x%x is blocked while reset\n", idxRegDsc)); 3353 return VINF_SUCCESS; 3354 } 3398 3355 3399 3356 uint32_t idxRegMem = g_aHdaRegMap[idxRegDsc].mem_idx; … … 3413 3370 PDMBOTHCBDECL(int) hdaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 3414 3371 { 3415 PHDASTATE 3416 int 3372 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 3373 int rc; 3417 3374 3418 3375 /* … … 3594 3551 static int hdaSaveStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PHDASTREAM pStrm) 3595 3552 { 3553 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 3554 3555 LogFlowFunc(("[SD%RU8]\n", pStrm->u8Strm)); 3556 3596 3557 /* Save stream ID. */ 3597 3558 int rc = SSMR3PutU8(pSSM, pStrm->u8Strm); … … 3599 3560 Assert(pStrm->u8Strm <= 7); /** @todo Use a define. */ 3600 3561 3601 rc = SSMR3PutStructEx(pSSM, &pStrm->State, sizeof(HDASTREAMSTATE), 0 /*fFlags*/, g_aSSMStreamStateFields 5, NULL);3562 rc = SSMR3PutStructEx(pSSM, &pStrm->State, sizeof(HDASTREAMSTATE), 0 /*fFlags*/, g_aSSMStreamStateFields6, NULL); 3602 3563 AssertRCReturn(rc, rc); 3603 3564 3604 for (uint32_t i = 0; i < pStrm->State.cBDLE; i++) 3605 { 3606 rc = SSMR3PutStructEx(pSSM, &pStrm->State.paBDLE[i].State, sizeof(HDABDLESTATE), 3607 0 /*fFlags*/, g_aSSMBDLEStateFields5, NULL); 3608 AssertRCReturn(rc, rc); 3609 } 3610 3565 #ifdef DEBUG /* Sanity checks. */ 3566 uint64_t u64BaseDMA = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, pStrm->u8Strm), 3567 HDA_STREAM_REG(pThis, BDPU, pStrm->u8Strm)); 3568 uint16_t u16LVI = HDA_STREAM_REG(pThis, LVI, pStrm->u8Strm); 3569 uint32_t u32CBL = HDA_STREAM_REG(pThis, CBL, pStrm->u8Strm); 3570 3571 hdaBDLEDumpAll(pThis, u64BaseDMA, u16LVI + 1); 3572 3573 Assert(u64BaseDMA == pStrm->u64BaseDMA); 3574 Assert(u16LVI == pStrm->u16LVI); 3575 Assert(u32CBL == pStrm->u32CBL); 3576 #endif 3577 3578 rc = SSMR3PutStructEx(pSSM, &pStrm->State.BDLE, sizeof(HDABDLE), 3579 0 /*fFlags*/, g_aSSMBDLEFields6, NULL); 3580 AssertRCReturn(rc, rc); 3581 3582 rc = SSMR3PutStructEx(pSSM, &pStrm->State.BDLE.State, sizeof(HDABDLESTATE), 3583 0 /*fFlags*/, g_aSSMBDLEStateFields6, NULL); 3584 AssertRCReturn(rc, rc); 3585 3586 #ifdef DEBUG /* Sanity checks. */ 3587 PHDABDLE pBDLE = &pStrm->State.BDLE; 3588 if (u64BaseDMA) 3589 { 3590 Assert(pStrm->State.uCurBDLE <= u16LVI + 1); 3591 3592 HDABDLE curBDLE; 3593 rc = hdaBDLEFetch(pThis, &curBDLE, u64BaseDMA, pStrm->State.uCurBDLE); 3594 AssertRC(rc); 3595 3596 Assert(curBDLE.u32BufSize == pBDLE->u32BufSize); 3597 Assert(curBDLE.u64BufAdr == pBDLE->u64BufAdr); 3598 Assert(curBDLE.fIntOnCompletion == pBDLE->fIntOnCompletion); 3599 } 3600 else 3601 { 3602 Assert(pBDLE->u64BufAdr == 0); 3603 Assert(pBDLE->u32BufSize == 0); 3604 } 3605 #endif 3611 3606 return rc; 3612 3607 } … … 3728 3723 * according to the spec). 3729 3724 */ 3730 #define HDA_SSM_LOAD_BDLE_STATE_PRE_V5(v, x) \3731 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* Begin marker */ \3732 AssertRCReturn(rc, rc); \3733 rc = SSMR3 Skip(pSSM, sizeof(uint64_t));/* u64BdleCviAddr */ \3734 AssertRCReturn(rc, rc); \3735 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* u32BdleMaxCvi */ \3736 AssertRCReturn(rc, rc); \3737 rc = SSMR3GetU32(pSSM, &x ->u32BDLIndex);/* u32BdleCvi */ \3738 AssertRCReturn(rc, rc); \3739 rc = SSMR3 Skip(pSSM, sizeof(uint32_t));/* u32BdleCviLen */ \3740 AssertRCReturn(rc, rc); \3741 rc = SSMR3GetU32(pSSM, &x ->u32BufOff);/* u32BdleCviPos */ \3742 AssertRCReturn(rc, rc); \3743 rc = SSMR3 Skip(pSSM, sizeof(uint8_t));/* fBdleCviIoc */ \3744 AssertRCReturn(rc, rc); \3745 rc = SSMR3GetU32(pSSM, &x ->cbBelowFIFOW);/* cbUnderFifoW */ \3746 AssertRCReturn(rc, rc); \3747 rc = SSMR3GetMem(pSSM, &x ->au8FIFO, sizeof(x->au8FIFO));\3748 AssertRCReturn(rc, rc); \3749 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* End marker */ \3750 AssertRCReturn(rc, rc); \3725 #define HDA_SSM_LOAD_BDLE_STATE_PRE_V5(v, x) \ 3726 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* Begin marker */ \ 3727 AssertRCReturn(rc, rc); \ 3728 rc = SSMR3GetU64(pSSM, &x.u64BufAdr); /* u64BdleCviAddr */ \ 3729 AssertRCReturn(rc, rc); \ 3730 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* u32BdleMaxCvi */ \ 3731 AssertRCReturn(rc, rc); \ 3732 rc = SSMR3GetU32(pSSM, &x.State.u32BDLIndex); /* u32BdleCvi */ \ 3733 AssertRCReturn(rc, rc); \ 3734 rc = SSMR3GetU32(pSSM, &x.u32BufSize); /* u32BdleCviLen */ \ 3735 AssertRCReturn(rc, rc); \ 3736 rc = SSMR3GetU32(pSSM, &x.State.u32BufOff); /* u32BdleCviPos */ \ 3737 AssertRCReturn(rc, rc); \ 3738 rc = SSMR3GetBool(pSSM, &x.fIntOnCompletion); /* fBdleCviIoc */ \ 3739 AssertRCReturn(rc, rc); \ 3740 rc = SSMR3GetU32(pSSM, &x.State.cbBelowFIFOW); /* cbUnderFifoW */ \ 3741 AssertRCReturn(rc, rc); \ 3742 rc = SSMR3GetMem(pSSM, &x.State.au8FIFO, sizeof(x.State.au8FIFO)); \ 3743 AssertRCReturn(rc, rc); \ 3744 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* End marker */ \ 3745 AssertRCReturn(rc, rc); \ 3751 3746 3752 3747 /* 3753 3748 * Load BDLEs (Buffer Descriptor List Entries) and DMA counters. 3754 3749 */ 3755 HDABDLESTATE StateBDLEDummy;3756 3757 3750 switch (uVersion) 3758 3751 { … … 3765 3758 * The rest will be initialized from the saved registers later. */ 3766 3759 3767 /* Note: Only the *current* BDLE for a stream was saved! */ 3760 /* Note 1: Only the *current* BDLE for a stream was saved! */ 3761 /* Note 2: The stream's saving order is/was fixed, so don't touch! */ 3768 3762 3769 3763 /* Output */ … … 3771 3765 if (RT_FAILURE(rc)) 3772 3766 break; 3773 HDA_SSM_LOAD_BDLE_STATE_PRE_V5(uVersion, ( pThis->StrmStOut.State.cBDLE 3774 ? &pThis->StrmStOut.State.paBDLE[0].State : &StateBDLEDummy)); 3767 HDA_SSM_LOAD_BDLE_STATE_PRE_V5(uVersion, pThis->StrmStOut.State.BDLE); 3768 pThis->StrmStOut.State.uCurBDLE = pThis->StrmStOut.State.BDLE.State.u32BDLIndex; 3769 3775 3770 /* Microphone-In */ 3776 3771 rc = hdaStreamInit(pThis, &pThis->StrmStMicIn, 2 /* Stream number, hardcoded */); 3777 3772 if (RT_FAILURE(rc)) 3778 3773 break; 3779 HDA_SSM_LOAD_BDLE_STATE_PRE_V5(uVersion, ( pThis->StrmStMicIn.State.cBDLE 3780 ? &pThis->StrmStMicIn.State.paBDLE[0].State : &StateBDLEDummy)); 3774 HDA_SSM_LOAD_BDLE_STATE_PRE_V5(uVersion, pThis->StrmStMicIn.State.BDLE); 3775 pThis->StrmStMicIn.State.uCurBDLE = pThis->StrmStMicIn.State.BDLE.State.u32BDLIndex; 3776 3781 3777 /* Line-In */ 3782 3778 rc = hdaStreamInit(pThis, &pThis->StrmStLineIn, 0 /* Stream number, hardcoded */); 3783 3779 if (RT_FAILURE(rc)) 3784 3780 break; 3785 HDA_SSM_LOAD_BDLE_STATE_PRE_V5(uVersion, ( pThis->StrmStLineIn.State.cBDLE3786 ? &pThis->StrmStLineIn.State.paBDLE[0].State : &StateBDLEDummy));3781 HDA_SSM_LOAD_BDLE_STATE_PRE_V5(uVersion, pThis->StrmStLineIn.State.BDLE); 3782 pThis->StrmStLineIn.State.uCurBDLE = pThis->StrmStLineIn.State.BDLE.State.u32BDLIndex; 3787 3783 break; 3788 3784 } … … 3826 3822 default: 3827 3823 pStrm = &StreamDummy; 3824 3825 LogRel2(("HDA: Warning: Stream ID=%RU32 not supported, skipping to load ...\n", uStreamID)); 3828 3826 break; 3829 3827 } 3830 3828 3831 3829 RT_BZERO(pStrm, sizeof(HDASTREAM)); 3832 rc = SSMR3GetStructEx(pSSM, &pStrm->State, sizeof(HDASTREAMSTATE), 0 /* fFlags */, g_aSSMStreamStateFields5, NULL); 3833 if (RT_FAILURE(rc)) 3834 break; 3835 #ifdef DEBUG 3836 uint32_t cBDLE = pStrm->State.cBDLE; 3837 LogFlowFunc(("Stream #%RU32: ID=%RU8, cBDLE=%RU32\n", i, uStreamID, cBDLE)); 3838 #endif 3830 3839 3831 rc = hdaStreamInit(pThis, pStrm, uStreamID); 3840 3832 if (RT_FAILURE(rc)) 3841 3833 { 3842 LogRel(("HDA: Stream #%RU32: Initi tialization of stream (ID=%RU8, cBDLE=%RU32) failed, rc=%Rrc\n", i, uStreamID, pStrm->State.cBDLE, rc));3834 LogRel(("HDA: Stream #%RU32: Initialization of stream %RU8 failed, rc=%Rrc\n", i, uStreamID, rc)); 3843 3835 break; 3844 3836 } 3845 #ifdef DEBUG 3846 AssertMsg(cBDLE == pStrm->State.cBDLE, ("Loaded BDLE states (%RU32) vs. emulated ones (%RU32) don't match\n", 3847 cBDLE, pStrm->State.cBDLE)); 3848 #endif 3849 /* Load BDLE states. */ 3850 for (uint32_t a = 0; a < pStrm->State.cBDLE; a++) 3837 3838 if (uVersion == HDA_SSM_VERSION_5) 3851 3839 { 3852 if (uVersion == HDA_SSM_VERSION_5) 3840 /* Get the current BDLE entry and skip the rest. */ 3841 uint16_t cBDLE; 3842 3843 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* Begin marker */ 3844 AssertRC(rc); 3845 rc = SSMR3GetU16(pSSM, &cBDLE); /* cBDLE */ 3846 AssertRC(rc); 3847 rc = SSMR3GetU16(pSSM, &pStrm->State.uCurBDLE); /* uCurBDLE */ 3848 AssertRC(rc); 3849 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* End marker */ 3850 AssertRC(rc); 3851 3852 uint32_t u32BDLEIndex; 3853 for (uint16_t i = 0; i < cBDLE; i++) 3853 3854 { 3854 /* v5 saved the entire HDABDLE struct instead of only HDABDLESTATE, 3855 * so skip. */ 3856 rc = SSMR3Skip(pSSM, 0x120 /* sizeof(HDABLDE) in v5 */); 3855 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* Begin marker */ 3856 AssertRC(rc); 3857 rc = SSMR3GetU32(pSSM, &u32BDLEIndex); /* u32BDLIndex */ 3858 AssertRC(rc); 3859 3860 /* Does the current BDLE index match the current BDLE to process? */ 3861 if (u32BDLEIndex == pStrm->State.uCurBDLE) 3862 { 3863 rc = SSMR3GetU32(pSSM, &pStrm->State.BDLE.State.cbBelowFIFOW); /* cbBelowFIFOW */ 3864 AssertRC(rc); 3865 rc = SSMR3GetMem(pSSM, 3866 &pStrm->State.BDLE.State.au8FIFO, 3867 sizeof(uint8_t) * 256); /* au8FIFO */ 3868 AssertRC(rc); 3869 rc = SSMR3GetU32(pSSM, &pStrm->State.BDLE.State.u32BufOff); /* u32BufOff */ 3870 AssertRC(rc); 3871 rc = SSMR3Skip(pSSM, sizeof(uint32_t)); /* End marker */ 3872 AssertRC(rc); 3873 } 3874 else /* Skip not current BDLEs. */ 3875 { 3876 rc = SSMR3Skip(pSSM, sizeof(uint32_t) /* cbBelowFIFOW */ 3877 + sizeof(uint8_t) * 256 /* au8FIFO */ 3878 + sizeof(uint32_t) /* u32BufOff */ 3879 + sizeof(uint32_t)); /* End marker */ 3880 AssertRC(rc); 3881 } 3857 3882 } 3858 else 3859 { 3860 rc = SSMR3GetStructEx(pSSM, &pStrm->State.paBDLE[a].State, sizeof(HDABDLESTATE), 3861 0 /* fFlags */, g_aSSMBDLEStateFields5, NULL); 3862 } 3883 } 3884 else 3885 { 3886 rc = SSMR3GetStructEx(pSSM, &pStrm->State, sizeof(HDASTREAMSTATE), 3887 0 /* fFlags */, g_aSSMStreamStateFields6, NULL); 3888 if (RT_FAILURE(rc)) 3889 break; 3890 3891 rc = SSMR3GetStructEx(pSSM, &pStrm->State.BDLE, sizeof(HDABDLE), 3892 0 /* fFlags */, g_aSSMBDLEFields6, NULL); 3893 if (RT_FAILURE(rc)) 3894 break; 3895 3896 rc = SSMR3GetStructEx(pSSM, &pStrm->State.BDLE.State, sizeof(HDABDLESTATE), 3897 0 /* fFlags */, g_aSSMBDLEStateFields6, NULL); 3863 3898 if (RT_FAILURE(rc)) 3864 3899 break; 3865 3900 } 3866 3867 /* Destroy dummy again. */3868 if (pStrm == &StreamDummy)3869 hdaStreamDestroy(pStrm);3870 3901 } 3871 3902 break; … … 3909 3940 if (RT_SUCCESS(rc)) 3910 3941 { 3911 pThis->u64CORBBase = RT_MAKE_U64(HDA_REG(pThis, CORBLBASE), HDA_REG(pThis, CORBUBASE)); 3912 pThis->u64RIRBBase = RT_MAKE_U64(HDA_REG(pThis, RIRBLBASE), HDA_REG(pThis, RIRBUBASE)); 3913 pThis->u64DPBase = RT_MAKE_U64(HDA_REG(pThis, DPLBASE), HDA_REG(pThis, DPUBASE)); 3942 pThis->u64CORBBase = RT_MAKE_U64(HDA_REG(pThis, CORBLBASE), HDA_REG(pThis, CORBUBASE)); 3943 pThis->u64RIRBBase = RT_MAKE_U64(HDA_REG(pThis, RIRBLBASE), HDA_REG(pThis, RIRBUBASE)); 3944 pThis->u64DPBase = RT_MAKE_U64(HDA_REG(pThis, DPLBASE), HDA_REG(pThis, DPUBASE)); 3945 3946 /* Also make sure to update the DMA position bit if this was enabled when saving the state. */ 3947 pThis->fDMAPosition = RT_BOOL(HDA_REG(pThis, DPLBASE) & RT_BIT_32(0)); 3914 3948 } 3915 3949 else … … 4147 4181 LogFunc(("Resetting ...\n")); 4148 4182 4149 /*4150 * Stop any audio currently playing and/or recording.4151 */4152 PHDADRIVER pDrv;4153 RTListForEach(&pThis->lstDrv, pDrv, HDADRIVER, Node)4154 {4155 pDrv->pConnector->pfnEnableIn(pDrv->pConnector, pDrv->LineIn.pStrmIn, false /* Disable */);4156 #ifdef VBOX_WITH_HDA_MIC_IN4157 /* Ignore rc. */4158 pDrv->pConnector->pfnEnableIn(pDrv->pConnector, pDrv->MicIn.pStrmIn, false /* Disable */);4159 #endif4160 /* Ditto. */4161 pDrv->pConnector->pfnEnableOut(pDrv->pConnector, pDrv->Out.pStrmOut, false /* Disable */);4162 /* Ditto. */4163 }4164 4165 pThis->cbCorbBuf = 256 * sizeof(uint32_t); /** @todo Use a define here. */4166 4167 if (pThis->pu32CorbBuf)4168 RT_BZERO(pThis->pu32CorbBuf, pThis->cbCorbBuf);4169 else4170 pThis->pu32CorbBuf = (uint32_t *)RTMemAllocZ(pThis->cbCorbBuf);4171 4172 pThis->cbRirbBuf = 256 * sizeof(uint64_t); /** @todo Use a define here. */4173 if (pThis->pu64RirbBuf)4174 RT_BZERO(pThis->pu64RirbBuf, pThis->cbRirbBuf);4175 else4176 pThis->pu64RirbBuf = (uint64_t *)RTMemAllocZ(pThis->cbRirbBuf);4177 4178 pThis->u64BaseTS = PDMDevHlpTMTimeVirtGetNano(pDevIns);4179 4180 4183 # ifndef VBOX_WITH_AUDIO_CALLBACKS 4181 4184 /* … … 4189 4192 } 4190 4193 # endif 4194 4195 /* 4196 * Stop any audio currently playing and/or recording. 4197 */ 4198 PHDADRIVER pDrv; 4199 RTListForEach(&pThis->lstDrv, pDrv, HDADRIVER, Node) 4200 { 4201 pDrv->pConnector->pfnEnableIn(pDrv->pConnector, pDrv->LineIn.pStrmIn, false /* Disable */); 4202 # ifdef VBOX_WITH_HDA_MIC_IN 4203 /* Ignore rc. */ 4204 pDrv->pConnector->pfnEnableIn(pDrv->pConnector, pDrv->MicIn.pStrmIn, false /* Disable */); 4205 # endif 4206 /* Ditto. */ 4207 pDrv->pConnector->pfnEnableOut(pDrv->pConnector, pDrv->Out.pStrmOut, false /* Disable */); 4208 /* Ditto. */ 4209 } 4210 4211 pThis->cbCorbBuf = 256 * sizeof(uint32_t); /** @todo Use a define here. */ 4212 4213 if (pThis->pu32CorbBuf) 4214 RT_BZERO(pThis->pu32CorbBuf, pThis->cbCorbBuf); 4215 else 4216 pThis->pu32CorbBuf = (uint32_t *)RTMemAllocZ(pThis->cbCorbBuf); 4217 4218 pThis->cbRirbBuf = 256 * sizeof(uint64_t); /** @todo Use a define here. */ 4219 if (pThis->pu64RirbBuf) 4220 RT_BZERO(pThis->pu64RirbBuf, pThis->cbRirbBuf); 4221 else 4222 pThis->pu64RirbBuf = (uint64_t *)RTMemAllocZ(pThis->cbRirbBuf); 4223 4224 pThis->u64BaseTS = PDMDevHlpTMTimeVirtGetNano(pDevIns); 4191 4225 4192 4226 for (uint8_t u8Strm = 0; u8Strm < 8; u8Strm++) /** @todo Use a define here. */ … … 4220 4254 if (pThis->pTimer) 4221 4255 { 4256 LogFunc(("Restarting timer\n")); 4222 4257 rc2 = TMTimerSet(pThis->pTimer, TMTimerGet(pThis->pTimer) + pThis->cTimerTicks); 4223 4258 AssertRC(rc2);
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