Changeset 60228 in vbox
- Timestamp:
- Mar 28, 2016 6:28:22 PM (9 years ago)
- svn:sync-xref-src-repo-rev:
- 106262
- Location:
- trunk
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/iprt/asm-amd64-x86.h
r60201 r60228 3165 3165 */ 3166 3166 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN 3167 DECLASM(void) ASMInvalidatePage( void *pv);3168 #else 3169 DECLINLINE(void) ASMInvalidatePage( void *pv)3167 DECLASM(void) ASMInvalidatePage(RTCCUINTXREG uPtr); 3168 #else 3169 DECLINLINE(void) ASMInvalidatePage(RTCCUINTXREG uPtr) 3170 3170 { 3171 3171 # if RT_INLINE_ASM_USES_INTRIN 3172 __invlpg( pv);3172 __invlpg((void *)uPtr); 3173 3173 3174 3174 # elif RT_INLINE_ASM_GNU_STYLE 3175 3175 __asm__ __volatile__("invlpg %0\n\t" 3176 : : "m" (*(uint8_t *) pv));3177 # else 3178 __asm 3179 { 3180 # ifdef RT_ARCH_AMD64 3181 mov rax, [ pv]3176 : : "m" (*(uint8_t *)(uintptr_t)uPtr)); 3177 # else 3178 __asm 3179 { 3180 # ifdef RT_ARCH_AMD64 3181 mov rax, [uPtr] 3182 3182 invlpg [rax] 3183 3183 # else 3184 mov eax, [ pv]3184 mov eax, [uPtr] 3185 3185 invlpg [eax] 3186 3186 # endif -
trunk/include/iprt/asm.h
r60077 r60228 1512 1512 { 1513 1513 /** @todo use mfence? check if all cpus we care for support it. */ 1514 #if ARCH_BITS == 16 1515 uint16_t volatile u16; 1516 ASMAtomicXchgU16(&u16, 0); 1517 #else 1514 1518 uint32_t volatile u32; 1515 1519 ASMAtomicXchgU32(&u32, 0); 1520 #endif 1516 1521 } 1517 1522 -
trunk/include/iprt/asmdefs.mac
r60200 r60228 795 795 %endif 796 796 %endif 797 %else 798 %ifdef ASM_CALL64_GCC 799 %error "ASM_CALL64_GCC is defined without RT_ARCH_AMD64!" ASM_CALL64_GCC 800 %endif 801 %ifdef ASM_CALL64_MSC 802 %error "ASM_CALL64_MSC is defined without RT_ARCH_AMD64!" ASM_CALL64_MSC 803 %endif 797 804 %endif 798 805 … … 977 984 %macro AssertCompileML 1 978 985 %ifndef KBUILD_GENERATING_MAKEFILE_DEPENDENCIES 979 ;%assign AssertVar_uResult %1980 986 %if (%1) != 1 987 %assign AssertVar_uResult %1 981 988 %error %1 => AssertVar_uResult 982 989 %endif -
trunk/include/iprt/x86.h
r60087 r60228 2215 2215 2216 2216 /** 2217 * Page directory pointer table entry for 1GB page. (AMD64 only) 2218 */ 2219 typedef struct X86PDPE1GB 2220 { 2221 /** 0: Flags whether(=1) or not the page is present. */ 2222 uint32_t u1Present : 1; 2223 /** 1: Read(=0) / Write(=1) flag. */ 2224 uint32_t u1Write : 1; 2225 /** 2: User(=1) / Supervisor (=0) flag. */ 2226 uint32_t u1User : 1; 2227 /** 3: Write Thru flag. If PAT enabled, bit 0 of the index. */ 2228 uint32_t u1WriteThru : 1; 2229 /** 4: Cache disabled flag. If PAT enabled, bit 1 of the index. */ 2230 uint32_t u1CacheDisable : 1; 2231 /** 5: Accessed flag. 2232 * Indicates that the page have been read or written to. */ 2233 uint32_t u1Accessed : 1; 2234 /** 6: Dirty flag for 1GB pages. */ 2235 uint32_t u1Dirty : 1; 2236 /** 7: Indicates 1GB page if set. */ 2237 uint32_t u1Size : 1; 2238 /** 8: Global 1GB page. */ 2239 uint32_t u1Global: 1; 2240 /** 9-11: Available for use to system software. */ 2241 uint32_t u3Available : 3; 2242 /** 12: PAT bit for 1GB page. */ 2243 uint32_t u1PAT : 1; 2244 /** 13-29: MBZ bits. */ 2245 uint32_t u17Reserved : 17; 2246 /** 30-31: Physical page number - Low Part. Don't use! */ 2247 uint32_t u2PageNoLow : 2; 2248 /** 32-51: Physical Page number of the next level - High Part. Don't use! */ 2249 uint32_t u20PageNoHigh : 20; 2250 /** 52-62: MBZ bits */ 2251 uint32_t u11Reserved : 11; 2252 /** 63: No Execute flag. */ 2253 uint32_t u1NoExecute : 1; 2254 } X86PDPE1GB; 2255 #ifndef VBOX_FOR_DTRACE_LIB 2256 AssertCompileSize(X86PDPE1GB, 8); 2257 #endif 2258 /** Pointer to a page directory pointer table entry for a 1GB page. */ 2259 typedef X86PDPE1GB *PX86PDPE1GB; 2260 /** Pointer to a const page directory pointer table entry for a 1GB page. */ 2261 typedef const X86PDPE1GB *PCX86PDPE1GB; 2262 2263 /** 2217 2264 * Page directory pointer table entry. 2218 2265 */ … … 2225 2272 /** AMD64 view. */ 2226 2273 X86PDPEAMD64BITS lm; 2274 /** AMD64 big view. */ 2275 X86PDPE1GB b; 2227 2276 /** 8 bit unsigned integer view. */ 2228 2277 uint8_t au8[8]; -
trunk/src/VBox/VMM/VMMRC/CSAMRC.cpp
r58123 r60228 86 86 int rc = PGMShwMakePageWritable(pVCpu, pvFault, PGM_MK_PG_IS_WRITE_FAULT); 87 87 AssertMsgRC(rc, ("PGMShwModifyPage -> rc=%Rrc\n", rc)); 88 ASMInvalidatePage(( void *)(uintptr_t)pvFault);88 ASMInvalidatePage((uintptr_t)pvFault); 89 89 return VINF_SUCCESS; 90 90 } … … 128 128 int rc = PGMShwMakePageWritable(pVCpu, pvFault, PGM_MK_PG_IS_WRITE_FAULT); 129 129 AssertMsgRC(rc, ("PGMShwModifyPage -> rc=%Rrc\n", rc)); 130 ASMInvalidatePage(( void *)(uintptr_t)pvFault);130 ASMInvalidatePage((uintptr_t)pvFault); 131 131 132 132 STAM_COUNTER_INC(&pVM->csam.s.StatCodePageModified); -
trunk/src/VBox/VMM/VMMRZ/PGMRZDynMap.cpp
r58123 r60228 615 615 uint32_t iPage = pThis->cPages; 616 616 while (iPage-- > 0) 617 ASMInvalidatePage( paPages[iPage].pvPage);617 ASMInvalidatePage((uintptr_t)paPages[iPage].pvPage); 618 618 } 619 619 … … 633 633 uint32_t iPage = pThis->cPages; 634 634 while (iPage-- > 0) 635 ASMInvalidatePage( pThis->paPages[iPage].pvPage);635 ASMInvalidatePage((uintptr_t)pThis->paPages[iPage].pvPage); 636 636 } 637 637 return rc; … … 1316 1316 pThis->paPages[iPage].HCPhys = NIL_RTHCPHYS; 1317 1317 ASMAtomicBitClear(pThis->paPages[iPage].uPte.pv, X86_PTE_BIT_P); 1318 ASMInvalidatePage( pThis->paPages[iPage].pvPage);1318 ASMInvalidatePage((uintptr_t)pThis->paPages[iPage].pvPage); 1319 1319 #endif 1320 1320 } … … 1548 1548 { 1549 1549 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapPageInvlPg); 1550 ASMInvalidatePage( pvPage);1550 ASMInvalidatePage((uintptr_t)pvPage); 1551 1551 } 1552 1552 … … 2032 2032 PGMRZDYNMAP_SPINLOCK_RELEASE(pThis); 2033 2033 2034 ASMInvalidatePage( pThis->paPages[iPage].pvPage);2034 ASMInvalidatePage((uintptr_t)pThis->paPages[iPage].pvPage); 2035 2035 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapMigrateInvlPg); 2036 2036 -
trunk/src/VBox/VMM/include/PGMInternal.h
r58781 r60228 363 363 */ 364 364 #ifdef IN_RC 365 # define PGM_INVL_PG(pVCpu, GCVirt) ASMInvalidatePage(( void *)(uintptr_t)(GCVirt))365 # define PGM_INVL_PG(pVCpu, GCVirt) ASMInvalidatePage((uintptr_t)(GCVirt)) 366 366 #elif defined(IN_RING0) 367 367 # define PGM_INVL_PG(pVCpu, GCVirt) HMInvalidatePage(pVCpu, (RTGCPTR)(GCVirt)) … … 377 377 */ 378 378 #ifdef IN_RC 379 # define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt) ASMInvalidatePage(( void *)(uintptr_t)(GCVirt))379 # define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt) ASMInvalidatePage((uintptr_t)(GCVirt)) 380 380 #elif defined(IN_RING0) 381 381 # define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt) HMInvalidatePageOnAllVCpus(pVM, (RTGCPTR)(GCVirt))
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