- Timestamp:
- Apr 2, 2016 1:00:50 AM (9 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.c
r60292 r60293 69 69 { \ 70 70 if ((a_Actual) == (a_Expected)) { /* likely */ } \ 71 else Bs3TestFailedF("%u - %s: " a_szName "=" a_szFmt " expected " a_szFmt, uLine, pszMode, (a_Actual), (a_Expected)); \71 else bs3CpuBasic2_FailedF(a_szName "=" a_szFmt " expected " a_szFmt, (a_Actual), (a_Expected)); \ 72 72 } while (0) 73 73 … … 82 82 83 83 84 #if TMPL_MODE == BS3_MODE_PE16 || TMPL_MODE == BS3_MODE_PE16_32 || TMPL_MODE == BS3_MODE_LM64 84 /********************************************************************************************************************************* 85 * Global Variables * 86 *********************************************************************************************************************************/ 87 #if TMPL_MODE == BS3_MODE_RM || TMPL_MODE == BS3_MODE_PE16_32 || TMPL_MODE == BS3_MODE_LM64 88 static const char BS3_FAR *g_pszTestMode = (const char *)1; 89 static uint8_t g_bTestMode = 1; 90 static bool g_f16BitSys = 1; 91 static unsigned g_uLine = 1; 92 #endif 93 94 #if TMPL_MODE == BS3_MODE_RM || TMPL_MODE == BS3_MODE_PE16_32 || TMPL_MODE == BS3_MODE_LM64 95 96 /** 97 * Wrapper around Bs3TestFailedF that prefixes the error with g_uLine and 98 * g_pszTestMode. 99 */ 100 void bs3CpuBasic2_FailedF(const char *pszFormat, ...) 101 { 102 va_list va; 103 104 char szTmp[168]; 105 va_start(va, pszFormat); 106 Bs3StrPrintfV(szTmp, sizeof(szTmp), pszFormat, va); 107 va_end(va); 108 109 Bs3TestFailedF("%u - %s: %s", g_uLine, g_pszTestMode, szTmp); 110 } 111 85 112 86 113 /** … … 88 115 */ 89 116 #define bs3CpuBasic2_CompareIntCtx1 BS3_CMN_NM(bs3CpuBasic2_CompareIntCtx1) 90 void bs3CpuBasic2_CompareIntCtx1(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint8_t bXcpt, 91 const char *pszMode, unsigned uLine) 117 void bs3CpuBasic2_CompareIntCtx1(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint8_t bXcpt) 92 118 { 93 119 uint16_t const cErrorsBefore = Bs3TestSubErrorCount(); 94 120 CHECK_MEMBER("bXcpt", "%#04x", pTrapCtx->bXcpt, bXcpt); 95 121 CHECK_MEMBER("bErrCd", "%#06RX64", pTrapCtx->uErrCd, 0); 96 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, 2 /*int xx*/, 0 /*cbSpAdjust*/, 0 /*fExtraEfl*/, pszMode,uLine);122 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, 2 /*int xx*/, 0 /*cbSpAdjust*/, 0 /*fExtraEfl*/, g_pszTestMode, g_uLine); 97 123 if (Bs3TestSubErrorCount() != cErrorsBefore) 98 124 { … … 109 135 #define bs3CpuBasic2_CompareTrapCtx2 BS3_CMN_NM(bs3CpuBasic2_CompareTrapCtx2) 110 136 void bs3CpuBasic2_CompareTrapCtx2(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t cbIpAdjust, uint8_t bXcpt, 111 uint16_t uHandlerCs , const char *pszMode, unsigned uLine)137 uint16_t uHandlerCs) 112 138 { 113 139 uint16_t const cErrorsBefore = Bs3TestSubErrorCount(); … … 115 141 CHECK_MEMBER("bErrCd", "%#06RX64", pTrapCtx->uErrCd, 0); 116 142 CHECK_MEMBER("uHandlerCs", "%#06x", pTrapCtx->uHandlerCs, uHandlerCs); 117 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, cbIpAdjust, 0 /*cbSpAdjust*/, 0 /*fExtraEfl*/, pszMode,uLine);143 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, cbIpAdjust, 0 /*cbSpAdjust*/, 0 /*fExtraEfl*/, g_pszTestMode, g_uLine); 118 144 if (Bs3TestSubErrorCount() != cErrorsBefore) 119 145 { … … 123 149 } 124 150 } 151 152 /** 153 * Compares a CPU trap. 154 */ 155 #define bs3CpuBasic2_CompareCpuTrapCtx BS3_CMN_NM(bs3CpuBasic2_CompareCpuTrapCtx) 156 BS3_DECL(void) bs3CpuBasic2_CompareCpuTrapCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t uErrCd, uint8_t bXcpt) 157 { 158 uint16_t const cErrorsBefore = Bs3TestSubErrorCount(); 159 CHECK_MEMBER("bXcpt", "%#04x", pTrapCtx->bXcpt, bXcpt); 160 CHECK_MEMBER("bErrCd", "%#06RX64", pTrapCtx->uErrCd, (uint64_t)uErrCd); 161 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, 0 /*cbIpAdjust*/, 0 /*cbSpAdjust*/, 162 g_f16BitSys ? 0 : X86_EFL_RF, 163 g_pszTestMode, g_uLine); 164 if (Bs3TestSubErrorCount() != cErrorsBefore) 165 { 166 //Bs3TestPrintf("%s\n", __FUNCTION__); 167 Bs3TrapPrintFrame(pTrapCtx); 168 ASMHalt(); 169 } 170 } 171 125 172 126 173 /** … … 128 175 */ 129 176 #define bs3CpuBasic2_CompareGpCtx BS3_CMN_NM(bs3CpuBasic2_CompareGpCtx) 130 void bs3CpuBasic2_CompareGpCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t uErrCd, bool f16BitHandler, 131 const char *pszMode, unsigned uLine) 132 { 133 uint16_t const cErrorsBefore = Bs3TestSubErrorCount(); 134 CHECK_MEMBER("bXcpt", "%#04x", pTrapCtx->bXcpt, X86_XCPT_GP); 135 CHECK_MEMBER("bErrCd", "%#06RX64", pTrapCtx->uErrCd, (uint64_t)uErrCd); 136 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, 0 /*cbIpAdjust*/, 0 /*cbSpAdjust*/, 137 f16BitHandler ? 0 : X86_EFL_RF, 138 pszMode, uLine); 139 if (Bs3TestSubErrorCount() != cErrorsBefore) 140 { 141 //Bs3TestPrintf("%s\n", __FUNCTION__); 142 Bs3TrapPrintFrame(pTrapCtx); 143 ASMHalt(); 144 } 177 void bs3CpuBasic2_CompareGpCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t uErrCd) 178 { 179 bs3CpuBasic2_CompareCpuTrapCtx(pTrapCtx, pStartCtx, uErrCd, X86_XCPT_GP); 145 180 } 146 181 … … 149 184 */ 150 185 #define bs3CpuBasic2_CompareNpCtx BS3_CMN_NM(bs3CpuBasic2_CompareNpCtx) 151 void bs3CpuBasic2_CompareNpCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t uErrCd, bool f16BitHandler, 152 const char *pszMode, unsigned uLine) 153 { 154 uint16_t const cErrorsBefore = Bs3TestSubErrorCount(); 155 CHECK_MEMBER("bXcpt", "%#04x", pTrapCtx->bXcpt, X86_XCPT_NP); 156 CHECK_MEMBER("bErrCd", "%#06RX64", pTrapCtx->uErrCd, (uint64_t)uErrCd); 157 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, 0 /*cbIpAdjust*/, 0 /*cbSpAdjust*/, 158 f16BitHandler ? 0 : X86_EFL_RF, 159 pszMode, uLine); 160 if (Bs3TestSubErrorCount() != cErrorsBefore) 161 { 162 //Bs3TestPrintf("%s\n", __FUNCTION__); 163 Bs3TrapPrintFrame(pTrapCtx); 164 ASMHalt(); 165 } 186 void bs3CpuBasic2_CompareNpCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t uErrCd) 187 { 188 bs3CpuBasic2_CompareCpuTrapCtx(pTrapCtx, pStartCtx, uErrCd, X86_XCPT_NP); 166 189 } 167 190 … … 170 193 */ 171 194 #define bs3CpuBasic2_CompareSsCtx BS3_CMN_NM(bs3CpuBasic2_CompareSsCtx) 172 void bs3CpuBasic2_CompareSsCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t uErrCd, bool f16BitHandler, 173 const char *pszMode, unsigned uLine) 174 { 175 uint16_t const cErrorsBefore = Bs3TestSubErrorCount(); 176 CHECK_MEMBER("bXcpt", "%#04x", pTrapCtx->bXcpt, X86_XCPT_SS); 177 CHECK_MEMBER("bErrCd", "%#06RX64", pTrapCtx->uErrCd, (uint64_t)uErrCd); 178 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, 0 /*cbIpAdjust*/, 0 /*cbSpAdjust*/, 179 f16BitHandler ? 0 : X86_EFL_RF, 180 pszMode, uLine); 181 if (Bs3TestSubErrorCount() != cErrorsBefore) 182 { 183 //Bs3TestPrintf("%s\n", __FUNCTION__); 184 Bs3TrapPrintFrame(pTrapCtx); 185 ASMHalt(); 186 } 195 void bs3CpuBasic2_CompareSsCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t uErrCd) 196 { 197 bs3CpuBasic2_CompareCpuTrapCtx(pTrapCtx, pStartCtx, uErrCd, X86_XCPT_SS); 187 198 } 188 199 … … 191 202 */ 192 203 #define bs3CpuBasic2_CompareTsCtx BS3_CMN_NM(bs3CpuBasic2_CompareTsCtx) 193 void bs3CpuBasic2_CompareTsCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t uErrCd, bool f16BitHandler, 194 const char *pszMode, unsigned uLine) 195 { 196 uint16_t const cErrorsBefore = Bs3TestSubErrorCount(); 197 CHECK_MEMBER("bXcpt", "%#04x", pTrapCtx->bXcpt, X86_XCPT_TS); 198 CHECK_MEMBER("bErrCd", "%#06RX64", pTrapCtx->uErrCd, (uint64_t)uErrCd); 199 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, 0 /*cbIpAdjust*/, 0 /*cbSpAdjust*/, 200 f16BitHandler ? 0 : X86_EFL_RF, 201 pszMode, uLine); 202 if (Bs3TestSubErrorCount() != cErrorsBefore) 203 { 204 //Bs3TestPrintf("%s\n", __FUNCTION__); 205 Bs3TrapPrintFrame(pTrapCtx); 206 ASMHalt(); 207 } 204 void bs3CpuBasic2_CompareTsCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx, uint16_t uErrCd) 205 { 206 bs3CpuBasic2_CompareCpuTrapCtx(pTrapCtx, pStartCtx, uErrCd, X86_XCPT_TS); 208 207 } 209 208 … … 212 211 */ 213 212 #define bs3CpuBasic2_ComparePfCtx BS3_CMN_NM(bs3CpuBasic2_ComparePfCtx) 214 void bs3CpuBasic2_ComparePfCtx(PCBS3TRAPFRAME pTrapCtx, PBS3REGCTX pStartCtx, uint16_t uErrCd, uint64_t uCr2Expected, 215 bool f16BitHandler, const char *pszMode, unsigned uLine) 213 void bs3CpuBasic2_ComparePfCtx(PCBS3TRAPFRAME pTrapCtx, PBS3REGCTX pStartCtx, uint16_t uErrCd, uint64_t uCr2Expected) 216 214 { 217 215 uint64_t const uCr2Saved = pStartCtx->cr2.u; 218 uint16_t const cErrorsBefore = Bs3TestSubErrorCount();219 CHECK_MEMBER("bXcpt", "%#04x", pTrapCtx->bXcpt, X86_XCPT_PF);220 CHECK_MEMBER("bErrCd", "%#06RX64", pTrapCtx->uErrCd, (uint64_t)uErrCd);221 216 pStartCtx->cr2.u = uCr2Expected; 222 Bs3TestCheckRegCtxEx(&pTrapCtx->Ctx, pStartCtx, 0 /*cbIpAdjust*/, 0 /*cbSpAdjust*/, 223 f16BitHandler ? 0 : X86_EFL_RF, 224 pszMode, uLine); 217 bs3CpuBasic2_CompareCpuTrapCtx(pTrapCtx, pStartCtx, uErrCd, X86_XCPT_PF); 225 218 pStartCtx->cr2.u = uCr2Saved; 226 if (Bs3TestSubErrorCount() != cErrorsBefore)227 {228 //Bs3TestPrintf("%s\n", __FUNCTION__);229 Bs3TrapPrintFrame(pTrapCtx);230 ASMHalt();231 }232 219 } 233 220 234 221 #define bs3CpuBasic2_RaiseXcpt1Common BS3_CMN_NM(bs3CpuBasic2_RaiseXcpt1Common) 235 static void bs3CpuBasic2_RaiseXcpt1Common( uint8_t const bMode, const char * const pszMode, bool constf16BitSys,222 static void bs3CpuBasic2_RaiseXcpt1Common(bool const g_f16BitSys, 236 223 uint16_t const uSysR0Cs, uint16_t const uSysR0CsConf, uint16_t const uSysR0Ss, 237 224 PX86DESC const paIdt, unsigned const cIdteShift) … … 249 236 unsigned iRpl; 250 237 unsigned i, j, k; 251 unsigned uLine;252 238 uint32_t uExpected; 253 239 # if TMPL_BITS == 16 … … 287 273 /* Allocate memory for playing around with the IDT. */ 288 274 pbIdtCopyAlloc = NULL; 289 if (BS3_MODE_IS_PAGED( bMode))275 if (BS3_MODE_IS_PAGED(g_bTestMode)) 290 276 pbIdtCopyAlloc = Bs3MemAlloc(BS3MEMKIND_FLAT32, 12*_1K); 291 277 # endif … … 318 304 for (iCtx = 0; iCtx < RT_ELEMENTS(apCtx8x); iCtx++) 319 305 { 306 g_uLine = iCtx; 320 307 # if TMPL_BITS == 32 321 308 BS3_DATA_NM(g_uBs3TrapEipHint) = apCtx8x[iCtx]->rip.u32; 322 309 # endif 323 310 Bs3TrapSetJmpAndRestore(apCtx8x[iCtx], &TrapCtx); 324 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, apCtx8x[iCtx], 0x80+iCtx /*bXcpt*/ , pszMode, iCtx);311 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, apCtx8x[iCtx], 0x80+iCtx /*bXcpt*/); 325 312 } 326 313 … … 328 315 * Check that the gate DPL checks works. 329 316 */ 330 uLine = 100;317 g_uLine = 100; 331 318 for (iRing = 0; iRing <= 3; iRing++) 332 319 { … … 339 326 # endif 340 327 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 341 uLine++;328 g_uLine++; 342 329 if (iCtx < iRing) 343 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 344 f16BitSys, pszMode, uLine); 330 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 345 331 else 346 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x80 + iCtx /*bXcpt*/ , pszMode, uLine);332 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x80 + iCtx /*bXcpt*/); 347 333 } 348 334 } … … 356 342 * 3. GATE.CS.DPL <= CPL (non-conforming segments) 357 343 */ 358 uLine = 1000;344 g_uLine = 1000; 359 345 for (i = 0; i <= 3; i++) 360 346 { … … 374 360 for (k = 0; k < 2; k++) 375 361 { 376 uLine++;377 /*Bs3TestPrintf(" uLine=%u iCtx=%u iRing=%u i=%u uCs=%04x\n",uLine, iCtx, iRing, i, uCs);*/362 g_uLine++; 363 /*Bs3TestPrintf("g_uLine=%u iCtx=%u iRing=%u i=%u uCs=%04x\n", g_uLine, iCtx, iRing, i, uCs);*/ 378 364 paIdt[(0x80 + iCtx) << cIdteShift].Gate.u16Sel = uCs; 379 365 paIdt[(0x80 + iCtx) << cIdteShift].Gate.u1Present = k; … … 381 367 /*Bs3TrapPrintFrame(&TrapCtx);*/ 382 368 if (iCtx < iRing) 383 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 384 f16BitSys, pszMode, uLine); 369 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 385 370 else if (k == 0) 386 bs3CpuBasic2_CompareNpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 387 f16BitSys, pszMode, uLine); 371 bs3CpuBasic2_CompareNpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 388 372 else if (i > iRing) 389 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, uCs & X86_SEL_MASK_OFF_RPL , f16BitSys, pszMode, uLine);373 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, uCs & X86_SEL_MASK_OFF_RPL); 390 374 else 391 375 { … … 393 377 if (i <= iCtx && i <= iRing) 394 378 uExpectedCs |= i; 395 bs3CpuBasic2_CompareTrapCtx2(&TrapCtx, &CtxTmp, 2 /*int 8xh*/, 0x80 + iCtx /*bXcpt*/, 396 uExpectedCs, pszMode, uLine); 379 bs3CpuBasic2_CompareTrapCtx2(&TrapCtx, &CtxTmp, 2 /*int 8xh*/, 0x80 + iCtx /*bXcpt*/, uExpectedCs); 397 380 } 398 381 } … … 404 387 } 405 388 } 406 BS3_ASSERT(uLine < 2800); 407 389 BS3_ASSERT(g_uLine < 1600); 408 390 409 391 /* 410 392 * Various CS and SS related faults 393 * 411 394 * We temporarily reconfigure gate 80 and 83 with new CS selectors, the 412 395 * latter have a CS.DPL of 2 for testing ring transisions and SS loading 413 396 * without making it impossible to handle faults. 414 * 415 * Check #NP(CS). Pit #NP(CS) against #GP(CS) due to DPL. 416 * Ditto for stack. 417 * Pit SS trouble against CS trouble. 418 * Pit both against gate DPL trouble. 419 */ 420 uLine = 2800; 397 */ 398 g_uLine = 1600; 421 399 BS3_DATA_NM(Bs3GdteTestPage00) = BS3_DATA_NM(Bs3Gdt)[uSysR0Cs >> X86_SEL_SHIFT]; 422 400 BS3_DATA_NM(Bs3GdteTestPage00).Gen.u1Present = 0; … … 425 403 /* CS.PRESENT = 0 */ 426 404 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 427 bs3CpuBasic2_CompareNpCtx(&TrapCtx, &Ctx80, BS3_SEL_TEST_PAGE_00 , f16BitSys, pszMode, uLine);428 uLine++;405 bs3CpuBasic2_CompareNpCtx(&TrapCtx, &Ctx80, BS3_SEL_TEST_PAGE_00); 406 g_uLine++; 429 407 430 408 /* Check that GATE.DPL is checked before CS.PRESENT. */ … … 434 412 Bs3RegCtxConvertToRingX(&CtxTmp, iRing); 435 413 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 436 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, (0x80 << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 437 f16BitSys, pszMode, uLine); 438 uLine++; 414 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, (0x80 << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 415 g_uLine++; 439 416 } 440 417 441 418 /* CS.DPL mismatch takes precedence over CS.PRESENT = 0. */ 442 419 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 443 bs3CpuBasic2_CompareNpCtx(&TrapCtx, &Ctx80, BS3_SEL_TEST_PAGE_00 , f16BitSys, pszMode, uLine);444 uLine++;420 bs3CpuBasic2_CompareNpCtx(&TrapCtx, &Ctx80, BS3_SEL_TEST_PAGE_00); 421 g_uLine++; 445 422 for (iDpl = 1; iDpl < 4; iDpl++) 446 423 { 447 424 BS3_DATA_NM(Bs3GdteTestPage00).Gen.u2Dpl = iDpl; 448 425 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 449 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &Ctx80, BS3_SEL_TEST_PAGE_00 , f16BitSys, pszMode, uLine);450 uLine++;426 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &Ctx80, BS3_SEL_TEST_PAGE_00); 427 g_uLine++; 451 428 } 452 429 453 430 /* Test SS. */ 454 if (!BS3_MODE_IS_64BIT_SYS( bMode))455 { 456 uint16_t BS3_FAR *puTssSs2 = BS3_MODE_IS_16BIT_SYS( bMode) ? &BS3_DATA_NM(Bs3Tss16).ss2 : &BS3_DATA_NM(Bs3Tss32).ss2;431 if (!BS3_MODE_IS_64BIT_SYS(g_bTestMode)) 432 { 433 uint16_t BS3_FAR *puTssSs2 = BS3_MODE_IS_16BIT_SYS(g_bTestMode) ? &BS3_DATA_NM(Bs3Tss16).ss2 : &BS3_DATA_NM(Bs3Tss32).ss2; 457 434 uint16_t const uSavedSs2 = *puTssSs2; 458 435 … … 464 441 Bs3RegCtxConvertToRingX(&CtxTmp, 3); /* yeah, from 3 so SS:xSP is reloaded. */ 465 442 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 466 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83 , pszMode, uLine);467 uLine++;443 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83); 444 g_uLine++; 468 445 469 446 /* Create a SS.DPL=2 stack segment and check that SS2.RPL matters and … … 481 458 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 482 459 if (iRpl != 2 || iRpl != iDpl) 483 bs3CpuBasic2_CompareTsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03 , f16BitSys, pszMode, uLine);460 bs3CpuBasic2_CompareTsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03); 484 461 else if (k != 0) 485 bs3CpuBasic2_CompareSsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03 , f16BitSys, pszMode, uLine);462 bs3CpuBasic2_CompareSsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03); 486 463 else 487 464 { 488 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83 , pszMode, uLine);465 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83); 489 466 if (TrapCtx.uHandlerSs != (BS3_SEL_TEST_PAGE_03 | 2)) 490 Bs3TestFailedF("%u - %s: uHandlerSs=%#x expected %#x\n", uLine, pszMode, 491 TrapCtx.uHandlerSs, BS3_SEL_TEST_PAGE_03 | 2); 467 bs3CpuBasic2_FailedF("uHandlerSs=%#x expected %#x\n", TrapCtx.uHandlerSs, BS3_SEL_TEST_PAGE_03 | 2); 492 468 } 493 uLine++;469 g_uLine++; 494 470 495 471 /* Modify the gate DPL to check that this is checked before SS.DPL and SS.PRESENT. */ 496 472 paIdt[0x83 << cIdteShift].Gate.u2Dpl = 2; 497 473 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 498 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, (0x83 << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 499 f16BitSys, pszMode, uLine); 474 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, (0x83 << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 500 475 paIdt[0x83 << cIdteShift].Gate.u2Dpl = 3; 501 uLine++;476 g_uLine++; 502 477 503 478 /* Check the the CS.DPL check is done before the SS ones. Restoring the ring-0 INT 83 504 479 context triggers the CS.DPL < CPL check. */ 505 480 Bs3TrapSetJmpAndRestore(&Ctx83, &TrapCtx); 506 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &Ctx83, BS3_SEL_TEST_PAGE_02 , f16BitSys, pszMode, uLine);507 uLine++;481 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &Ctx83, BS3_SEL_TEST_PAGE_02); 482 g_uLine++; 508 483 509 484 /* Now mark the CS selector not present and check that that also triggers before SS stuff. */ 510 485 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u1Present = 0; 511 486 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 512 bs3CpuBasic2_CompareNpCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_02 , f16BitSys, pszMode, uLine);487 bs3CpuBasic2_CompareNpCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_02); 513 488 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u1Present = 1; 514 uLine++; 489 g_uLine++; 490 491 /* Now, make the CS selector limit too small and that it triggers after SS trouble. */ 492 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u16LimitLow = 0; 493 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u4LimitHigh = 0; 494 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u1Granularity = 0; 495 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 496 if (iRpl != 2 || iRpl != iDpl) 497 bs3CpuBasic2_CompareTsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03); 498 else if (k != 0) 499 bs3CpuBasic2_CompareSsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03); 500 else 501 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, 0 /*uErrCd*/); 502 BS3_DATA_NM(Bs3GdteTestPage02) = BS3_DATA_NM(Bs3Gdt)[(uSysR0Cs + (2 << BS3_SEL_RING_SHIFT)) >> X86_SEL_SHIFT]; 503 g_uLine++; 515 504 } 516 505 } 517 506 } 518 507 508 /** @todo check the SS to a expand down thingy. Check that the limit 509 * checking works. Then check what happens as we move the 510 * limit thru the IRET frame area. */ 511 519 512 *puTssSs2 = uSavedSs2; 520 513 paIdt[0x83 << cIdteShift].Gate.u16Sel = uSysR0Cs; … … 525 518 * Modify the gate CS value with a conforming segment. 526 519 */ 527 uLine = 2000;520 g_uLine = 2000; 528 521 for (i = 0; i <= 3; i++) /* cs.dpl */ 529 522 { … … 541 534 { 542 535 uint16_t const uCs = (uSysR0CsConf | j) + (i << BS3_SEL_RING_SHIFT); 543 /*Bs3TestPrintf(" uLine=%u iCtx=%u iRing=%u i=%u uCs=%04x\n",uLine, iCtx, iRing, i, uCs);*/536 /*Bs3TestPrintf("g_uLine=%u iCtx=%u iRing=%u i=%u uCs=%04x\n", g_uLine, iCtx, iRing, i, uCs);*/ 544 537 paIdt[(0x80 + iCtx) << cIdteShift].Gate.u16Sel = uCs; 545 538 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 546 539 //Bs3TestPrintf("%u/%u/%u/%u: cs=%04x hcs=%04x xcpt=%02x\n", i, iRing, iCtx, j, uCs, TrapCtx.uHandlerCs, TrapCtx.bXcpt); 547 540 /*Bs3TrapPrintFrame(&TrapCtx);*/ 548 uLine++;541 g_uLine++; 549 542 if (iCtx < iRing) 550 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 551 f16BitSys, pszMode, uLine); 543 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 552 544 else if (i > iRing) 553 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, uCs & X86_SEL_MASK_OFF_RPL , f16BitSys, pszMode, uLine);545 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, uCs & X86_SEL_MASK_OFF_RPL); 554 546 else 555 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x80 + iCtx /*bXcpt*/ , pszMode, uLine);547 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x80 + iCtx /*bXcpt*/); 556 548 } 557 549 paIdt[(0x80 + iCtx) << cIdteShift].Gate.u16Sel = uSysR0Cs; … … 559 551 } 560 552 } 561 BS3_ASSERT( uLine < 3000);553 BS3_ASSERT(g_uLine < 3000); 562 554 563 555 /* … … 566 558 if (cIdteShift != 0) 567 559 { 568 uLine = 3000;560 g_uLine = 3000; 569 561 for (i = 0; i <= 3; i++) 570 562 { … … 580 572 static const uint16_t s_auCSes[2] = { BS3_SEL_R0_CS16, BS3_SEL_R0_CS32 }; 581 573 uint16_t uCs = (s_auCSes[j] | i) + (i << BS3_SEL_RING_SHIFT); 582 uLine++;583 /*Bs3TestPrintf(" uLine=%u iCtx=%u iRing=%u i=%u uCs=%04x\n",uLine, iCtx, iRing, i, uCs);*/574 g_uLine++; 575 /*Bs3TestPrintf("g_uLine=%u iCtx=%u iRing=%u i=%u uCs=%04x\n", g_uLine, iCtx, iRing, i, uCs);*/ 584 576 paIdt[(0x80 + iCtx) << cIdteShift].Gate.u16Sel = uCs; 585 577 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 586 578 /*Bs3TrapPrintFrame(&TrapCtx);*/ 587 579 if (iCtx < iRing) 588 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 589 f16BitSys, pszMode, uLine); 580 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 590 581 else 591 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, uCs & X86_SEL_MASK_OFF_RPL , f16BitSys, pszMode, uLine);582 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, uCs & X86_SEL_MASK_OFF_RPL); 592 583 } 593 584 paIdt[(0x80 + iCtx) << cIdteShift].Gate.u16Sel = uSysR0Cs; … … 595 586 } 596 587 } 597 BS3_ASSERT( uLine < 4000);588 BS3_ASSERT(g_uLine < 4000); 598 589 } 599 590 … … 601 592 * IDT limit check. 602 593 */ 603 uLine = 5000;594 g_uLine = 5000; 604 595 i = (0x80 << (cIdteShift + 3)) - 1; 605 596 j = (0x82 << (cIdteShift + 3)) - 1; 606 597 k = (0x83 << (cIdteShift + 3)) - 1; 607 for (; i <= k; i++, uLine++)598 for (; i <= k; i++, g_uLine++) 608 599 { 609 600 Idtr = IdtrSaved; … … 612 603 Bs3TrapSetJmpAndRestore(&Ctx81, &TrapCtx); 613 604 if (i < j) 614 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &Ctx81, (0x81 << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 615 f16BitSys, pszMode, uLine); 605 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &Ctx81, (0x81 << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 616 606 else 617 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx81, 0x81 /*bXcpt*/ , pszMode, uLine);607 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx81, 0x81 /*bXcpt*/); 618 608 } 619 609 ASMSetIDTR(&IdtrSaved); 620 BS3_ASSERT( uLine < 5100);610 BS3_ASSERT(g_uLine < 5100); 621 611 622 612 # if TMPL_BITS != 16 /* Only do the paging related stuff in 32-bit and 64-bit modes. */ … … 631 621 * to real mode and back, reloading the default IDTR. 632 622 */ 633 uLine = 5200;634 if (BS3_MODE_IS_PAGED( bMode) && pbIdtCopyAlloc)623 g_uLine = 5200; 624 if (BS3_MODE_IS_PAGED(g_bTestMode) && pbIdtCopyAlloc) 635 625 { 636 626 uint32_t const uCr2Expected = Bs3SelPtrToFlat(pbIdtCopyAlloc) + _4K; … … 645 635 ASMSetIDTR(&Idtr); 646 636 Bs3TrapSetJmpAndRestore(&Ctx81, &TrapCtx); 647 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx81, 0x81 /*bXcpt*/, pszMode, uLine++); 637 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx81, 0x81 /*bXcpt*/); 638 g_uLine++; 648 639 649 640 ASMSetIDTR(&Idtr); 650 641 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 651 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/, pszMode, uLine++); 642 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/); 643 g_uLine++; 652 644 653 645 rc = Bs3PagingProtect(uCr2Expected, _4K, 0 /*fSet*/, X86_PTE_P /*fClear*/); … … 656 648 ASMSetIDTR(&Idtr); 657 649 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 658 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/, pszMode, uLine++); 650 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/); 651 g_uLine++; 659 652 660 653 ASMSetIDTR(&Idtr); 661 654 Bs3TrapSetJmpAndRestore(&Ctx81, &TrapCtx); 662 bs3CpuBasic2_ComparePfCtx(&TrapCtx, &Ctx81, 0 /*uErrCd*/, uCr2Expected, f16BitSys, pszMode, uLine++); 655 bs3CpuBasic2_ComparePfCtx(&TrapCtx, &Ctx81, 0 /*uErrCd*/, uCr2Expected); 656 g_uLine++; 663 657 664 658 Bs3PagingProtect(uCr2Expected, _4K, X86_PTE_P /*fSet*/, 0 /*fClear*/); … … 671 665 ASMSetIDTR(&Idtr); 672 666 Bs3TrapSetJmpAndRestore(&Ctx81, &TrapCtx); 673 bs3CpuBasic2_ComparePfCtx(&TrapCtx, &Ctx81, 0 /*uErrCd*/, uCr2Expected, f16BitSys, pszMode, uLine++); 667 bs3CpuBasic2_ComparePfCtx(&TrapCtx, &Ctx81, 0 /*uErrCd*/, uCr2Expected); 668 g_uLine++; 674 669 675 670 Bs3PagingProtect(uCr2Expected, _4K, X86_PTE_P /*fSet*/, 0 /*fClear*/); … … 686 681 * The read/write and user/supervisor bits the IDT PTEs are irrelevant. 687 682 */ 688 uLine = 5300;689 if (BS3_MODE_IS_PAGED( bMode) && pbIdtCopyAlloc)683 g_uLine = 5300; 684 if (BS3_MODE_IS_PAGED(g_bTestMode) && pbIdtCopyAlloc) 690 685 { 691 686 Bs3MemCpy(pbIdtCopyAlloc, paIdt, cbIdte * 256); … … 695 690 ASMSetIDTR(&Idtr); 696 691 Bs3TrapSetJmpAndRestore(&Ctx81, &TrapCtx); 697 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx81, 0x81 /*bXcpt*/, pszMode, uLine++); 692 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx81, 0x81 /*bXcpt*/); 693 g_uLine++; 698 694 699 695 rc = Bs3PagingProtect(Idtr.pIdt, _4K, 0 /*fSet*/, X86_PTE_RW | X86_PTE_US /*fClear*/); … … 702 698 ASMSetIDTR(&Idtr); 703 699 Bs3TrapSetJmpAndRestore(&Ctx81, &TrapCtx); 704 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx81, 0x81 /*bXcpt*/, pszMode, uLine++); 700 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx81, 0x81 /*bXcpt*/); 701 g_uLine++; 705 702 706 703 Bs3PagingProtect(Idtr.pIdt, _4K, X86_PTE_RW | X86_PTE_US /*fSet*/, 0 /*fClear*/); … … 713 710 * with interrupt gates 80h and 83h, respectively. 714 711 */ 715 uLine = 5400; 716 if (BS3_MODE_IS_PAGED(bMode) && pbIdtCopyAlloc) 712 /** @todo Throw in SS.u1Accessed too. */ 713 g_uLine = 5400; 714 if (BS3_MODE_IS_PAGED(g_bTestMode) && pbIdtCopyAlloc) 717 715 { 718 716 BS3_DATA_NM(Bs3GdteTestPage00) = BS3_DATA_NM(Bs3Gdt)[uSysR0Cs >> X86_SEL_SHIFT]; … … 727 725 the special CS values work with out generic handler code. */ 728 726 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 729 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/ , pszMode, uLine);727 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/); 730 728 if (!(BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type & X86_SEL_TYPE_ACCESSED)) 731 Bs3TestFailedF("%u - %s: u4Type=%#x, not accessed\n", uLine, pszMode, BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type);732 uLine++;729 bs3CpuBasic2_FailedF("u4Type=%#x, not accessed", BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type); 730 g_uLine++; 733 731 734 732 Bs3MemCpy(&CtxTmp, &Ctx83, sizeof(CtxTmp)); 735 733 Bs3RegCtxConvertToRingX(&CtxTmp, 3); 736 734 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 737 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83 /*bXcpt*/ , pszMode, uLine);735 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83 /*bXcpt*/); 738 736 if (!(BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type & X86_SEL_TYPE_ACCESSED)) 739 Bs3TestFailedF("%u - %s: u4Type=%#x, not accessed!\n", uLine, pszMode, BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type);737 bs3CpuBasic2_FailedF("u4Type=%#x, not accessed!", BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type); 740 738 if (TrapCtx.uHandlerCs != (BS3_SEL_TEST_PAGE_03 | 3)) 741 Bs3TestFailedF("%u - %s: uHandlerCs=%#x, expected %#x\n", uLine, pszMode, TrapCtx.uHandlerCs, (BS3_SEL_TEST_PAGE_03 | 3));742 uLine++;739 bs3CpuBasic2_FailedF("uHandlerCs=%#x, expected %#x", TrapCtx.uHandlerCs, (BS3_SEL_TEST_PAGE_03 | 3)); 740 g_uLine++; 743 741 744 742 /* … … 757 755 /* ring-0 handler */ 758 756 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 759 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/ , pszMode, uLine);757 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/); 760 758 if (!(BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type & X86_SEL_TYPE_ACCESSED)) 761 Bs3TestFailedF("%u - %s: u4Type=%#x, not accessed!\n", uLine, pszMode, BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type);762 uLine++;759 bs3CpuBasic2_FailedF("u4Type=%#x, not accessed!", BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type); 760 g_uLine++; 763 761 764 762 /* ring-3 handler */ … … 766 764 Bs3RegCtxConvertToRingX(&CtxTmp, 3); 767 765 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 768 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83 /*bXcpt*/ , pszMode, uLine);766 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83 /*bXcpt*/); 769 767 if (!(BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type & X86_SEL_TYPE_ACCESSED)) 770 Bs3TestFailedF("%u - %s: u4Type=%#x, not accessed!\n", uLine, pszMode, BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type);771 uLine++;768 bs3CpuBasic2_FailedF("u4Type=%#x, not accessed!", BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type); 769 g_uLine++; 772 770 773 771 /* clear WP and repeat the above. */ … … 778 776 779 777 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 780 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/ , pszMode, uLine);778 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx80, 0x80 /*bXcpt*/); 781 779 if (!(BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type & X86_SEL_TYPE_ACCESSED)) 782 Bs3TestFailedF("%u - %s: u4Type=%#x, not accessed!\n", uLine, pszMode, BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type);783 uLine++;780 bs3CpuBasic2_FailedF("u4Type=%#x, not accessed!", BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type); 781 g_uLine++; 784 782 785 783 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 786 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83 /*bXcpt*/ , pszMode, uLine);784 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83 /*bXcpt*/); 787 785 if (!(BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type & X86_SEL_TYPE_ACCESSED)) 788 Bs3TestFailedF("%u - %s: u4Type=%#x, not accessed!\n", uLine, pszMode, BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type);789 uLine++;786 bs3CpuBasic2_FailedF("u4Type=%#x, not accessed!n", BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type); 787 g_uLine++; 790 788 791 789 Bs3PagingProtect(GdtrSaved.pGdt + BS3_SEL_TEST_PAGE_00, 8, X86_PTE_RW /*fSet*/, 0 /*fClear*/); … … 804 802 { 805 803 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 806 bs3CpuBasic2_ComparePfCtx(&TrapCtx, &Ctx80, 0 /*uErrCd*/, GdtrSaved.pGdt + BS3_SEL_TEST_PAGE_00, 807 f16BitSys, pszMode, uLine); 808 uLine++; 804 bs3CpuBasic2_ComparePfCtx(&TrapCtx, &Ctx80, 0 /*uErrCd*/, GdtrSaved.pGdt + BS3_SEL_TEST_PAGE_00); 805 g_uLine++; 809 806 810 807 /* Do it from ring-3 to check ErrCd, which doesn't set X86_TRAP_PF_US it turns out. */ … … 813 810 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 814 811 815 bs3CpuBasic2_ComparePfCtx(&TrapCtx, &CtxTmp, 0 /*uErrCd*/, GdtrSaved.pGdt + BS3_SEL_TEST_PAGE_03, 816 f16BitSys, pszMode, uLine); 817 uLine++; 812 bs3CpuBasic2_ComparePfCtx(&TrapCtx, &CtxTmp, 0 /*uErrCd*/, GdtrSaved.pGdt + BS3_SEL_TEST_PAGE_03); 813 g_uLine++; 818 814 819 815 Bs3PagingProtect(GdtrSaved.pGdt + BS3_SEL_TEST_PAGE_00, 8, X86_PTE_P /*fSet*/, 0 /*fClear*/); 820 816 if (BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type & X86_SEL_TYPE_ACCESSED) 821 Bs3TestFailedF("%u - %s: u4Type=%#x, accessed!\n", uLine - 2, pszMode, BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type);817 bs3CpuBasic2_FailedF("u4Type=%#x, accessed! #1", BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type); 822 818 if (BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type & X86_SEL_TYPE_ACCESSED) 823 Bs3TestFailedF("%u - %s: u4Type=%#x, accessed!\n", uLine - 1, pszMode, BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type);819 bs3CpuBasic2_FailedF("u4Type=%#x, accessed! #2", BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type); 824 820 } 825 821 … … 834 830 * Check broad EFLAGS effects. 835 831 */ 836 uLine = 5600;832 g_uLine = 5600; 837 833 for (iCtx = 0; iCtx < RT_ELEMENTS(apCtx8x); iCtx++) 838 834 { … … 848 844 if (f386Plus) 849 845 CtxTmp.rflags.u32 |= /*X86_EFL_VM |*/ X86_EFL_AC | X86_EFL_VIF | X86_EFL_VIP; 850 if (f386Plus && ! f16BitSys)846 if (f386Plus && !g_f16BitSys) 851 847 CtxTmp.rflags.u32 |= X86_EFL_RF; 852 848 if (BS3_DATA_NM(g_uBs3CpuDetected) & BS3CPU_F_CPUID) … … 856 852 857 853 if (iCtx >= iRing) 858 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x80 + iCtx /*bXcpt*/ , pszMode, uLine);854 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x80 + iCtx /*bXcpt*/); 859 855 else 860 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 861 f16BitSys, pszMode, uLine); 856 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 862 857 uExpected = CtxTmp.rflags.u32 863 858 & ( X86_EFL_1 | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_DF … … 865 860 | X86_EFL_ID /*| X86_EFL_TF*/ /*| X86_EFL_IF*/ /*| X86_EFL_RF*/ ); 866 861 if (TrapCtx.fHandlerRfl != uExpected) 867 Bs3TestFailedF("%u - %s:unexpected handler rflags value: %RX64 expected %RX32; CtxTmp.rflags=%RX64 Ctx.rflags=%RX64\n",868 uLine, pszMode,TrapCtx.fHandlerRfl, uExpected, CtxTmp.rflags.u, TrapCtx.Ctx.rflags.u);869 uLine++;862 bs3CpuBasic2_FailedF("unexpected handler rflags value: %RX64 expected %RX32; CtxTmp.rflags=%RX64 Ctx.rflags=%RX64\n", 863 TrapCtx.fHandlerRfl, uExpected, CtxTmp.rflags.u, TrapCtx.Ctx.rflags.u); 864 g_uLine++; 870 865 871 866 /* all cleared */ … … 876 871 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 877 872 if (iCtx >= iRing) 878 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x80 + iCtx /*bXcpt*/ , pszMode, uLine);873 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x80 + iCtx /*bXcpt*/); 879 874 else 880 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 881 f16BitSys, pszMode, uLine); 875 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 882 876 uExpected = CtxTmp.rflags.u32; 883 877 if (TrapCtx.fHandlerRfl != uExpected) 884 Bs3TestFailedF("%u - %s:unexpected handler rflags value: %RX64 expected %RX32; CtxTmp.rflags=%RX64 Ctx.rflags=%RX64\n",885 uLine, pszMode,TrapCtx.fHandlerRfl, uExpected, CtxTmp.rflags.u, TrapCtx.Ctx.rflags.u);886 uLine++;878 bs3CpuBasic2_FailedF("unexpected handler rflags value: %RX64 expected %RX32; CtxTmp.rflags=%RX64 Ctx.rflags=%RX64\n", 879 TrapCtx.fHandlerRfl, uExpected, CtxTmp.rflags.u, TrapCtx.Ctx.rflags.u); 880 g_uLine++; 887 881 } 888 882 } 889 883 884 /** @todo CS.LIMIT / canonical(CS) */ 885 886 890 887 /* 891 888 * Check invalid gate types. 892 889 */ 893 uLine = 32000;890 g_uLine = 32000; 894 891 for (iRing = 0; iRing <= 3; iRing++) 895 892 { … … 930 927 ? (s_auCSes[j] | i) + (i << BS3_SEL_RING_SHIFT) 931 928 : s_auCSes[j] | i; 932 /*Bs3TestPrintf(" uLine=%u iCtx=%u iRing=%u i=%u uCs=%04x type=%#x\n",uLine, iCtx, iRing, i, uCs, pauInvTypes[iType]);*/929 /*Bs3TestPrintf("g_uLine=%u iCtx=%u iRing=%u i=%u uCs=%04x type=%#x\n", g_uLine, iCtx, iRing, i, uCs, pauInvTypes[iType]);*/ 933 930 paIdt[(0x80 + iCtx) << cIdteShift].Gate.u16Sel = uCs; 934 931 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 935 uLine++; 936 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 937 f16BitSys, pszMode, uLine); 932 g_uLine++; 933 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 938 934 939 935 /* Mark it not-present to check that invalid type takes precedence. */ 940 936 paIdt[(0x80 + iCtx) << cIdteShift].Gate.u1Present = 0; 941 937 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 942 uLine++; 943 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT, 944 f16BitSys, pszMode, uLine); 938 g_uLine++; 939 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, ((0x80 + iCtx) << X86_TRAP_ERR_SEL_SHIFT) | X86_TRAP_ERR_IDT); 945 940 paIdt[(0x80 + iCtx) << cIdteShift].Gate.u1Present = 1; 946 941 } … … 954 949 } 955 950 } 956 BS3_ASSERT( uLine < 62000U &&uLine > 32000U);951 BS3_ASSERT(g_uLine < 62000U && g_uLine > 32000U); 957 952 958 953 … … 978 973 #define bs3CpuBasic2_TssGateEsp_AltStackOuterRing BS3_CMN_NM(bs3CpuBasic2_TssGateEsp_AltStackOuterRing) 979 974 void bs3CpuBasic2_TssGateEsp_AltStackOuterRing(PCBS3REGCTX pCtx, uint8_t bRing, uint8_t *pbAltStack, size_t cbAltStack, 980 bool f16BitStack, bool f16BitTss, bool f16BitHandler, 981 const char *pszMode, unsigned uLine) 975 bool f16BitStack, bool f16BitTss, bool f16BitHandler, unsigned uLine) 982 976 { 983 977 uint8_t const cbIretFrame = f16BitHandler ? 5*2 : 5*4; … … 985 979 BS3TRAPFRAME TrapCtx; 986 980 uint8_t *pbTmp; 981 g_uLine = uLine; 987 982 988 983 Bs3MemCpy(&Ctx2, pCtx, sizeof(Ctx2)); … … 1000 995 Ctx2.rsp.u &= UINT16_MAX; 1001 996 1002 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx2, 0x80 /*bXcpt*/ , pszMode, uLine);997 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx2, 0x80 /*bXcpt*/); 1003 998 CHECK_MEMBER("bCpl", "%u", TrapCtx.Ctx.bCpl, bRing); 1004 999 CHECK_MEMBER("cbIretFrame", "%#x", TrapCtx.cbIretFrame, cbIretFrame); … … 1014 1009 if ( TrapCtx.uHandlerRsp != uExpectedRsp 1015 1010 || TrapCtx.uHandlerSs != (f16BitTss ? Bs3Tss16.ss0 : Bs3Tss32.ss0)) 1016 Bs3TestFailedF("%u - %s: handler SS:ESP=%04x:%08RX64, expected %04x:%08RX16\n", uLine, pszMode,1017 TrapCtx.uHandlerSs, TrapCtx.uHandlerRsp, Bs3Tss16.ss0, uExpectedRsp);1011 bs3CpuBasic2_FailedF("handler SS:ESP=%04x:%08RX64, expected %04x:%08RX16", 1012 TrapCtx.uHandlerSs, TrapCtx.uHandlerRsp, Bs3Tss16.ss0, uExpectedRsp); 1018 1013 1019 1014 pbTmp = (uint8_t *)ASMMemFirstNonZero(pbAltStack, cbAltStack); 1020 1015 if ((f16BitStack || TrapCtx.uHandlerRsp <= UINT16_MAX) && pbTmp != NULL) 1021 Bs3TestFailedF("%u - %s: someone touched the alt stack (%p) with SS:ESP=%04x:%#RX32: %p=%02x\n", uLine, pszMode,1022 pbAltStack, Ctx2.ss, Ctx2.rsp.u32, pbTmp, *pbTmp);1016 bs3CpuBasic2_FailedF("someone touched the alt stack (%p) with SS:ESP=%04x:%#RX32: %p=%02x", 1017 pbAltStack, Ctx2.ss, Ctx2.rsp.u32, pbTmp, *pbTmp); 1023 1018 else if (!f16BitStack && TrapCtx.uHandlerRsp > UINT16_MAX && pbTmp == NULL) 1024 Bs3TestFailedF("%u - %s: the alt stack (%p) was not used SS:ESP=%04x:%#RX32\n", uLine, pszMode, 1025 pbAltStack, Ctx2.ss, Ctx2.rsp.u32); 1019 bs3CpuBasic2_FailedF("the alt stack (%p) was not used SS:ESP=%04x:%#RX32\n", pbAltStack, Ctx2.ss, Ctx2.rsp.u32); 1026 1020 } 1027 1021 } 1028 1022 1029 1023 #define bs3CpuBasic2_TssGateEspCommon BS3_CMN_NM(bs3CpuBasic2_TssGateEspCommon) 1030 void bs3CpuBasic2_TssGateEspCommon(uint8_t const bMode, const char * const pszMode, bool const f16BitSys, 1031 PX86DESC const paIdt, unsigned const cIdteShift) 1024 void bs3CpuBasic2_TssGateEspCommon(bool const g_f16BitSys, PX86DESC const paIdt, unsigned const cIdteShift) 1032 1025 { 1033 1026 BS3TRAPFRAME TrapCtx; … … 1037 1030 uint8_t *pbTmp; 1038 1031 # endif 1039 unsigned uLine;1040 1032 1041 1033 /* make sure they're allocated */ … … 1063 1055 */ 1064 1056 Bs3TrapSetJmpAndRestore(&Ctx, &TrapCtx); 1065 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx, 0x80 /*bXcpt*/, pszMode, __LINE__); 1066 1067 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 1, NULL, 0, f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__); 1068 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 2, NULL, 0, f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__); 1069 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 3, NULL, 0, f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__); 1057 g_uLine = __LINE__; 1058 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx, 0x80 /*bXcpt*/); 1059 1060 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 1, NULL, 0, g_f16BitSys, g_f16BitSys, g_f16BitSys, __LINE__); 1061 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 2, NULL, 0, g_f16BitSys, g_f16BitSys, g_f16BitSys, __LINE__); 1062 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 3, NULL, 0, g_f16BitSys, g_f16BitSys, g_f16BitSys, __LINE__); 1070 1063 1071 1064 /* … … 1079 1072 { 1080 1073 /* same ring */ 1081 uLine = __LINE__;1074 g_uLine = __LINE__; 1082 1075 Bs3MemCpy(&Ctx2, &Ctx, sizeof(Ctx2)); 1083 1076 Ctx2.rsp.u = Bs3SelPtrToFlat(pbAltStack + 0x1980); 1084 1077 if (Bs3TrapSetJmp(&TrapCtx)) 1085 1078 Bs3RegCtxRestore(&Ctx2, 0); /* (does not return) */ 1086 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx2, 0x80 /*bXcpt*/ , pszMode, uLine);1079 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx2, 0x80 /*bXcpt*/); 1087 1080 # if TMPL_BITS == 16 1088 1081 if ((pbTmp = (uint8_t *)ASMMemFirstNonZero(pbAltStack, cbAltStack)) != NULL) 1089 Bs3TestFailedF("%u - %s:someone touched the alt stack (%p) with SS:ESP=%04x:%#RX32: %p=%02x\n",1090 uLine, pszMode,pbAltStack, Ctx2.ss, Ctx2.rsp.u32, pbTmp, *pbTmp);1082 bs3CpuBasic2_FailedF("someone touched the alt stack (%p) with SS:ESP=%04x:%#RX32: %p=%02x\n", 1083 pbAltStack, Ctx2.ss, Ctx2.rsp.u32, pbTmp, *pbTmp); 1091 1084 # else 1092 1085 if (ASMMemIsZero(pbAltStack, cbAltStack)) 1093 Bs3TestFailedF("%u - %s: alt stack wasn't used despite SS:ESP=%04x:%#RX32\n", 1094 uLine, pszMode, Ctx2.ss, Ctx2.rsp.u32); 1086 bs3CpuBasic2_FailedF("alt stack wasn't used despite SS:ESP=%04x:%#RX32\n", Ctx2.ss, Ctx2.rsp.u32); 1095 1087 # endif 1096 1088 1097 1089 /* Different rings (load SS0:SP0 from TSS). */ 1098 1090 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 1, pbAltStack, cbAltStack, 1099 f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__);1091 g_f16BitSys, g_f16BitSys, g_f16BitSys, __LINE__); 1100 1092 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 2, pbAltStack, cbAltStack, 1101 f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__);1093 g_f16BitSys, g_f16BitSys, g_f16BitSys, __LINE__); 1102 1094 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 3, pbAltStack, cbAltStack, 1103 f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__);1095 g_f16BitSys, g_f16BitSys, g_f16BitSys, __LINE__); 1104 1096 1105 1097 /* Different rings but switch the SS bitness in the TSS. */ 1106 if ( f16BitSys)1098 if (g_f16BitSys) 1107 1099 { 1108 1100 Bs3Tss16.ss0 = BS3_SEL_R0_SS32; 1109 1101 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 1, pbAltStack, cbAltStack, 1110 false, f16BitSys, f16BitSys, pszMode, __LINE__);1102 false, g_f16BitSys, g_f16BitSys, __LINE__); 1111 1103 Bs3Tss16.ss0 = BS3_SEL_R0_SS16; 1112 1104 } … … 1115 1107 Bs3Tss32.ss0 = BS3_SEL_R0_SS16; 1116 1108 bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 1, pbAltStack, cbAltStack, 1117 true, f16BitSys, f16BitSys, pszMode, __LINE__);1109 true, g_f16BitSys, g_f16BitSys, __LINE__); 1118 1110 Bs3Tss32.ss0 = BS3_SEL_R0_SS32; 1119 1111 } … … 1122 1114 } 1123 1115 else 1124 Bs3TestPrintf("%s: Skipping ESP check, alloc failed\n", pszMode);1116 Bs3TestPrintf("%s: Skipping ESP check, alloc failed\n", g_pszTestMode); 1125 1117 } 1126 1118 else 1127 Bs3TestPrintf("%s: Skipping ESP check, CPU too old\n", pszMode);1119 Bs3TestPrintf("%s: Skipping ESP check, CPU too old\n", g_pszTestMode); 1128 1120 } 1129 1121 … … 1134 1126 { 1135 1127 uint8_t bRet = 0; 1128 1129 g_pszTestMode = BS3_DATA_NM(TMPL_NM(g_szBs3ModeName)); 1130 g_bTestMode = bMode; 1131 g_f16BitSys = BS3_MODE_IS_16BIT_SYS(TMPL_MODE); 1136 1132 1137 1133 #if TMPL_MODE == BS3_MODE_PE16 \ … … 1142 1138 || TMPL_MODE == BS3_MODE_PAE16_32 \ 1143 1139 || TMPL_MODE == BS3_MODE_PE32 1144 bs3CpuBasic2_TssGateEspCommon(bMode, 1145 BS3_DATA_NM(TMPL_NM(g_szBs3ModeName)), 1146 BS3_MODE_IS_16BIT_SYS(TMPL_MODE), 1140 bs3CpuBasic2_TssGateEspCommon(BS3_MODE_IS_16BIT_SYS(TMPL_MODE), 1147 1141 (PX86DESC)MyBs3Idt, 1148 1142 BS3_MODE_IS_64BIT_SYS(TMPL_MODE) ? 1 : 0); … … 1161 1155 BS3_DECL(uint8_t) TMPL_NM(bs3CpuBasic2_RaiseXcpt1)(uint8_t bMode) 1162 1156 { 1157 g_pszTestMode = BS3_DATA_NM(TMPL_NM(g_szBs3ModeName)); 1158 g_bTestMode = bMode; 1159 g_f16BitSys = BS3_MODE_IS_16BIT_SYS(TMPL_MODE); 1160 1163 1161 #if !BS3_MODE_IS_RM_OR_V86(TMPL_MODE) 1164 uint8_t bRet = 0;1165 1162 1166 1163 /* 1167 1164 * Pass to common worker which is only compiled once per mode. 1168 1165 */ 1169 bs3CpuBasic2_RaiseXcpt1Common(bMode, 1170 BS3_DATA_NM(TMPL_NM(g_szBs3ModeName)), 1171 BS3_MODE_IS_16BIT_SYS(TMPL_MODE), 1166 bs3CpuBasic2_RaiseXcpt1Common(BS3_MODE_IS_16BIT_SYS(TMPL_MODE), 1172 1167 MY_SYS_SEL_R0_CS, 1173 1168 MY_SYS_SEL_R0_CS_CNF, … … 1180 1175 */ 1181 1176 TMPL_NM(Bs3TrapInit)(); 1182 return bRet;1177 return 0; 1183 1178 #elif !BS3_MODE_IS_RM(TMPL_MODE) 1184 1179 … … 1199 1194 BS3_DECL(uint8_t) TMPL_NM(bs3CpuBasic2_iret)(uint8_t bMode) 1200 1195 { 1201 NOREF(bMode); 1196 g_pszTestMode = BS3_DATA_NM(TMPL_NM(g_szBs3ModeName)); 1197 g_bTestMode = bMode; 1198 g_f16BitSys = BS3_MODE_IS_16BIT_SYS(TMPL_MODE); 1199 1202 1200 return BS3TESTDOMODE_SKIPPED; 1203 1201 }
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