Changeset 60295 in vbox for trunk/src/VBox/ValidationKit/bootsectors
- Timestamp:
- Apr 3, 2016 3:00:39 PM (9 years ago)
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.c
r60294 r60295 74 74 75 75 /********************************************************************************************************************************* 76 * Structures and Typedefs * 77 *********************************************************************************************************************************/ 78 #ifndef DONE_MODE_TYPES 79 #define DONE_MODE_TYPES 80 typedef struct BS3CB2INVLDESCTYPE 81 { 82 uint8_t u4Type; 83 uint8_t u1DescType; 84 } BS3CB2INVLDESCTYPE; 85 #endif 86 87 88 /********************************************************************************************************************************* 76 89 * Internal Functions * 77 90 *********************************************************************************************************************************/ … … 80 93 extern BS3_DECL(void) TMPL_NM(bs3CpuBasic2_Int82)(void); 81 94 extern BS3_DECL(void) TMPL_NM(bs3CpuBasic2_Int83)(void); 95 extern BS3_DECL(void) TMPL_NM(bs3CpuBasic2_ud2)(void); 96 extern uint32_t BS3_DATA_NM(g_bs3CpuBasic2_ud2_FlatAddr); 82 97 83 98 … … 86 101 *********************************************************************************************************************************/ 87 102 #if TMPL_MODE == BS3_MODE_RM || TMPL_MODE == BS3_MODE_PE16_32 || TMPL_MODE == BS3_MODE_LM64 103 #define g_pszTestMode BS3_CMN_NM(g_pszTestMode) 88 104 static const char BS3_FAR *g_pszTestMode = (const char *)1; 105 #define g_bTestMode BS3_CMN_NM(g_bTestMode) 89 106 static uint8_t g_bTestMode = 1; 107 #define g_f16BitSys BS3_CMN_NM(g_f16BitSys) 90 108 static bool g_f16BitSys = 1; 109 #define g_uLine BS3_CMN_NM(g_uLine) 91 110 static unsigned g_uLine = 1; 111 112 /** Table containing invalid CS selector types. */ 113 static const BS3CB2INVLDESCTYPE g_aInvalidCsTypes[] = 114 { 115 { X86_SEL_TYPE_RO, 1 }, 116 { X86_SEL_TYPE_RO_ACC, 1 }, 117 { X86_SEL_TYPE_RW, 1 }, 118 { X86_SEL_TYPE_RW_ACC, 1 }, 119 { X86_SEL_TYPE_RO_DOWN, 1 }, 120 { X86_SEL_TYPE_RO_DOWN_ACC, 1 }, 121 { X86_SEL_TYPE_RW_DOWN, 1 }, 122 { X86_SEL_TYPE_RW_DOWN_ACC, 1 }, 123 { 0, 0 }, 124 { 1, 0 }, 125 { 2, 0 }, 126 { 3, 0 }, 127 { 4, 0 }, 128 { 5, 0 }, 129 { 6, 0 }, 130 { 7, 0 }, 131 { 8, 0 }, 132 { 9, 0 }, 133 { 10, 0 }, 134 { 11, 0 }, 135 { 12, 0 }, 136 { 13, 0 }, 137 { 14, 0 }, 138 { 15, 0 }, 139 }; 140 141 /** Table containing invalid SS selector types. */ 142 static const BS3CB2INVLDESCTYPE g_aInvalidSsTypes[] = 143 { 144 { X86_SEL_TYPE_EO, 1 }, 145 { X86_SEL_TYPE_EO_ACC, 1 }, 146 { X86_SEL_TYPE_ER, 1 }, 147 { X86_SEL_TYPE_ER_ACC, 1 }, 148 { X86_SEL_TYPE_EO_CONF, 1 }, 149 { X86_SEL_TYPE_EO_CONF_ACC, 1 }, 150 { X86_SEL_TYPE_ER_CONF, 1 }, 151 { X86_SEL_TYPE_ER_CONF_ACC, 1 }, 152 { 0, 0 }, 153 { 1, 0 }, 154 { 2, 0 }, 155 { 3, 0 }, 156 { 4, 0 }, 157 { 5, 0 }, 158 { 6, 0 }, 159 { 7, 0 }, 160 { 8, 0 }, 161 { 9, 0 }, 162 { 10, 0 }, 163 { 11, 0 }, 164 { 12, 0 }, 165 { 13, 0 }, 166 { 14, 0 }, 167 { 15, 0 }, 168 }; 169 92 170 #endif 93 171 … … 219 297 } 220 298 299 /** 300 * Compares \#UD trap. 301 */ 302 #define bs3CpuBasic2_CompareUdCtx BS3_CMN_NM(bs3CpuBasic2_CompareUdCtx) 303 void bs3CpuBasic2_CompareUdCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx) 304 { 305 bs3CpuBasic2_CompareCpuTrapCtx(pTrapCtx, pStartCtx, 0 /*no error code*/, X86_XCPT_UD); 306 } 307 308 221 309 #define bs3CpuBasic2_RaiseXcpt1Common BS3_CMN_NM(bs3CpuBasic2_RaiseXcpt1Common) 222 310 static void bs3CpuBasic2_RaiseXcpt1Common(bool const g_f16BitSys, … … 230 318 BS3REGCTX Ctx83; 231 319 BS3REGCTX CtxTmp; 320 BS3REGCTX CtxTmp2; 232 321 PBS3REGCTX apCtx8x[4]; 233 322 unsigned iCtx; … … 257 346 258 347 /* make sure they're allocated */ 348 Bs3MemZero(&TrapCtx, sizeof(TrapCtx)); 259 349 Bs3MemZero(&Ctx80, sizeof(Ctx80)); 260 350 Bs3MemZero(&Ctx81, sizeof(Ctx81)); … … 262 352 Bs3MemZero(&Ctx83, sizeof(Ctx83)); 263 353 Bs3MemZero(&CtxTmp, sizeof(CtxTmp)); 264 Bs3MemZero(& TrapCtx, sizeof(TrapCtx));354 Bs3MemZero(&CtxTmp2, sizeof(CtxTmp2)); 265 355 266 356 /* Context array. */ … … 428 518 } 429 519 520 /* Check all the invalid CS selector types alone. */ 521 BS3_DATA_NM(Bs3GdteTestPage00) = BS3_DATA_NM(Bs3Gdt)[uSysR0Cs >> X86_SEL_SHIFT]; 522 for (i = 0; i < RT_ELEMENTS(g_aInvalidCsTypes); i++) 523 { 524 BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type = g_aInvalidCsTypes[i].u4Type; 525 BS3_DATA_NM(Bs3GdteTestPage00).Gen.u1DescType = g_aInvalidCsTypes[i].u1DescType; 526 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 527 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &Ctx80, BS3_SEL_TEST_PAGE_00); 528 if (BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type != g_aInvalidCsTypes[i].u4Type) 529 bs3CpuBasic2_FailedF("Invalid CS type %#x/%u -> %#x/%u\n", 530 g_aInvalidCsTypes[i].u4Type, g_aInvalidCsTypes[i].u1DescType, 531 BS3_DATA_NM(Bs3GdteTestPage00).Gen.u4Type, BS3_DATA_NM(Bs3GdteTestPage00).Gen.u1DescType); 532 g_uLine++; 533 534 /* Incorrect CS.TYPE takes precedence over CS.PRESENT = 0. */ 535 BS3_DATA_NM(Bs3GdteTestPage00).Gen.u1Present = 0; 536 Bs3TrapSetJmpAndRestore(&Ctx80, &TrapCtx); 537 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &Ctx80, BS3_SEL_TEST_PAGE_00); 538 BS3_DATA_NM(Bs3GdteTestPage00).Gen.u1Present = 1; 539 g_uLine++; 540 } 541 430 542 /* Test SS. */ 431 543 if (!BS3_MODE_IS_64BIT_SYS(g_bTestMode)) 432 544 { 433 uint16_t BS3_FAR *puTssSs2 = BS3_MODE_IS_16BIT_SYS(g_bTestMode) ? &BS3_DATA_NM(Bs3Tss16).ss2 : &BS3_DATA_NM(Bs3Tss32).ss2; 434 uint16_t const uSavedSs2 = *puTssSs2; 545 uint16_t BS3_FAR *puTssSs2 = BS3_MODE_IS_16BIT_SYS(g_bTestMode) ? &BS3_DATA_NM(Bs3Tss16).ss2 : &BS3_DATA_NM(Bs3Tss32).ss2; 546 uint16_t const uSavedSs2 = *puTssSs2; 547 X86DESC const SavedGate83 = paIdt[0x83 << cIdteShift]; 548 549 /* Fix CS again. */ 550 BS3_DATA_NM(Bs3GdteTestPage00) = BS3_DATA_NM(Bs3Gdt)[uSysR0Cs >> X86_SEL_SHIFT]; 435 551 436 552 /* Make the handler execute in ring-2. */ … … 446 562 /* Create a SS.DPL=2 stack segment and check that SS2.RPL matters and 447 563 that we get #SS if the selector isn't present. */ 448 BS3_DATA_NM(Bs3GdteTestPage03) = BS3_DATA_NM(Bs3Gdt)[(uSysR0Ss + (2 << BS3_SEL_RING_SHIFT)) >> X86_SEL_SHIFT]; 449 for (iDpl = 0; iDpl < 4; iDpl++) 450 { 451 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u2Dpl = iDpl; 452 for (k = 0; k < 2; k++) 564 i = 0; /* used for cycling thru invalid CS types */ 565 for (k = 0; k < 10; k++) 566 { 567 /* k=0: present, 568 k=1: not-present, 569 k=2: present but very low limit, 570 k=3: not-present, low limit. 571 k=4: present, read-only. 572 k=5: not-present, read-only. 573 k=6: present, code-selector. 574 k=7: not-present, code-selector. 575 k=8: present, read-write / no access + system (=LDT). 576 k=9: not-present, read-write / no access + system (=LDT). 577 */ 578 BS3_DATA_NM(Bs3GdteTestPage03) = BS3_DATA_NM(Bs3Gdt)[(uSysR0Ss + (2 << BS3_SEL_RING_SHIFT)) >> X86_SEL_SHIFT]; 579 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u1Present = !(k & 1); 580 if (k >= 8) 453 581 { 454 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u1Present = k == 0; 582 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u1DescType = 0; /* system */ 583 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type = X86_SEL_TYPE_RW; /* = LDT */ 584 } 585 else if (k >= 6) 586 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type = X86_SEL_TYPE_ER; 587 else if (k >= 4) 588 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type = X86_SEL_TYPE_RO; 589 else if (k >= 2) 590 { 591 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u16LimitLow = 0x400; 592 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4LimitHigh = 0; 593 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u1Granularity = 0; 594 } 595 596 for (iDpl = 0; iDpl < 4; iDpl++) 597 { 598 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u2Dpl = iDpl; 599 455 600 for (iRpl = 0; iRpl < 4; iRpl++) 456 601 { 457 602 *puTssSs2 = BS3_SEL_TEST_PAGE_03 | iRpl; 458 603 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 459 if (iRpl != 2 || iRpl != iDpl )604 if (iRpl != 2 || iRpl != iDpl || k >= 4) 460 605 bs3CpuBasic2_CompareTsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03); 461 606 else if (k != 0) … … 489 634 g_uLine++; 490 635 636 /* Make the CS selector some invalid type and check it triggers before SS stuff. */ 637 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u4Type = g_aInvalidCsTypes[i].u4Type; 638 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u1DescType = g_aInvalidCsTypes[i].u1DescType; 639 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 640 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_02); 641 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u4Type = X86_SEL_TYPE_ER_ACC; 642 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u1DescType = 1; 643 g_uLine++; 644 491 645 /* Now, make the CS selector limit too small and that it triggers after SS trouble. */ 492 646 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u16LimitLow = 0; … … 494 648 BS3_DATA_NM(Bs3GdteTestPage02).Gen.u1Granularity = 0; 495 649 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 496 if (iRpl != 2 || iRpl != iDpl )650 if (iRpl != 2 || iRpl != iDpl || k >= 4) 497 651 bs3CpuBasic2_CompareTsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03); 498 652 else if (k != 0) … … 506 660 } 507 661 508 /** @todo check the SS to a expand down thingy. Check that the limit 509 * checking works. Then check what happens as we move the 510 * limit thru the IRET frame area. */ 662 /* Check all the invalid SS selector types alone. */ 663 BS3_DATA_NM(Bs3GdteTestPage02) = BS3_DATA_NM(Bs3Gdt)[(uSysR0Cs + (2 << BS3_SEL_RING_SHIFT)) >> X86_SEL_SHIFT]; 664 BS3_DATA_NM(Bs3GdteTestPage03) = BS3_DATA_NM(Bs3Gdt)[(uSysR0Ss + (2 << BS3_SEL_RING_SHIFT)) >> X86_SEL_SHIFT]; 665 *puTssSs2 = BS3_SEL_TEST_PAGE_03 | 2; 666 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 667 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83); 668 g_uLine++; 669 for (i = 0; i < RT_ELEMENTS(g_aInvalidSsTypes); i++) 670 { 671 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type = g_aInvalidSsTypes[i].u4Type; 672 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u1DescType = g_aInvalidSsTypes[i].u1DescType; 673 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 674 bs3CpuBasic2_CompareTsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03); 675 if (BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type != g_aInvalidSsTypes[i].u4Type) 676 bs3CpuBasic2_FailedF("Invalid SS type %#x/%u -> %#x/%u\n", 677 g_aInvalidSsTypes[i].u4Type, g_aInvalidSsTypes[i].u1DescType, 678 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type, BS3_DATA_NM(Bs3GdteTestPage03).Gen.u1DescType); 679 g_uLine++; 680 } 681 682 /* 683 * Continue the SS experiments with a expand down segment. We'll use 684 * the same setup as we already have with gate 83h being DPL and 685 * having CS.DPL=2. 686 * 687 * Expand down segments are weird. The valid area is practically speaking 688 * reversed. So, a 16-bit segment with a limit of 0x6000 will have valid 689 * addresses from 0xffff thru 0x6001. 690 * 691 * So, with expand down segments we can more easily cut partially into the 692 * pushing of the iret frame and trigger more interesting behavior than 693 * with regular "expand up" segments where the whole pushing area is either 694 * all fine or not not fine. 695 */ 696 BS3_DATA_NM(Bs3GdteTestPage02) = BS3_DATA_NM(Bs3Gdt)[(uSysR0Cs + (2 << BS3_SEL_RING_SHIFT)) >> X86_SEL_SHIFT]; 697 BS3_DATA_NM(Bs3GdteTestPage03) = BS3_DATA_NM(Bs3Gdt)[(uSysR0Ss + (2 << BS3_SEL_RING_SHIFT)) >> X86_SEL_SHIFT]; 698 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u2Dpl = 2; 699 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4Type = X86_SEL_TYPE_RW_DOWN; 700 *puTssSs2 = BS3_SEL_TEST_PAGE_03 | 2; 701 702 /* First test, limit = max --> no bytes accessible --> #GP */ 703 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 704 bs3CpuBasic2_CompareSsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03); 705 706 /* Second test, limit = 0 --> all by zero byte accessible --> works */ 707 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u16LimitLow = 0; 708 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u4LimitHigh = 0; 709 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 710 bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &CtxTmp, 0x83); 711 712 /* Modify the gate handler to be a dummy that immediately does UD2 713 and triggers #UD, then advance the limit down till we get the #UD. */ 714 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u1Granularity = 0; 715 716 Bs3MemCpy(&CtxTmp2, &CtxTmp, sizeof(CtxTmp2)); /* #UD result context */ 717 if (g_f16BitSys) 718 { 719 CtxTmp2.rip.u = BS3_DATA_NM(g_bs3CpuBasic2_ud2_FlatAddr) - BS3_ADDR_BS3TEXT16; 720 Bs3Trap16SetGate(0x83, X86_SEL_TYPE_SYS_286_INT_GATE, 3, BS3_SEL_TEST_PAGE_02, CtxTmp2.rip.u16, 0 /*cParams*/); 721 CtxTmp2.rsp.u = BS3_DATA_NM(Bs3Tss16).sp2 - 2*5; 722 } 723 else 724 { 725 CtxTmp2.rip.u = BS3_DATA_NM(g_bs3CpuBasic2_ud2_FlatAddr); 726 Bs3Trap32SetGate(0x83, X86_SEL_TYPE_SYS_386_INT_GATE, 3, BS3_SEL_TEST_PAGE_02, CtxTmp2.rip.u32, 0 /*cParams*/); 727 CtxTmp2.rsp.u = BS3_DATA_NM(Bs3Tss32).esp2 - 4*5; 728 } 729 CtxTmp2.bMode = g_bTestMode; /* g_bBs3CurrentMode not changed by the UD2 handler. */ 730 CtxTmp2.cs = BS3_SEL_TEST_PAGE_02 | 2; 731 CtxTmp2.ss = BS3_SEL_TEST_PAGE_03 | 2; 732 CtxTmp2.bCpl = 2; 733 734 /* test run. */ 735 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 736 bs3CpuBasic2_CompareUdCtx(&TrapCtx, &CtxTmp2); 737 g_uLine++; 738 739 /* Real run. */ 740 i = (g_f16BitSys ? 2 : 4) * 6 + 1; 741 while (i-- > 0) 742 { 743 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u16LimitLow = CtxTmp2.rsp.u16 + i - 1; 744 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 745 if (i > 0) 746 bs3CpuBasic2_CompareSsCtx(&TrapCtx, &CtxTmp, BS3_SEL_TEST_PAGE_03); 747 else 748 bs3CpuBasic2_CompareUdCtx(&TrapCtx, &CtxTmp2); 749 g_uLine++; 750 } 751 752 /* Do a run where we do the same-ring kind of access. */ 753 Bs3RegCtxConvertToRingX(&CtxTmp, 2); 754 if (g_f16BitSys) 755 { 756 CtxTmp2.rsp.u32 = CtxTmp.rsp.u32 - 2*3; 757 i = 2*3 - 1; 758 } 759 else 760 { 761 CtxTmp2.rsp.u32 = CtxTmp.rsp.u32 - 4*3; 762 i = 4*3 - 1; 763 } 764 CtxTmp.ss = BS3_SEL_TEST_PAGE_03 | 2; 765 CtxTmp2.ds = CtxTmp.ds; 766 CtxTmp2.es = CtxTmp.es; 767 CtxTmp2.fs = CtxTmp.fs; 768 CtxTmp2.gs = CtxTmp.gs; 769 while (i-- > 0) 770 { 771 BS3_DATA_NM(Bs3GdteTestPage03).Gen.u16LimitLow = CtxTmp2.rsp.u16 + i - 1; 772 Bs3TrapSetJmpAndRestore(&CtxTmp, &TrapCtx); 773 if (i > 0) 774 bs3CpuBasic2_CompareSsCtx(&TrapCtx, &CtxTmp, 0 /*BS3_SEL_TEST_PAGE_03*/); 775 else 776 bs3CpuBasic2_CompareUdCtx(&TrapCtx, &CtxTmp2); 777 g_uLine++; 778 } 511 779 512 780 *puTssSs2 = uSavedSs2; 513 paIdt[0x83 << cIdteShift] .Gate.u16Sel = uSysR0Cs;781 paIdt[0x83 << cIdteShift] = SavedGate83; 514 782 } 515 783 paIdt[0x80 << cIdteShift].Gate.u16Sel = uSysR0Cs; 784 BS3_ASSERT(g_uLine < 3000); 516 785 517 786 /* 518 787 * Modify the gate CS value with a conforming segment. 519 788 */ 520 g_uLine = 2000;789 g_uLine = 3000; 521 790 for (i = 0; i <= 3; i++) /* cs.dpl */ 522 791 { … … 551 820 } 552 821 } 553 BS3_ASSERT(g_uLine < 3 000);822 BS3_ASSERT(g_uLine < 3500); 554 823 555 824 /* … … 558 827 if (cIdteShift != 0) 559 828 { 560 g_uLine = 3 000;829 g_uLine = 3500; 561 830 for (i = 0; i <= 3; i++) 562 831 { -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac
r60194 r60295 29 29 30 30 31 ;********************************************************************************************************************************* 32 ;* External Symbols * 33 ;********************************************************************************************************************************* 31 34 %undef Bs3Printf 32 35 BS3_EXTERN_CMN Bs3Printf 33 36 37 38 39 TMPL_BEGIN_TEXT 34 40 35 41 %if 0 ; Will be doing the testing in C, I think. … … 98 104 99 105 100 101 106 %include "bs3kit-template-footer.mac" ; reset environment 102 107 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2.asm
r60002 r60295 32 32 33 33 34 ;********************************************************************************************************************************* 35 ;* Global Variables * 36 ;********************************************************************************************************************************* 37 BS3_BEGIN_DATA16 38 BS3_GLOBAL_DATA g_bs3CpuBasic2_ud2_FlatAddr, 4 39 dd bs3CpuBasic2_ud2 wrt FLAT 40 41 42 BS3_BEGIN_TEXT16 43 BS3_PROC_BEGIN bs3CpuBasic2_ud2 44 .again: 45 ud2 46 jmp .again 47 BS3_PROC_END bs3CpuBasic2_ud2 48 49 50 34 51 ;BS3_INSTANTIATE_COMMON_TEMPLATE "bs3-cpu-basic-2-template.mac" 35 52 BS3_INSTANTIATE_TEMPLATE_WITH_WEIRD_ONES "bs3-cpu-basic-2-template.mac" 36 53 54 -
trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-mode-TestDoModesHlp.asm
r60292 r60295 286 286 STRICT_CHECK_REGS 287 287 288 push BS3_MODE_ RM288 push BS3_MODE_PE16_32 289 289 call eax 290 290
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