Changeset 60404 in vbox for trunk/src/VBox/Devices/Input

Timestamp:

Apr 9, 2016 11:45:55 PM (9 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

106490

Message:

VMM,Devices,Main: Implemented soft/warm reset for shutdown status codes 05h, 09h and 0Ah.

This is a shot at adjusting our VM reset handling to handle the ancient way of
getting a 286 out of protected mode and back to real mode. Our exiting reset
code (XXXR3Reset, PDMDEVREG::pfnReset, and so on) is doing a cold reset of the
system and then some additional device & memory initialization that the firmware
is usually responsible for doing. When the guest triggers a reset via the
keyboard controller, system control port A, CPU triple fault, and possibly ACPI,
only the CPU is supposed to be reset. The BIOS would then decide whether memory
and devices needed resetting as well, or if the resetter justed wanted to get out
protected mode and resume executing some real mode code pointed to by 467h.

• New states SOFT_RESETTING and SOFT_RESETTING_LS. The latter returns to RUNNING_LS, not SUSPENDED_LS like for hard reset.
• Added a firmware interface so the VMM/PDM can ask it whether we're supposed to do a hard reset or a soft(/warm) one.
• Implemented firmware interface for the PC BIOS (but not EFI). It indicates soft(/warm) reset when CMOS[0xf] is 5, 9 or 10.
• Moved the CMOS[0xf] resetting from the RTC device to the PC BIOS since it's firmware thing, not RTC.
• Added a flag parameter to PDMDevHlpVMReset for specifying the source of the reset operation. One class of sources (GIM) will always trigger hard resets, whereas the others will check with the firmware first.
• Added PDMR3GetResetInfo for query the flags passed to PDMDevHlpVMReset and for asking the firmware whether it's a hard or soft reset. The latter, however, is only done if only CPU 0 is active. Systems with more than one CPU in a state other than EMSTATE_WAIT_SIPI status will always be hard reset.
• Added internal VMR3ResetFF and VMR3ResetTripleFault APIs for handling the VM_FF_RESET and VINF_EM_TRIPLE_FAULT conditions.
• Added PMDR3ResetSoft and had it call pfnSoftReset (which is now defined).

Warning! Major PDM_DEVHLPR3_VERSION change, minor PDM_DEVREG_VERSION change.

File:

• trunk/src/VBox/Devices/Input/DevPS2.cpp (modified) (3 diffs)

trunk/src/VBox/Devices/Input/DevPS2.cpp

@@ -548 +548 @@
 #else /* IN_RING3 */
         LogRel(("Reset initiated by keyboard controller\n"));
-        rc = PDMDevHlpVMReset(s->CTX_SUFF(pDevIns));
+        rc = PDMDevHlpVMReset(s->CTX_SUFF(pDevIns), PDMVMRESET_F_KBD);
 #endif /* !IN_RING3 */
         break;
@@ -556 +556 @@
     /* Make OS/2 happy. */
     /* The 8042 RAM is readable using commands 0x20 thru 0x3f, and writable
-       by 0x60 thru 0x7f. Now days only the firs byte, the mode, is used.
+       by 0x60 thru 0x7f. Now days only the first byte, the mode, is used.
        We'll ignore the writes (0x61..7f) and return 0 for all the reads
        just to make some OS/2 debug stuff a bit happier. */
@@ -1016 +1016 @@
             rc = VINF_IOM_R3_IOPORT_WRITE;
 # else
-            rc = PDMDevHlpVMReset(s->CTX_SUFF(pDevIns));
+            rc = PDMDevHlpVMReset(s->CTX_SUFF(pDevIns), PDMVMRESET_F_KBD);
 # endif
         }