Changeset 60542 in vbox for trunk/src/VBox/VMM/VMMR3

Timestamp:

Apr 18, 2016 3:02:26 PM (9 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

106671

Message:

VMM/APIC: Much fun with alignment and sizes.

File:

• trunk/src/VBox/VMM/VMMR3/APIC.cpp (modified) (6 diffs)

trunk/src/VBox/VMM/VMMR3/APIC.cpp

@@ -207 +207 @@
     memset((void *)&pX2ApicPage->self_ipi, 0, sizeof(pX2ApicPage->self_ipi));
 
-    /* Clear the posted interrupt bitmaps. */
+    /* Clear the pending-interrupt bitmaps. */
     PAPICCPU pApicCpu = VMCPU_TO_APICCPU(pVCpu);
     memset((void *)&pApicCpu->ApicPibLevel, 0, sizeof(APICPIB));
@@ -251 +251 @@
     LogFlow(("APIC%u: APICR3Reset\n", pVCpu->idCpu));
 
-#ifdef RT_STRICT
+#ifdef VBOX_STRICT
     /* Verify that the initial APIC ID reported via CPUID matches our VMCPU ID assumption. */
-    CPUMCPUIDLEAF CpuLeaf;
-    int rc = CPUMR3CpuIdGetLeaf(pVCpu->CTX_SUFF(pVM), &CpuLeaf, 1, 0);
-    AssertRC(rc);
-    Assert(((CpuLeaf.uEbx >> 24) & 0xff) == pVCpu->idCpu);
+    uint32_t uEax, uEbx, uEcx, uEdx;
+    uEax = uEbx = uEcx = uEdx = UINT32_MAX;
+    CPUMGetGuestCpuId(pVCpu, 1, 0, &uEax, &uEbx, &uEcx, &uEdx);
+    Assert(((uEbx >> 24) & 0xff) == pVCpu->idCpu);
 #endif
 
+    /*
+     * The state following a power-up or reset is a superset of the INIT state.
+     * See Intel spec. 10.4.7.3 "Local APIC State After an INIT Reset ('Wait-for-SIPI' State)"
+     */
     apicR3InitIpi(pVCpu);
-
-    PXAPICPAGE pXApicPage = VMCPU_TO_XAPICPAGE(pVCpu);
 
     /*
@@ -268 +270 @@
      * The version determines the number of LVT entries and size of the APIC ID (8 bits for P4).
      */
+    PXAPICPAGE pXApicPage = VMCPU_TO_XAPICPAGE(pVCpu);
 #if XAPIC_HARDWARE_VERSION == XAPIC_HARDWARE_VERSION_P4
     pXApicPage->version.u.u8MaxLvtEntry = XAPIC_MAX_LVT_ENTRIES_P4 - 1;
@@ -276 +279 @@
 #endif
 
-    /** @todo It isn't very clear where the default base address is (re)initialized,
-     *        atm we do it here in Reset. */
+    /** @todo It isn't clear in the spec. where exactly the default base address
+     *        is (re)initialized, atm we do it here in Reset. */
     apicR3ResetBaseMsr(pVCpu);
 
@@ -985 +988 @@
             SupApicPage.Phys = NIL_RTHCPHYS;
 
+            Assert(pVCpu->idCpu == idCpu);
             Assert(pApicCpu->pvApicPageR3 == NIL_RTR0PTR);
             Assert(pApicCpu->pvApicPageR0 == NIL_RTR0PTR);
@@ -1154 +1158 @@
     pApic->pApicDevRC   = PDMINS_2_DATA_RCPTR(pDevIns);
 
-    rc = apicR3InitState(pVM);
-    AssertRCReturn(rc, rc);
+    apicR3InitState(pVM);
 
     /*