Changeset 60619 in vbox

Timestamp:

Apr 21, 2016 11:32:01 AM (9 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

106767

Message:

VMM/APIC: CTX_SUFF nit.

File:

• trunk/src/VBox/VMM/VMMAll/APICAll.cpp (modified) (11 diffs)

trunk/src/VBox/VMM/VMMAll/APICAll.cpp

@@ -1304 +1304 @@
      */
     PCAPICCPU pApicCpu = VMCPU_TO_APICCPU(pVCpu);
-    PTMTIMER  pTimer   = CTX_SUFF(pApicCpu->pTimer);
+    PTMTIMER  pTimer   = pApicCpu->CTX_SUFF(pTimer);
 
     int rc = TMTimerLock(pTimer, rcBusy);
@@ -1339 +1339 @@
     VMCPU_ASSERT_EMT(pVCpu);
 
-    PAPIC      pApic      = VM_TO_APIC(CTX_SUFF(pVCpu->pVM));
+    PAPIC      pApic      = VM_TO_APIC(pVCpu->CTX_SUFF(pVM));
     PAPICCPU   pApicCpu   = VMCPU_TO_APICCPU(pVCpu);
     PXAPICPAGE pXApicPage = VMCPU_TO_XAPICPAGE(pVCpu);
-    PTMTIMER   pTimer     = CTX_SUFF(pApicCpu->pTimer);
+    PTMTIMER   pTimer     = pApicCpu->CTX_SUFF(pTimer);
 
     /* In TSC-deadline mode, timer ICR writes are ignored, see Intel spec. 10.5.4.1 "TSC-Deadline Mode". */
@@ -1396 +1396 @@
      * and raise #GP(0) in x2APIC mode.
      */
-    PCAPIC pApic = VM_TO_APIC(CTX_SUFF(pVCpu->pVM));
+    PCAPIC pApic = VM_TO_APIC(pVCpu->CTX_SUFF(pVM));
     if (offLvt == XAPIC_OFF_LVT_TIMER)
     {
@@ -2378 +2378 @@
 VMMDECL(void) APICSetInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType)
 {
-    PVM      pVM      = CTX_SUFF(pVCpu->pVM);
+    PVM      pVM      = pVCpu->CTX_SUFF(pVM);
     PAPICDEV pApicDev = VM_TO_APICDEV(pVM);
     CTX_SUFF(pApicDev->pApicHlp)->pfnSetInterruptFF(pApicDev->CTX_SUFF(pDevIns), enmType, pVCpu->idCpu);
@@ -2392 +2392 @@
 VMMDECL(void) APICClearInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType)
 {
-    PVM      pVM      = CTX_SUFF(pVCpu->pVM);
+    PVM      pVM      = pVCpu->CTX_SUFF(pVM);
     PAPICDEV pApicDev = VM_TO_APICDEV(pVM);
-    CTX_SUFF(pApicDev->pApicHlp)->pfnClearInterruptFF(pApicDev->CTX_SUFF(pDevIns), enmType, pVCpu->idCpu);
+    pApicDev->CTX_SUFF(pApicHlp)->pfnClearInterruptFF(pApicDev->CTX_SUFF(pDevIns), enmType, pVCpu->idCpu);
 }
 
@@ -2481 +2481 @@
 {
     Assert(pApicCpu);
-    Assert(TMTimerIsLockOwner(CTX_SUFF(pApicCpu->pTimer)));
+    Assert(TMTimerIsLockOwner(pApicCpu->CTX_SUFF(pTimer)));
     Assert(uInitialCount > 0);
 
@@ -2494 +2494 @@
      * tick.
      */
-    PTMTIMER pTimer = CTX_SUFF(pApicCpu->pTimer);
+    PTMTIMER pTimer = pApicCpu->CTX_SUFF(pTimer);
     TMTimerSetRelative(pTimer, cTicksToNext, &pApicCpu->u64TimerInitial);
     apicHintTimerFreq(pApicCpu, uInitialCount, uTimerShift);
@@ -2509 +2509 @@
 {
     Assert(pApicCpu);
-    Assert(TMTimerIsLockOwner(CTX_SUFF(pApicCpu->pTimer)));
-
-    PTMTIMER pTimer = CTX_SUFF(pApicCpu->pTimer);
+    Assert(TMTimerIsLockOwner(pApicCpu->CTX_SUFF(pTimer)));
+
+    PTMTIMER pTimer = pApicCpu->CTX_SUFF(pTimer);
     TMTimerStop(pTimer);    /* This will reset the hint, no need to explicitly call TMTimerSetFrequencyHint(). */
     pApicCpu->uHintedTimerInitialCount = 0;
@@ -2572 +2572 @@
     VMCPU_ASSERT_EMT(pVCpu);
 
-    PAPIC pApic = VM_TO_APIC(CTX_SUFF(pVCpu->pVM));
+    PVM   pVM   = pVCpu->CTX_SUFF(pVM);
+    PAPIC pApic = VM_TO_APIC(pVM);
     Assert(!pApic->fVirtApicRegsEnabled);
     NOREF(pApic);
@@ -2603 +2604 @@
     VMCPU_ASSERT_EMT(pVCpu);
 
-    PAPIC pApic = VM_TO_APIC(CTX_SUFF(pVCpu->pVM));
+    PVM   pVM   = pVCpu->CTX_SUFF(pVM);
+    PAPIC pApic = VM_TO_APIC(pVM);
     Assert(!pApic->fVirtApicRegsEnabled);
     NOREF(pApic);
@@ -2639 +2641 @@
             break;
 
-        PAPICPIB pPib = (PAPICPIB)CTX_SUFF(pApicCpu->pvApicPib);
+        PAPICPIB pPib = (PAPICPIB)pApicCpu->CTX_SUFF(pvApicPib);
         AssertCompile(RT_ELEMENTS(pXApicPage->irr.u) == 2 * RT_ELEMENTS(pPib->aVectorBitmap));