Changeset 60666 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Apr 22, 2016 11:48:40 PM (9 years ago)

Author:

vboxsync

Message:

IEM: Use IEM_GET_TARGET_CPU(); 486 ignores CR0 bits too.

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAllCImpl.cpp.h (modified) (9 diffs)
• IEMAllInstructions.cpp.h (modified) (6 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

@@ -561 +561 @@
     {
         case IEMMODE_16BIT:
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
             AssertCompile(IEMTARGETCPU_8086 <= IEMTARGETCPU_186 && IEMTARGETCPU_V20 <= IEMTARGETCPU_186 && IEMTARGETCPU_286 > IEMTARGETCPU_186);
-            if (pIemCpu->uTargetCpu <= IEMTARGETCPU_186)
+            if (IEM_GET_TARGET_CPU(pIemCpu) <= IEMTARGETCPU_186)
                 fEfl |= UINT16_C(0xf000);
-#endif
             rcStrict = iemMemStackPushU16(pIemCpu, (uint16_t)fEfl);
             break;
@@ -677 +675 @@
                 fEflNew = u16Value | (fEflOld & UINT32_C(0xffff0000));
 
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
                 /*
                  * Ancient CPU adjustments:
@@ -689 +686 @@
                  *    therefore be used to detect 286 or 386 CPU in real mode.
                  */
-                if (   pIemCpu->uTargetCpu == IEMTARGETCPU_286
+                if (   IEM_GET_TARGET_CPU(pIemCpu) == IEMTARGETCPU_286
                     && !(pCtx->cr0 & X86_CR0_PE) )
                     fEflNew &= ~(X86_EFL_NT | X86_EFL_IOPL);
-#endif
                 break;
             }
@@ -2776 +2772 @@
                    | X86_EFL_RF /*| X86_EFL_VM*/ | X86_EFL_AC /*|X86_EFL_VIF*/ /*|X86_EFL_VIP*/
                    | X86_EFL_ID;
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
-        if (pIemCpu->uTargetCpu <= IEMTARGETCPU_386)
+        if (IEM_GET_TARGET_CPU(pIemCpu) <= IEMTARGETCPU_386)
             uNewFlags &= ~(X86_EFL_AC | X86_EFL_ID | X86_EFL_VIF | X86_EFL_VIP);
-#endif
         uNewFlags |= Efl.u & (X86_EFL_VM | X86_EFL_VIF | X86_EFL_VIP | X86_EFL_1);
     }
@@ -2795 +2789 @@
         /** @todo The intel pseudo code does not indicate what happens to
          *        reserved flags. We just ignore them. */
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
         /* Ancient CPU adjustments: See iemCImpl_popf. */
-        if (pIemCpu->uTargetCpu == IEMTARGETCPU_286)
+        if (IEM_GET_TARGET_CPU(pIemCpu) == IEMTARGETCPU_286)
             uNewFlags &= ~(X86_EFL_NT | X86_EFL_IOPL);
-#endif
     }
     /** @todo Check how this is supposed to work if sp=0xfffe. */
@@ -3263 +3255 @@
         else if (pIemCpu->uCpl <= pCtx->eflags.Bits.u2IOPL)
             fEFlagsMask |= X86_EFL_IF;
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
-        if (pIemCpu->uTargetCpu <= IEMTARGETCPU_386)
+        if (IEM_GET_TARGET_CPU(pIemCpu) <= IEMTARGETCPU_386)
             fEFlagsMask &= ~(X86_EFL_AC | X86_EFL_ID | X86_EFL_VIF | X86_EFL_VIP);
-#endif
         uint32_t fEFlagsNew = IEMMISC_GET_EFL(pIemCpu, pCtx);
         fEFlagsNew         &= ~fEFlagsMask;
@@ -3339 +3329 @@
         else if (pIemCpu->uCpl <= NewEfl.Bits.u2IOPL)
             fEFlagsMask |= X86_EFL_IF;
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
-        if (pIemCpu->uTargetCpu <= IEMTARGETCPU_386)
+        if (IEM_GET_TARGET_CPU(pIemCpu) <= IEMTARGETCPU_386)
             fEFlagsMask &= ~(X86_EFL_AC | X86_EFL_ID | X86_EFL_VIF | X86_EFL_VIP);
-#endif
         NewEfl.u           &= ~fEFlagsMask;
         NewEfl.u           |= fEFlagsMask & uNewFlags;
@@ -4808 +4796 @@
         case 0:
             crX = pCtx->cr0;
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
-            if (pIemCpu->uTargetCpu <= IEMTARGETCPU_386)
+            if (IEM_GET_TARGET_CPU(pIemCpu) <= IEMTARGETCPU_386)
                 crX |= UINT32_C(0x7fffffe0); /* All reserved CR0 flags are set on a 386, just like MSW on 286. */
-#endif
             break;
         case 2: crX = pCtx->cr2; break;
@@ -4865 +4851 @@
              */
             uint64_t const uOldCrX = pCtx->cr0;
+            uint32_t const fValid  = X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS
+                                   | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM
+                                   | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG;
 
             /* ET is hardcoded on 486 and later. */
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
-            if (pIemCpu->uTargetCpu >= IEMTARGETCPU_486)
-#endif
-                uNewCrX |= X86_CR0_ET; /* hardcoded on 486+ */
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
-            /* The 386 didn't #GP(0) on attempting to set reserved CR0 bits. ET was settable. */
+            if (IEM_GET_TARGET_CPU(pIemCpu) > IEMTARGETCPU_486)
+                uNewCrX |= X86_CR0_ET;
+            /* The 386 and 486 didn't #GP(0) on attempting to set reserved CR0 bits. ET was settable on 386. */
+            else if (IEM_GET_TARGET_CPU(pIemCpu) == IEMTARGETCPU_486)
+            {
+                uNewCrX &= fValid;
+                uNewCrX |= X86_CR0_ET;
+            }
             else
                 uNewCrX &= X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG | X86_CR0_ET;
-#endif
 
             /* Check for reserved bits. */
-            uint32_t const fValid = X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS
-                                  | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM
-                                  | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG;
             if (uNewCrX & ~(uint64_t)fValid)
             {

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -976 +976 @@
                 IEM_MC_LOCAL(uint16_t, u16Tmp);
                 IEM_MC_FETCH_CR0_U16(u16Tmp);
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
-                if (pIemCpu->uTargetCpu > IEMTARGETCPU_386)
+                if (IEM_GET_TARGET_CPU(pIemCpu) > IEMTARGETCPU_386)
                 { /* likely */ }
-                else if (pIemCpu->uTargetCpu >= IEMTARGETCPU_386)
+                else if (IEM_GET_TARGET_CPU(pIemCpu) >= IEMTARGETCPU_386)
                     IEM_MC_OR_LOCAL_U16(u16Tmp, 0xffe0);
                 else
                     IEM_MC_OR_LOCAL_U16(u16Tmp, 0xfff0);
-#endif
                 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Tmp);
                 IEM_MC_ADVANCE_RIP();
@@ -1018 +1016 @@
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
         IEM_MC_FETCH_CR0_U16(u16Tmp);
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
-        if (pIemCpu->uTargetCpu > IEMTARGETCPU_386)
+        if (IEM_GET_TARGET_CPU(pIemCpu) > IEMTARGETCPU_386)
         { /* likely */ }
         else if (pIemCpu->uTargetCpu >= IEMTARGETCPU_386)
@@ -1025 +1022 @@
         else
             IEM_MC_OR_LOCAL_U16(u16Tmp, 0xfff0);
-#endif
         IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Tmp);
         IEM_MC_ADVANCE_RIP();
@@ -8010 +8006 @@
 {
     IEMOP_MNEMONIC("push rSP");
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
-    if (pIemCpu->uTargetCpu == IEMTARGETCPU_8086)
+    if (IEM_GET_TARGET_CPU(pIemCpu) == IEMTARGETCPU_8086)
     {
         IEM_MC_BEGIN(0, 1);
@@ -8021 +8016 @@
         IEM_MC_END();
     }
-#endif
     return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xSP);
 }
@@ -16391 +16385 @@
 {
     IEMOP_HLP_NO_LOCK_PREFIX();
-#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC && 0
-    if (   pIemCpu->uTargetCpu == IEMTARGETCPU_CURRENT
-        && pIemCpu->CTX_SUFF(pCtx)->cs.Sel <= 1000)
-    {
-        pIemCpu->uTargetCpu = IEMTARGETCPU_286;
-        LogAlways(("\niemOp_hlt: Enabled CPU restrictions!\n\n"));
-    }
-#endif
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_hlt);
 }