Changeset 60672 in vbox for trunk/src/VBox/ValidationKit/bootsectors
- Timestamp:
- Apr 23, 2016 12:46:13 AM (9 years ago)
- svn:sync-xref-src-repo-rev:
- 106840
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-mode-CpuDetect.asm
r60668 r60672 56 56 push xBP 57 57 mov xBP, xSP 58 pushf 59 push xCX 60 push xDX 61 push xBX 58 pushf ; xBP - xCB*1 59 push xCX ; xBP - xCB*2 60 push xDX ; xBP - xCB*3 61 push xBX ; xBP - xCB*4 62 sub xSP, 20h ; xBP - xCB*4 - 20h 62 63 63 64 %ifndef TMPL_CMN_PAGING … … 131 132 ; turned out the 386SX and AMD 486DX-40 also sets bits 4 thru 15 when 132 133 ; using SMSW. So, nothing conclusive to distinguish 386 from 286, but 133 ; we've probably got a sa ve 486+ detection here.134 ; we've probably got a safe 486+ detection here. 134 135 ; 135 136 ;; @todo check if LOADALL can set any of the reserved bits on a 286 or 386. … … 138 139 jz .486plus 139 140 141 ; 142 ; The 286 stores 0xff in the high byte of the SIDT and SGDT base 143 ; address (since it only did 24-bit addressing and the top 8-bit was 144 ; reserved for the 386). This test prays for no NMIs while we 145 ; potentially modify the SIDT base (not an issue for bs3kit). 146 ; 147 cli 148 mov ax, 00ffh 149 sidt [xBP - xCB*4 - 20h] 150 xchg ah, [xBP - xCB*4 - 20h + 2 + 3] 151 cmp ah, al 152 jne .386plus 153 %if 1 154 lidt [xBP - xCB*4 - 20h] 155 sidt [xBP - xCB*4 - 20h] 156 xchg ah, [xBP - xCB*4 - 20h + 2 + 3] 157 lidt [xBP - xCB*4 - 20h] 158 cmp ah, al 159 jne .386plus 160 %else 140 161 ; 141 162 ; Detect 80286 by checking whether the IOPL and NT bits of EFLAGS can be … … 171 192 ; by a flaky POPF implementation, we assume this isn't the case in our 172 193 ; execution environment. 173 194 %endif 174 195 .is_286: 175 196 mov ax, BS3CPU_80286 … … 301 322 ; Epilogue. 302 323 ; 324 add xSP, 20h 303 325 pop xBX 304 326 pop xDX
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