- Timestamp:
- May 5, 2016 5:47:40 PM (9 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r60847 r60852 439 439 static VBOXSTRICTRC iomIOPortRing3WritePending(PVMCPU pVCpu, RTIOPORT Port, uint32_t u32Value, size_t cbValue) 440 440 { 441 Log(("iomIOPortRing3WritePending: %#x LB %u -> %RTiop\n", u32Value, cbValue, Port)); 441 442 AssertReturn(pVCpu->iom.s.PendingIOPortWrite.cbValue == 0, VERR_IOM_IOPORT_IPE_1); 442 443 pVCpu->iom.s.PendingIOPortWrite.IOPort = Port; -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r59073 r60852 234 234 return false; 235 235 } 236 237 238 #ifndef IN_RING3 239 /** 240 * Defers a pending MMIO write to ring-3. 241 * 242 * @returns VINF_IOM_R3_MMIO_COMMIT_WRITE 243 * @param pVCpu The cross context virtual CPU structure of the calling EMT. 244 * @param GCPhys The write address. 245 * @param pvBuf The bytes being written. 246 * @param cbBuf How many bytes. 247 * @param pRange The range, if resolved. 248 */ 249 static VBOXSTRICTRC iomMmioRing3WritePending(PVMCPU pVCpu, RTGCPHYS GCPhys, void const *pvBuf, size_t cbBuf, PIOMMMIORANGE pRange) 250 { 251 Log3(("iomMmioRing3WritePending: %RGp LB %#x\n", GCPhys, cbBuf)); 252 AssertReturn(pVCpu->iom.s.PendingMmioWrite.cbValue == 0, VERR_IOM_MMIO_IPE_1); 253 pVCpu->iom.s.PendingMmioWrite.GCPhys = GCPhys; 254 AssertReturn(cbBuf <= sizeof(pVCpu->iom.s.PendingMmioWrite.abValue), VERR_IOM_MMIO_IPE_2); 255 pVCpu->iom.s.PendingMmioWrite.cbValue = (uint32_t)cbBuf; 256 memcpy(pVCpu->iom.s.PendingMmioWrite.abValue, pvBuf, cbBuf); 257 VMCPU_FF_SET(pVCpu, VMCPU_FF_IOM); 258 return VINF_IOM_R3_MMIO_COMMIT_WRITE; 259 } 260 #endif 236 261 237 262 … … 331 356 * could be kind of screwed here... 332 357 * 333 * Fix: Save the current state and resume it in ring-3. Requires EM to not go 334 * to REM for MMIO accesses (like may currently do). */ 335 358 * Fix: VINF_IOM_R3_IOPORT_COMMIT_WRITE (part 2) */ 336 359 LogFlow(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [read]\n", GCPhys, GCPhysStart, cbValue, rc2)); 337 360 return rc2; … … 401 424 * kind of screwed here... 402 425 * 403 * Fix: Save the current state and resume it in ring-3. Requires EM to not go 404 * to REM for MMIO accesses (like may currently do). */ 426 * Fix: VINF_IOM_R3_IOPORT_COMMIT_WRITE (part 2) */ 405 427 LogFlow(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [write]\n", GCPhys, GCPhysStart, cbValue, rc2)); 406 428 return rc2; … … 1999 2021 #ifndef IN_RING3 2000 2022 if (rc == VERR_SEM_BUSY) 2001 return VINF_IOM_R3_MMIO_READ_WRITE; 2023 { 2024 if (enmAccessType == PGMACCESSTYPE_READ) 2025 return VINF_IOM_R3_MMIO_READ; 2026 Assert(enmAccessType == PGMACCESSTYPE_WRITE); 2027 return iomMmioRing3WritePending(pVCpu, GCPhysFault, pvBuf, cbBuf, NULL /*pRange*/); 2028 } 2002 2029 #endif 2003 2030 AssertRC(rc); … … 2019 2046 rcStrict = iomMMIODoRead(pVM, pVCpu, pRange, GCPhysFault, pvBuf, (unsigned)cbBuf); 2020 2047 else 2048 { 2021 2049 rcStrict = iomMMIODoWrite(pVM, pVCpu, pRange, GCPhysFault, pvBuf, (unsigned)cbBuf); 2050 #ifndef IN_RING3 2051 if (rcStrict == VINF_IOM_R3_MMIO_WRITE) 2052 rcStrict = iomMmioRing3WritePending(pVCpu, GCPhysFault, pvBuf, cbBuf, pRange); 2053 #endif 2054 } 2022 2055 2023 2056 /* Check the return code. */ … … 2027 2060 AssertMsg( rcStrict == VINF_SUCCESS 2028 2061 || rcStrict == (enmAccessType == PGMACCESSTYPE_READ ? VINF_IOM_R3_MMIO_READ : VINF_IOM_R3_MMIO_WRITE) 2062 || (rcStrict == VINF_IOM_R3_MMIO_COMMIT_WRITE && enmAccessType == PGMACCESSTYPE_WRITE) 2029 2063 || rcStrict == VINF_IOM_R3_MMIO_READ_WRITE 2030 2064 || rcStrict == VINF_EM_DBG_STOP … … 2043 2077 PDMCritSectLeave(pDevIns->CTX_SUFF(pCritSectRo)); 2044 2078 } 2079 #ifdef IN_RING3 2045 2080 else 2046 2081 iomMmioReleaseRange(pVM, pRange); 2082 #else 2083 else 2084 { 2085 if (rcStrict == VINF_IOM_R3_MMIO_READ_WRITE) 2086 { 2087 if (enmAccessType == PGMACCESSTYPE_READ) 2088 rcStrict = VINF_IOM_R3_MMIO_READ; 2089 else 2090 { 2091 Assert(enmAccessType == PGMACCESSTYPE_WRITE); 2092 rcStrict = iomMmioRing3WritePending(pVCpu, GCPhysFault, pvBuf, cbBuf, pRange); 2093 } 2094 } 2095 iomMmioReleaseRange(pVM, pRange); 2096 } 2097 #endif 2047 2098 return rcStrict; 2048 2099 } … … 2064 2115 VMMDECL(VBOXSTRICTRC) IOMMMIORead(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue) 2065 2116 { 2117 Assert(pVCpu->iom.s.PendingMmioWrite.cbValue == 0); 2066 2118 /* Take the IOM lock before performing any MMIO. */ 2067 2119 VBOXSTRICTRC rc = IOM_LOCK_SHARED(pVM); … … 2196 2248 VMMDECL(VBOXSTRICTRC) IOMMMIOWrite(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue) 2197 2249 { 2250 Assert(pVCpu->iom.s.PendingMmioWrite.cbValue == 0); 2198 2251 /* Take the IOM lock before performing any MMIO. */ 2199 2252 VBOXSTRICTRC rc = IOM_LOCK_SHARED(pVM); … … 2321 2374 { 2322 2375 STAM_COUNTER_INC(&pVM->iom.s.StatInstIns); 2376 Assert(pVCpu->iom.s.PendingMmioWrite.cbValue == 0); 2323 2377 2324 2378 /* … … 2487 2541 { 2488 2542 STAM_COUNTER_INC(&pVM->iom.s.StatInstOuts); 2543 Assert(pVCpu->iom.s.PendingMmioWrite.cbValue == 0); 2489 2544 2490 2545 /* -
trunk/src/VBox/VMM/VMMR3/IOM.cpp
r60847 r60852 86 86 * mapped into the physical memory address space, it can be accessed in a number 87 87 * of ways thru PGM. 88 * 89 * 90 * @section sec_iom_logging Logging Levels 91 * 92 * Following assignments: 93 * - Level 5 is used for defering I/O port and MMIO writes to ring-3. 88 94 * 89 95 */ … … 1731 1737 if (pVCpu->iom.s.PendingIOPortWrite.cbValue) 1732 1738 { 1739 Log5(("IOM: Dispatching pending I/O port write: %#x LB %u -> %RTiop\n", pVCpu->iom.s.PendingIOPortWrite.u32Value, 1740 pVCpu->iom.s.PendingMmioWrite.cbValue, pVCpu->iom.s.PendingIOPortWrite.IOPort)); 1733 1741 VBOXSTRICTRC rcStrictCommit = IOMIOPortWrite(pVM, pVCpu, pVCpu->iom.s.PendingIOPortWrite.IOPort, 1734 1742 pVCpu->iom.s.PendingIOPortWrite.u32Value, … … 1741 1749 if (pVCpu->iom.s.PendingMmioWrite.cbValue) 1742 1750 { 1751 Log5(("IOM: Dispatching pending MMIO write: %RGp LB %#x\n", 1752 pVCpu->iom.s.PendingMmioWrite.GCPhys, pVCpu->iom.s.PendingMmioWrite.cbValue)); 1743 1753 /** @todo Try optimize this some day? Currently easier and correcter to 1744 1754 * involve PGM here since we never know if the MMIO area is still mapped … … 1747 1757 pVCpu->iom.s.PendingMmioWrite.abValue, pVCpu->iom.s.PendingMmioWrite.cbValue, 1748 1758 PGMACCESSORIGIN_IOM); 1749 pVCpu->iom.s.Pending IOPortWrite.cbValue = 0;1759 pVCpu->iom.s.PendingMmioWrite.cbValue = 0; 1750 1760 rcStrict = iomR3MergeStatus(rcStrict, rcStrictCommit, VINF_IOM_R3_MMIO_COMMIT_WRITE, pVCpu); 1751 1761 }
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