Changeset 61054 in vbox for trunk/src/VBox/Devices
- Timestamp:
- May 19, 2016 4:42:47 PM (9 years ago)
- svn:sync-xref-src-repo-rev:
- 107321
- Location:
- trunk/src/VBox/Devices/PC
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/BIOS/inlines.h
r60422 r61054 143 143 144 144 #endif 145 146 #if VBOX_BIOS_CPU >= 80386 147 148 /* Warning: msr_read/msr_write destroy high bits of 32-bit registers. */ 149 150 uint64_t msr_read(uint32_t msr); 151 #pragma aux msr_read = \ 152 ".586" \ 153 "shl ecx, 16" \ 154 "mov cx, ax" \ 155 "rdmsr" \ 156 "xchg eax, edx" \ 157 "mov bx, ax" \ 158 "shr eax, 16" \ 159 "mov cx, dx" \ 160 "shr edx, 16" \ 161 "xchg dx, cx" \ 162 parm [cx ax] value [ax bx cx dx] modify [] nomemory; 163 164 void msr_write(uint64_t val, uint32_t msr); 165 #pragma aux msr_write = \ 166 ".586" \ 167 "shl eax, 16" \ 168 "mov ax, bx" \ 169 "xchg dx, cx" \ 170 "shl edx, 16" \ 171 "mov dx, cx" \ 172 "xchg eax, edx" \ 173 "mov cx, di" \ 174 "shl ecx, 16" \ 175 "mov cx, si" \ 176 "wrmsr" \ 177 parm [ax bx cx dx] [di si] modify [] nomemory; 178 179 #endif -
trunk/src/VBox/Devices/PC/BIOS/orgs.asm
r60610 r61054 144 144 extrn _int15_blkmove:near 145 145 endif 146 if VBOX_BIOS_CPU ge 80386 147 extrn _apic_setup:near 148 endif 146 149 147 150 … … 599 602 600 603 C_SETUP 604 605 if VBOX_BIOS_CPU ge 80386 606 ;; Set up local APIC 607 .386 608 pushad 609 call _apic_setup 610 popad 611 SET_DEFAULT_CPU_286 612 endif 613 601 614 ;; ATA/ATAPI driver setup 602 615 call _ata_init -
trunk/src/VBox/Devices/PC/BIOS/post.c
r56292 r61054 101 101 } 102 102 } 103 104 #if VBOX_BIOS_CPU >= 80386 105 106 #define APICMODE_DISABLED 0 107 #define APICMODE_APIC 1 108 #define APICMODE_X2APIC 2 109 110 #define APIC_BASE_MSR 0x1B 111 #define APICBASE_X2APIC 0x400 /* bit 10 */ 112 #define APICBASE_DISABLE 0x800 /* bit 11 */ 113 114 /* 115 * Set up APIC/x2APIC. See also DevPcBios.cpp. 116 * 117 * NB: Virtual wire compatibility is set up earlier in 32-bit protected 118 * mode assembler (because it needs to access MMIO just under 4GB). 119 * Switching to x2APIC mode or disabling the APIC is done through an MSR 120 * and needs no 32-bit addressing. Going to x2APIC mode does not lose the 121 * existing virtual wire setup. 122 * 123 * NB: This code assumes that there *is* a local APIC. 124 * 125 * NB: Destroys high bits of 32-bit registers. 126 */ 127 void BIOSCALL apic_setup(void) 128 { 129 uint64_t base_msr; 130 uint16_t mask; 131 uint8_t apic_mode; 132 133 /* APIC mode at offset 78h in CMOS NVRAM. */ 134 apic_mode = inb_cmos(0x78); 135 136 if (apic_mode == APICMODE_X2APIC) 137 mask = APICBASE_X2APIC; 138 else if (apic_mode == APICMODE_DISABLED) 139 mask = APICBASE_DISABLE; 140 else 141 mask = 0; /* Any other setting leaves things alone. */ 142 143 if (mask) { 144 base_msr = msr_read(APIC_BASE_MSR); 145 base_msr |= mask; 146 msr_write(base_msr, APIC_BASE_MSR); 147 } 148 } 149 150 #endif -
trunk/src/VBox/Devices/PC/DevPcBios.cpp
r61042 r61054 103 103 Fourth IDE HDD: 104 104 0x70 - 0x77 105 APIC/x2APIC settings: 106 0x78 105 107 106 108 Second CMOS bank (offsets 0x80 to 0xff): … … 194 196 uint8_t u8IOAPIC; 195 197 /** APIC mode to be set up by BIOS */ 196 uint8_t u8APIC ;198 uint8_t u8APICMode; 197 199 /** PXE debug logging enabled? */ 198 200 uint8_t u8PXEDebug; … … 665 667 */ 666 668 pcbiosCmosWrite(pDevIns, 0x60, pThis->cCpus & 0xff); 669 670 /* 671 * APIC mode. 672 */ 673 pcbiosCmosWrite(pDevIns, 0x78, pThis->u8APICMode); 667 674 668 675 /* … … 1181 1188 N_("Configuration error: Failed to read \"IOAPIC\"")); 1182 1189 1183 rc = CFGMR3QueryU8Def(pCfg, "APIC", &pThis->u8APIC , 1);1190 rc = CFGMR3QueryU8Def(pCfg, "APIC", &pThis->u8APICMode, 1); 1184 1191 if (RT_FAILURE (rc)) 1185 1192 return PDMDEV_SET_ERROR(pDevIns, rc,
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