- Timestamp:
- May 31, 2016 4:55:10 AM (9 years ago)
- svn:sync-xref-src-repo-rev:
- 107611
- Location:
- trunk
- Files:
-
- 14 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/err.h
r61051 r61317 644 644 /** The loaded XCR0 register value is not valid. */ 645 645 #define VERR_CPUM_INVALID_XCR0 (-1765) 646 /** Indicates that we modified the host CR0 (FPU related). */ 647 #define VINF_CPUM_HOST_CR0_MODIFIED (1766) 646 648 /** @} */ 647 649 -
trunk/include/VBox/err.mac
r59388 r61317 233 233 %define VERR_CPUM_INVALID_XSAVE_HDR (-1764) 234 234 %define VERR_CPUM_INVALID_XCR0 (-1765) 235 %define VINF_CPUM_HOST_CR0_MODIFIED (1766) 235 236 %define VERR_SSM_UNIT_EXISTS (-1800) 236 237 %define VERR_SSM_UNIT_NOT_FOUND (-1801) … … 409 410 %define VINF_IOM_R3_IOPORT_READ 2620 410 411 %define VINF_IOM_R3_IOPORT_WRITE 2621 412 %define VINF_IOM_R3_IOPORT_COMMIT_WRITE 2622 411 413 %define VINF_IOM_R3_MMIO_READ 2623 412 414 %define VINF_IOM_R3_MMIO_WRITE 2624 413 415 %define VINF_IOM_R3_MMIO_READ_WRITE 2625 416 %define VINF_IOM_R3_MMIO_COMMIT_WRITE 2626 414 417 %define VERR_IOM_IOPORT_UNKNOWN_OPCODE (-2630) 415 418 %define VERR_IOM_IOPORT_IPE_1 (-2631) … … 420 423 %define VERR_IOM_MMIO_IPE_3 (-2636) 421 424 %define VERR_IOM_HM_IPE (-2637) 425 %define VERR_IOM_FF_STATUS_IPE (-2638) 422 426 %define VINF_VMM_CALL_HOST 2700 423 427 %define VERR_VMM_RING0_ASSERTION (-2701) … … 996 1000 %define VERR_GSTCTL_GUEST_ERROR (-6200) 997 1001 %define VWRN_GSTCTL_OBJECTSTATE_CHANGED 6220 1002 %define VERR_GSTCTL_PROCESS_WRONG_STATE (-6221) 1003 %define VWRN_GSTCTL_PROCESS_EXIT_CODE 6221 998 1004 %define VERR_GIM_NOT_ENABLED (-6300) 999 1005 %define VERR_GIM_IPE_1 (-6301) … … 1017 1023 %define VERR_GSTDND_GUEST_ERROR (-6500) 1018 1024 %define VERR_AUDIO_BACKEND_INIT_FAILED (-6600) 1025 %define VERR_AUDIO_NO_FREE_INPUT_STREAMS (-6601) 1026 %define VERR_AUDIO_NO_FREE_OUTPUT_STREAMS (-6603) 1027 %define VERR_AUDIO_STREAM_PENDING_DISABLE (-6604) 1028 %define VERR_APIC_INTR_NOT_PENDING (-6700) 1029 %define VERR_APIC_INTR_MASKED_BY_TPR (-6701) 1019 1030 %include "iprt/err.mac" -
trunk/include/VBox/vmm/hm.h
r61144 r61317 190 190 VMMR0_INT_DECL(void) HMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser); 191 191 VMMR0_INT_DECL(void) HMR0NotifyCpumUnloadedGuestFpuState(PVMCPU VCpu); 192 VMMR0_INT_DECL(void) HMR0NotifyCpumModifiedHostCr0(PVMCPU VCpu); 192 193 VMMR0_INT_DECL(bool) HMR0SuspendPending(void); 193 194 -
trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp
r61068 r61317 327 327 * @retval VINF_SUCCESS if the guest FPU state is loaded. 328 328 * @retval VINF_EM_RAW_GUEST_TRAP if it is a guest trap. 329 * @retval VINF_CPUM_HOST_CR0_MODIFIED if we modified the host CR0. 329 330 * 330 331 * @param pVM The cross context VM structure. … … 386 387 * state into the CPU. 387 388 * 388 * @returns VINF_SUCCESS (for CPUMR0Trap07Handler). 389 * @returns VINF_SUCCESS on success, host CR0 unmodified. 390 * @returns VINF_CPUM_HOST_CR0_MODIFIED on success when the host CR0 was 391 * modified and VT-x needs to update the value in the VMCS. 389 392 * 390 393 * @param pVM The cross context VM structure. … … 393 396 VMMR0_INT_DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PVMCPU pVCpu) 394 397 { 398 int rc = VINF_SUCCESS; 395 399 Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); 396 400 Assert(!(pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU_GUEST)); … … 404 408 /* Save the host state if necessary. */ 405 409 if (!(pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU_HOST)) 406 cpumRZSaveHostFPUState(&pVCpu->cpum.s);410 rc = cpumRZSaveHostFPUState(&pVCpu->cpum.s); 407 411 408 412 /* Restore the state on entry as we need to be in 64-bit mode to access the full state. */ … … 418 422 { 419 423 Assert(!(pVCpu->cpum.s.fUseFlags & CPUM_USED_MANUAL_XMM_RESTORE)); 420 cpumR0SaveHostRestoreGuestFPUState(&pVCpu->cpum.s);424 rc = cpumR0SaveHostRestoreGuestFPUState(&pVCpu->cpum.s); 421 425 } 422 426 else … … 428 432 uint64_t uHostEfer = ASMRdMsr(MSR_K6_EFER); 429 433 if (!(uHostEfer & MSR_K6_EFER_FFXSR)) 430 cpumR0SaveHostRestoreGuestFPUState(&pVCpu->cpum.s);434 rc = cpumR0SaveHostRestoreGuestFPUState(&pVCpu->cpum.s); 431 435 else 432 436 { … … 434 438 pVCpu->cpum.s.fUseFlags |= CPUM_USED_MANUAL_XMM_RESTORE; 435 439 ASMWrMsr(MSR_K6_EFER, uHostEfer & ~MSR_K6_EFER_FFXSR); 436 cpumR0SaveHostRestoreGuestFPUState(&pVCpu->cpum.s);440 rc = cpumR0SaveHostRestoreGuestFPUState(&pVCpu->cpum.s); 437 441 ASMWrMsr(MSR_K6_EFER, uHostEfer | MSR_K6_EFER_FFXSR); 438 442 ASMSetFlags(uSavedFlags); … … 442 446 == (CPUM_USED_FPU_GUEST | CPUM_USED_FPU_HOST | CPUM_USED_FPU_SINCE_REM)); 443 447 } 444 return VINF_SUCCESS;448 return rc; 445 449 } 446 450 -
trunk/src/VBox/VMM/VMMR0/CPUMR0A.asm
r61144 r61317 63 63 ; Saves the host FPU/SSE/AVX state and restores the guest FPU/SSE/AVX state. 64 64 ; 65 ; @returns VINF_SUCCESS (0) or VINF_CPUM_HOST_CR0_MODIFIED. (EAX) 65 66 ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer 66 67 ; … … 156 157 popf 157 158 159 %ifndef CPUM_CAN_USE_FPU_IN_R0 160 test ecx, ecx 161 jnz .modified_cr0 162 %endif 163 xor eax, eax 164 .return: 158 165 %ifdef RT_ARCH_X86 159 166 pop esi … … 162 169 leave 163 170 ret 171 172 %ifndef CPUM_CAN_USE_FPU_IN_R0 173 .modified_cr0: 174 mov eax, VINF_CPUM_HOST_CR0_MODIFIED 175 jmp .return 176 %endif 164 177 ENDPROC cpumR0SaveHostRestoreGuestFPUState 165 178 -
trunk/src/VBox/VMM/VMMR0/HMR0.cpp
r61144 r61317 1516 1516 { 1517 1517 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_CR0); 1518 } 1519 1520 1521 /** 1522 * Notification from CPUM that it has modified the host CR0 (because of FPU). 1523 * 1524 * @param pVCpu The cross context virtual CPU structure of the calling EMT. 1525 */ 1526 VMMR0_INT_DECL(void) HMR0NotifyCpumModifiedHostCr0(PVMCPU pVCpu) 1527 { 1528 HMCPU_CF_SET(pVCpu, HM_CHANGED_HOST_CONTEXT); 1518 1529 } 1519 1530 -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r61155 r61317 3120 3120 && !CPUMIsGuestFPUStateActive(pVCpu)) 3121 3121 { 3122 CPUMR0LoadGuestFPU(pVM, pVCpu); 3122 CPUMR0LoadGuestFPU(pVM, pVCpu); /* (Ignore rc, no need to set HM_CHANGED_HOST_CONTEXT for SVM.) */ 3123 3123 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_CR0); 3124 3124 } … … 5388 5388 Assert(!pSvmTransient->fWasGuestFPUStateActive); 5389 5389 #endif 5390 rc = CPUMR0Trap07Handler(pVCpu->CTX_SUFF(pVM), pVCpu); 5391 Assert(rc == VINF_EM_RAW_GUEST_TRAP || (rc == VINF_SUCCESS && CPUMIsGuestFPUStateActive(pVCpu))); 5390 rc = CPUMR0Trap07Handler(pVCpu->CTX_SUFF(pVM), pVCpu); /* (No need to set HM_CHANGED_HOST_CONTEXT for SVM.) */ 5391 Assert( rc == VINF_EM_RAW_GUEST_TRAP 5392 || ((rc == VINF_SUCCESS || rc == VINF_CPUM_HOST_CR0_MODIFIED) && CPUMIsGuestFPUStateActive(pVCpu))); 5392 5393 } 5393 5394 … … 5395 5396 VMMRZCallRing3Enable(pVCpu); 5396 5397 5397 if (rc == VINF_SUCCESS )5398 if (rc == VINF_SUCCESS || rc == VINF_CPUM_HOST_CR0_MODIFIED) 5398 5399 { 5399 5400 /* Guest FPU state was activated, we'll want to change CR0 FPU intercepts before the next VM-reentry. */ -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r61156 r61317 8626 8626 #ifdef HMVMX_ALWAYS_SWAP_FPU_STATE 8627 8627 if (!CPUMIsGuestFPUStateActive(pVCpu)) 8628 CPUMR0LoadGuestFPU(pVM, pVCpu); 8628 if (CPUMR0LoadGuestFPU(pVM, pVCpu) == VINF_CPUM_HOST_CR0_MODIFIED) 8629 HMCPU_CF_SET(pVCpu, HM_CHANGED_HOST_CONTEXT); 8629 8630 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_CR0); 8630 8631 #endif … … 8633 8634 && !CPUMIsGuestFPUStateActive(pVCpu)) 8634 8635 { 8635 CPUMR0LoadGuestFPU(pVM, pVCpu); 8636 if (CPUMR0LoadGuestFPU(pVM, pVCpu) == VINF_CPUM_HOST_CR0_MODIFIED) 8637 HMCPU_CF_SET(pVCpu, HM_CHANGED_HOST_CONTEXT); 8636 8638 Assert(HMVMXCPU_GST_IS_UPDATED(pVCpu, HMVMX_UPDATED_GUEST_CR0)); 8637 8639 HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_CR0); … … 12988 12990 #endif 12989 12991 rc = CPUMR0Trap07Handler(pVCpu->CTX_SUFF(pVM), pVCpu); 12990 Assert(rc == VINF_EM_RAW_GUEST_TRAP || (rc == VINF_SUCCESS && CPUMIsGuestFPUStateActive(pVCpu))); 12992 Assert( rc == VINF_EM_RAW_GUEST_TRAP 12993 || ((rc == VINF_SUCCESS || rc == VINF_CPUM_HOST_CR0_MODIFIED) && CPUMIsGuestFPUStateActive(pVCpu))); 12994 if (rc == VINF_CPUM_HOST_CR0_MODIFIED) 12995 HMCPU_CF_SET(pVCpu, HM_CHANGED_HOST_CONTEXT); 12991 12996 } 12992 12997 … … 12994 12999 VMMRZCallRing3Enable(pVCpu); 12995 13000 12996 if (rc == VINF_SUCCESS )13001 if (rc == VINF_SUCCESS || rc == VINF_CPUM_HOST_CR0_MODIFIED) 12997 13002 { 12998 13003 /* Guest FPU state was activated, we'll want to change CR0 FPU intercepts before the next VM-reentry. */ -
trunk/src/VBox/VMM/VMMRZ/CPUMRZ.cpp
r61147 r61317 49 49 { 50 50 case 0: 51 #ifdef IN_RC 51 52 cpumRZSaveHostFPUState(&pVCpu->cpum.s); 52 #ifdef IN_RC53 53 VMCPU_FF_SET(pVCpu, VMCPU_FF_CPUM); /* Must recalc CR0 before executing more code! */ 54 #else 55 if (cpumRZSaveHostFPUState(&pVCpu->cpum.s) == VINF_CPUM_HOST_CR0_MODIFIED) 56 HMR0NotifyCpumModifiedHostCr0(pVCpu); 54 57 #endif 55 58 break; -
trunk/src/VBox/VMM/VMMRZ/CPUMRZA.asm
r61146 r61317 25 25 %include "iprt/x86.mac" 26 26 %include "VBox/vmm/cpum.mac" 27 %include "VBox/err.mac" 27 28 28 29 … … 38 39 ; re-evaluate the situation before executing more guest code. 39 40 ; 40 ; @returns VINF_SUCCESS (0) in EAX41 ; @returns VINF_SUCCESS (0) or VINF_CPUM_HOST_CR0_MODIFIED. (EAX) 41 42 ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer 42 43 ; … … 78 79 ; leave it like that so IEM can use the FPU/SSE/AVX host CPU features directly. 79 80 ; 80 SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX 81 SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX must be preserved! 81 82 ;; @todo What about XCR0? 82 83 %ifdef IN_RING0 … … 93 94 popf 94 95 96 %ifndef CPUM_CAN_USE_FPU_IN_R0 97 ; Figure the return code. 98 test ecx, ecx 99 jnz .modified_cr0 100 %endif 101 xor eax, eax 102 .return: 103 95 104 %ifdef RT_ARCH_X86 96 105 pop esi … … 99 108 leave 100 109 ret 110 111 %ifndef CPUM_CAN_USE_FPU_IN_R0 112 .modified_cr0: 113 mov eax, VINF_CPUM_HOST_CR0_MODIFIED 114 jmp .return 115 %endif 101 116 %undef pCpumCpu 102 117 %undef pXState -
trunk/src/VBox/VMM/include/CPUMInternal.h
r61144 r61317 540 540 541 541 # ifdef IN_RING0 542 DECLASM( void)cpumR0SaveHostRestoreGuestFPUState(PCPUMCPU pCPUM);542 DECLASM(int) cpumR0SaveHostRestoreGuestFPUState(PCPUMCPU pCPUM); 543 543 DECLASM(void) cpumR0SaveGuestRestoreHostFPUState(PCPUMCPU pCPUM); 544 544 # if ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) … … 548 548 549 549 # if defined(IN_RC) || defined(IN_RING0) 550 DECLASM( void)cpumRZSaveHostFPUState(PCPUMCPU pCPUM);550 DECLASM(int) cpumRZSaveHostFPUState(PCPUMCPU pCPUM); 551 551 DECLASM(void) cpumRZSaveGuestFpuState(PCPUMCPU pCPUM, bool fLeaveFpuAccessible); 552 552 DECLASM(void) cpumRZSaveGuestSseRegisters(PCPUMCPU pCPUM); -
trunk/src/VBox/VMM/include/CPUMInternal.mac
r61162 r61317 48 48 %ifdef RT_OS_DARWIN 49 49 ; Intel Darwin kernels will load the FPU context of the current thread (user land). 50 %define CPUM_CAN_USE_FPU_IN_R0 1 50 ;; @todo we still need to check CR0 and tell HMVMX when CR0 changes! 51 ;%define CPUM_CAN_USE_FPU_IN_R0 1 51 52 %endif 52 53 %ifdef RT_OS_LINUX … … 54 55 ; at least that what my LXR research on 2.6.18+ indicates. It's possible this was 55 56 ; done differently at some point, I seems to recall issues with it ages and ages ago. 56 ; %define CPUM_CAN_USE_FPU_IN_R0 1 - test me first 57 ;; @todo We still need to check CR0 and tell HMVMX when CR0 changes! 58 ;%define CPUM_CAN_USE_FPU_IN_R0 1 57 59 %endif 58 60 %ifndef IN_RING0 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-fpustate-1-template.c
r61315 r61317 91 91 /* Check that we can keep it consistent for a while. */ 92 92 g_usBs3TestStep = 3; 93 for (iLoops = 0; iLoops < _4M ; iLoops++) /** @todo adjust counter. will hardcode for now and do timers later so day... */93 for (iLoops = 0; iLoops < _4M*16; iLoops++) /** @todo adjust counter. will hardcode for now and do timers later so day... */ 94 94 { 95 95 TMPL_NM(bs3FpuState1_Save)(pChecking); -
trunk/src/VBox/ValidationKit/bootsectors/bs3-fpustate-1.c
r61315 r61317 50 50 /*PE16_32*/ NULL, //bs3FpuState1_Corruption_pe16_32, 51 51 /*PE16_V86*/ NULL, //bs3FpuState1_Corruption_pe16_v86, 52 /*PE32*/ bs3FpuState1_Corruption_pe32,52 /*PE32*/ NULL, //bs3FpuState1_Corruption_pe32, 53 53 /*PE32_16*/ NULL, //bs3FpuState1_Corruption_pe32_16, 54 54 /*PEV86*/ NULL, //bs3FpuState1_Corruption_pev86,
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