VirtualBox

Changeset 61385 in vbox


Ignore:
Timestamp:
Jun 1, 2016 6:34:57 PM (9 years ago)
Author:
vboxsync
Message:

bs3-fpustate-1: Extended the tests to force the ring-0 and raw-mode VMM code to do interesting things.

Location:
trunk/src/VBox/ValidationKit/bootsectors
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/Makefile.kmk

    r61315 r61385  
    268268        $$(bs3-fpustate-1_0_OUTDIR)/bs3kit/bs3-cmn-instantiate.o32 \
    269269        $$(bs3-fpustate-1_0_OUTDIR)/bs3kit/bs3-cmn-instantiate.o64 \
     270        $$(bs3-fpustate-1_0_OUTDIR)/bs3-fpustate-1-asm.o16
    270271
    271272endif # VBOX_WITH_BS3KIT

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-fpustate-1-template.c

    r61317 r61385  
    3131#include <iprt/asm.h>
    3232#include <iprt/asm-amd64-x86.h>
     33#include <VBox/VMMDevTesting.h>
    3334
    3435
    … …  
    4041#ifdef BS3_INSTANTIATING_CMN
    4142
    42 ///**
    43 // * Wrapper around Bs3TestFailedF that prefixes the error with g_usBs3TestStep
    44 // * and g_pszTestMode.
    45 // */
    46 //# define bs3CpuBasic2_FailedF BS3_CMN_NM(bs3CpuBasic2_FailedF)
    47 //BS3_DECL_NEAR(void) bs3CpuBasic2_FailedF(const char *pszFormat, ...)
    48 //{
    49 //}
     43/**
     44 * Displays the differences between the two states.
     45 */
     46# define bs3FpuState1_Diff BS3_CMN_NM(bs3FpuState1_Diff)
     47BS3_DECL_NEAR(void) bs3FpuState1_Diff(X86FXSTATE const BS3_FAR *pExpected, X86FXSTATE const BS3_FAR *pChecking)
     48{
     49    unsigned i;
     50
     51# define CHECK(a_Member, a_Fmt) \
     52        if (pExpected->a_Member != pChecking->a_Member) \
     53            Bs3TestPrintf("  " #a_Member ": " a_Fmt ", expected " a_Fmt "\n", pChecking->a_Member, pExpected->a_Member); \
     54        else do { } while (0)
     55    CHECK(FCW,          "%#RX16");
     56    CHECK(FSW,          "%#RX16");
     57    CHECK(FTW,          "%#RX16");
     58    CHECK(FOP,          "%#RX16");
     59    CHECK(FPUIP,        "%#RX32");
     60    CHECK(CS,           "%#RX16");
     61    CHECK(Rsrvd1,       "%#RX16");
     62    CHECK(FPUDP,        "%#RX32");
     63    CHECK(DS,           "%#RX16");
     64    CHECK(Rsrvd2,       "%#RX16");
     65    CHECK(MXCSR,        "%#RX32");
     66    CHECK(MXCSR_MASK,   "%#RX32");
     67# undef CHECK
     68    for (i = 0; i < RT_ELEMENTS(pExpected->aRegs); i++)
     69        if (   pChecking->aRegs[i].au64[0] != pExpected->aRegs[i].au64[0]
     70            || pChecking->aRegs[i].au64[1] != pExpected->aRegs[i].au64[1])
     71            Bs3TestPrintf("st%u: %.16Rhxs\n"
     72                          "exp: %.16Rhxs\n",
     73                          &pChecking->aRegs[i], &pExpected->aRegs[i]);
     74    for (i = 0; i < RT_ELEMENTS(pExpected->aXMM); i++)
     75        if (   pChecking->aXMM[i].au64[0] != pExpected->aXMM[i].au64[0]
     76            || pChecking->aXMM[i].au64[1] != pExpected->aXMM[i].au64[1])
     77            Bs3TestPrintf("xmm%u: %.16Rhxs\n"
     78                          " %sexp: %.16Rhxs\n",
     79                          &pChecking->aRegs[i], &pExpected->aRegs[i], i >= 10 ? " " : "");
     80}
     81
    5082
    5183#endif /* BS3_INSTANTIATING_CMN */
    … …  
    6193  || TMPL_MODE == BS3_MODE_PP32 \
    6294  || TMPL_MODE == BS3_MODE_PAE32 \
    63   || TMPL_MODE == BS3_MODE_LM64
    64 //  || TMPL_MODE == BS3_MODE_RM
    65 
    66 BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR *pFxState);
     95  || TMPL_MODE == BS3_MODE_LM64 \
     96  || TMPL_MODE == BS3_MODE_RM
     97
     98/* Assembly helpers: */
     99BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR *pFxState, void BS3_FAR *pvMmioReg);
    67100BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Restore)(X86FXSTATE const BS3_FAR *pFxState);
    68101BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Save)(X86FXSTATE BS3_FAR *pFxState);
    69102
     103BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FNStEnv)(void BS3_FAR *pvMmioReg);
     104BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Read)(void BS3_FAR *pvMmioReg);
     105BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Write)(void BS3_FAR *pvMmioReg);
     106BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FMul)(void BS3_FAR *pvMmioReg);
     107
     108
     109/**
     110 * Tests for FPU state corruption.
     111 *
     112 * First we don't do anything to quit guest context for a while.
     113 * Then we start testing weird MMIO accesses, some which amonger other things
     114 * forces the use of the FPU state or host FPU to do the emulation.  Both are a
     115 * little complicated in raw-mode and ring-0 contexts.
     116 *
     117 * We ASSUME FXSAVE/FXRSTOR support here.
     118 */
    70119BS3_DECL_FAR(uint8_t) TMPL_NM(bs3FpuState1_Corruption)(uint8_t bMode)
    71120{
    … …  
    76125    X86FXSTATE BS3_FAR *pExpected = (X86FXSTATE BS3_FAR *)pbTmp;
    77126    X86FXSTATE BS3_FAR *pChecking = pExpected + 1;
    78     uint32_t            iLoops;
    79 
    80     /** @todo flexible wrt fxsave support? do we care?  */
    81     /* First, make 100% sure we don't trap accessing the FPU state and that we can use fxsave/fxrstor. */
     127    uint32_t            iLoop;
     128    bool                fMmioReadback;
     129    bool                fReadBackError = false;
     130    BS3PTRUNION         MmioReg;
     131
     132# undef  CHECK_STATE
     133# define CHECK_STATE(a_Instr) \
     134        do { \
     135            TMPL_NM(bs3FpuState1_Save)(pChecking); \
     136            if (Bs3MemCmp(pExpected, pChecking, sizeof(*pExpected)) != 0) \
     137            { \
     138                Bs3TestFailedF("State differs after " #a_Instr " (write) in loop #%RU32\n", iLoop); \
     139                bs3FpuState1_Diff(pExpected, pChecking); \
     140                return 1; \
     141            } \
     142        } while (0)
     143
     144    /*
     145     * Setup the test.
     146     */
     147
     148    /* First, figure out which MMIO region we'll be using so we can correctly initialize FPUDS. */
     149# if BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
     150    MmioReg.pv = BS3_FP_MAKE(0xffff, VMMDEV_TESTING_MMIO_BASE - _1M + 16);
     151# elif BS3_MODE_IS_16BIT_CODE(TMPL_MODE)
     152    MmioReg.pv = BS3_FP_MAKE(BS3_SEL_VMMDEV_MMIO16, VMMDEV_TESTING_MMIO_BASE - _1M);
     153# else
     154    MmioReg.pv = (uint8_t *)VMMDEV_TESTING_MMIO_BASE;
     155# endif
     156    if (MmioReg.pu32[VMMDEV_TESTING_MMIO_OFF_NOP / sizeof(uint32_t)] == VMMDEV_TESTING_NOP_RET)
     157    {
     158        fMmioReadback = true;
     159        MmioReg.pb += VMMDEV_TESTING_MMIO_OFF_READBACK;
     160    }
     161    else
     162    {
     163        Bs3TestPrintf("VMMDev MMIO not found, using VGA instead\n");
     164        fMmioReadback = false;
     165        MmioReg.pv = Bs3XptrFlatToCurrent(0xa7800);
     166    }
     167
     168    /* Second, make 100% sure we don't trap accessing the FPU state and that we can use fxsave/fxrstor. */
    82169    g_usBs3TestStep = 1;
    83170    ASMSetCR0((ASMGetCR0() & ~(X86_CR0_TS | X86_CR0_EM)) | X86_CR0_MP);
    84171    ASMSetCR4(ASMGetCR4() | X86_CR4_OSFXSR /*| X86_CR4_OSXMMEEXCPT*/);
    85172
    86     /* Second, come up with a distinct state. We do that from assembly. */
     173    /* Third, come up with a distinct state. We do that from assembly (will do FPU in R0/RC). */
    87174    g_usBs3TestStep = 2;
    88175    Bs3MemSet(abBuf, 0x42, sizeof(abBuf));
    89     TMPL_NM(bs3FpuState1_InitState)(pExpected);
    90 
    91     /* Check that we can keep it consistent for a while. */
     176    TMPL_NM(bs3FpuState1_InitState)(pExpected, MmioReg.pb);
     177
     178    /*
     179     * Test #1: Check that we can keep it consistent for a while.
     180     */
    92181    g_usBs3TestStep = 3;
    93     for (iLoops = 0; iLoops < _4M*16; iLoops++) /** @todo adjust counter. will hardcode for now and do timers later so day... */
     182    for (iLoop = 0; iLoop < _1M; iLoop++) /** @todo adjust counter. will hardcode for now and do timers later so day... */
     183        CHECK_STATE(nop);
     184
     185    /*
     186     * Test #2: Use various FPU, SSE and weird instructions to do MMIO writes.
     187     *
     188     * We'll use the VMMDev readback register if possible, but make do
     189     * with VGA if not configured.
     190     */
     191    g_usBs3TestStep = 4;
     192    for (iLoop = 0; iLoop < _128K; iLoop++) /** @todo adjust counter. will hardcode for now and do timers later so day... */
    94193    {
    95         TMPL_NM(bs3FpuState1_Save)(pChecking);
    96         if (Bs3MemCmp(pExpected, pChecking, sizeof(*pExpected)) != 0)
    97         {
    98             Bs3TestFailedF("State differs after %RU32 save loops\n", iLoops);
    99             return 1;
    100         }
     194        unsigned off;
     195        uint8_t  abCompare[64];
     196        uint8_t  abReadback[64];
     197
     198        /* Macros  */
     199# undef  CHECK_READBACK_WRITE_RUN
     200# define CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type) \
     201            do { \
     202                off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
     203                if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
     204                    off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
     205                a_Worker((a_Type *)&MmioReg.pb[off]); \
     206                if (fMmioReadback && (!fReadBackError || iLoop == 0)) \
     207                { \
     208                    a_Worker((a_Type *)&abCompare[0]); \
     209                    Bs3MemCpy(abReadback, &MmioReg.pb[off], sizeof(a_Type)); \
     210                    if (Bs3MemCmp(abReadback, abCompare, sizeof(a_Type)) != 0) \
     211                    { \
     212                        Bs3TestFailedF("Read back error for " #a_Instr " in loop #%RU32:\n%.*Rhxs expected:\n%.*Rhxs\n", \
     213                                       iLoop, sizeof(a_Type), abReadback, sizeof(a_Type), abCompare); \
     214                        fReadBackError = true; \
     215                    } \
     216                } \
     217            } while (0)
     218
     219# undef  CHECK_READBACK_WRITE
     220# define CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type) \
     221            CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type); \
     222            CHECK_STATE(a_Instr)
     223# undef  CHECK_READBACK_WRITE_Z
     224# define CHECK_READBACK_WRITE_Z(a_Instr, a_Worker, a_Type) \
     225            do { \
     226                if (fMmioReadback && (!fReadBackError || iLoop == 0)) \
     227                { \
     228                    Bs3MemZero(&abCompare[0], sizeof(a_Type)); \
     229                    off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
     230                    if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
     231                        off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
     232                    Bs3MemZero(&MmioReg.pb[off], sizeof(a_Type)); \
     233                } \
     234                CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type); \
     235            } while (0)
     236
     237# undef  CHECK_READBACK_READ_RUN
     238# define CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type) \
     239            do { \
     240                off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
     241                if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
     242                    off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
     243                a_Worker((a_Type *)&MmioReg.pb[off]); \
     244                TMPL_NM(bs3FpuState1_Save)(pChecking); \
     245            } while (0)
     246# undef  CHECK_READBACK_READ
     247# define CHECK_READBACK_READ(a_Instr, a_Worker, a_Type) \
     248            CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type); \
     249            CHECK_STATE(a_Instr)
     250
     251
     252        /* The tests. */
     253        CHECK_READBACK_WRITE_Z(SIDT,     ASMGetIDTR,                         RTIDTR);
     254        CHECK_READBACK_WRITE_Z(FNSTENV,  TMPL_NM(bs3FpuState1_FNStEnv),      X86FSTENV32P); /** @todo x86.h is missing types */
     255        CHECK_READBACK_WRITE(  MOVDQU,   TMPL_NM(bs3FpuState1_MovDQU_Write), X86XMMREG);
     256        CHECK_READBACK_READ(   MOVDQU,   TMPL_NM(bs3FpuState1_MovDQU_Read),  X86XMMREG);
     257
     258        /* Using the FPU is a little complicated, but we really need to check these things. */
     259        CHECK_READBACK_READ_RUN(FMUL,    TMPL_NM(bs3FpuState1_FMul),         uint64_t);
     260        pExpected->FOP    = 0x7dc;
     261# if ARCH_BITS == 64
     262        pExpected->FPUDP  = (uint32_t) (uintptr_t)&MmioReg.pb[off];
     263        pExpected->DS     = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 32);
     264        pExpected->Rsrvd2 = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 48);
     265# elif BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
     266        pExpected->FPUDP  = Bs3SelPtrToFlat(&MmioReg.pb[off]);
     267# else
     268        pExpected->FPUDP  = BS3_FP_OFF(&MmioReg.pb[off]);
     269# endif
     270        CHECK_STATE(FMUL);
    101271    }
    102272
    … …  
    106276#endif /* BS3_INSTANTIATING_MODE */
    107277
    108 

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-fpustate-1-template.mac

    r61315 r61385  
    4141; Initializes the FPU state and saves it to pFxState.
    4242;
    43 ; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR *pFxState);
     43; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR *pFxState, void *pvMmioReg);
    4444;
    4545BS3_PROC_BEGIN_MODE bs3FpuState1_InitState, BS3_PBC_NEAR
    46         BS3_CALL_CONV_PROLOG 1
     46        BS3_CALL_CONV_PROLOG 2
    4747        push    xBP
    4848        mov     xBP, xSP
    … …  
    5050TONLY16 push    ds
    5151        pushf
     52TONLY64 sub     xSP, 20h
    5253
    5354        ;
    … …  
    5556        ;
    5657        fninit
    57         fld dword [TMPL_DATA16_WRT(g_r32V1)]
    58         fld qword [TMPL_DATA16_WRT(g_r64V1)]
    59         fld tword [TMPL_DATA16_WRT(g_r80V1)]
    60         fld qword [TMPL_DATA16_WRT(g_r64V1)]
    61         fld dword [TMPL_DATA16_WRT(g_r32V2)]
    62         fld dword [TMPL_DATA16_WRT(g_r80_QNaNMax)]
    63         fld tword [TMPL_DATA16_WRT(g_r80_ThirtyTwo)]
    64         fld tword [TMPL_DATA16_WRT(g_r80_SNaNMax)]
    65         ;; @todo status regs
    66 
     58        fld     dword [TMPL_DATA16_WRT(g_r32V1)]
     59        fld     qword [TMPL_DATA16_WRT(g_r64V1)]
     60        fld     tword [TMPL_DATA16_WRT(g_r80V1)]
     61        fld     qword [TMPL_DATA16_WRT(g_r64V1)]
     62        fld     dword [TMPL_DATA16_WRT(g_r32V2)]
     63        fld     dword [TMPL_DATA16_WRT(g_r80_QNaNMax)]
     64        fld     tword [TMPL_DATA16_WRT(g_r80_SNaNMax)]
     65        fld     tword [TMPL_DATA16_WRT(g_r80_ThirtyTwo)]
     66
     67        ;
     68        ; We'll later be using FMUL to test actually using the FPU in RC & R0,
     69        ; so for everything to line up correctly with FPU CS:IP and FPU DS:DP,
     70        ; we'll call the function here too.  This has the benefitial side effect
     71        ; of loading correct FPU DS/DS values so we can check that they don't
     72        ; get lost either.  Also, we now don't have to guess whether the CPU
     73        ; emulation sets CS/DS or not.
     74        ;
     75TONLY16 push    xPRE [xBP + xCB + cbCurRetAddr + sCB + 2]
     76        push    xPRE [xBP + xCB + cbCurRetAddr + sCB]
     77        BS3_CALL TMPL_NM(bs3FpuState1_FMul), 1
     78        add     xSP, sCB
    6779
    6880        ;
    … …  
    110122
    111123.return:
     124TONLY64 add     xSP, 20h
    112125        popf
    113126TONLY16 pop     ds
    … …  
    115128        mov     xSP, xBP
    116129        pop     xBP
    117         BS3_CALL_CONV_EPILOG 1
     130        BS3_CALL_CONV_EPILOG 2
    118131        BS3_HYBRID_RET
    119132BS3_PROC_END_MODE   bs3FpuState1_InitState
    … …  
    181194
    182195
     196;;
     197; Performs a MOVDQU write on the specified memory.
     198;
     199; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Write)(void *pvMmioReg);
     200;
     201BS3_PROC_BEGIN_MODE bs3FpuState1_MovDQU_Write, BS3_PBC_NEAR
     202        BS3_CALL_CONV_PROLOG 1
     203        push    xBP
     204        mov     xBP, xSP
     205        push    xBX
     206TONLY16 push    ds
     207
     208        ; Load the register pointer.
     209        mov     xBX, [xBP + xCB + cbCurRetAddr]
     210TONLY16 mov     ds,  [xBP + xCB + cbCurRetAddr + 2]
     211
     212        ; Do read.
     213        movdqu  [xBX], xmm3
     214
     215TONLY16 pop     ds
     216        pop     xBX
     217        leave
     218        BS3_CALL_CONV_EPILOG 1
     219        BS3_HYBRID_RET
     220BS3_PROC_END_MODE   bs3FpuState1_MovDQU_Write
     221
     222
     223;;
     224; Performs a MOVDQU write to the specified memory.
     225;
     226; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Read)(void *pvMmioReg);
     227;
     228BS3_PROC_BEGIN_MODE bs3FpuState1_MovDQU_Read, BS3_PBC_NEAR
     229        BS3_CALL_CONV_PROLOG 1
     230        push    xBP
     231        mov     xBP, xSP
     232        push    xBX
     233TONLY16 push    ds
     234        sub     xSP, 20h
     235%if TMPL_BITS == 16
     236        movdqu  [xBP - xCB - xCB - 2 - 18h], xmm2
     237%else
     238        movdqu  [xSP], xmm2
     239%endif
     240
     241        ; Load the register pointer.
     242        mov     xBX, [xBP + xCB + cbCurRetAddr]
     243TONLY16 mov     ds,  [xBP + xCB + cbCurRetAddr + 2]
     244
     245
     246        ; Do read.
     247        movdqu  xmm2, [xBX]
     248
     249%if TMPL_BITS == 16
     250        movdqu  xmm2, [xBP - xCB - xCB - 2 - 18h]
     251%else
     252        movdqu  xmm2, [xSP]
     253%endif
     254        add     xSP, 20h
     255TONLY16 pop     ds
     256        pop     xBX
     257        mov     xSP, xBP
     258        pop     xBP
     259        BS3_CALL_CONV_EPILOG 1
     260        BS3_HYBRID_RET
     261BS3_PROC_END_MODE   bs3FpuState1_MovDQU_Read
     262
     263
     264;;
     265; Performs a FNSTENV write on the specified memory.
     266;
     267; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FNStEnv)(void *pvMmioReg);
     268;
     269BS3_PROC_BEGIN_MODE bs3FpuState1_FNStEnv, BS3_PBC_NEAR
     270        BS3_CALL_CONV_PROLOG 1
     271        push    xBP
     272        mov     xBP, xSP
     273        push    xBX
     274TONLY16 push    ds
     275
     276        ; Load the register pointer.
     277        mov     xBX, [xBP + xCB + cbCurRetAddr]
     278TONLY16 mov     ds,  [xBP + xCB + cbCurRetAddr + 2]
     279
     280        ; Just write.
     281        fnstenv [xBX]
     282
     283TONLY16 pop     ds
     284        pop     xBX
     285        mov     xSP, xBP
     286        pop     xBP
     287        BS3_CALL_CONV_EPILOG 1
     288        BS3_HYBRID_RET
     289BS3_PROC_END_MODE   bs3FpuState1_FNStEnv
     290
     291
     292;;
     293; Performs a FMUL on the specified memory, after writing a 64-bit value to it first.
     294;
     295; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FMul)(void *pvMmioReg);
     296;
     297BS3_PROC_BEGIN_MODE bs3FpuState1_FMul, BS3_PBC_NEAR
     298        BS3_CALL_CONV_PROLOG 1
     299        push    xBP
     300        mov     xBP, xSP
     301        push    xBX
     302TONLY16 push    ds
     303
     304        ; Load the value we'll be multiplying with into register(s) while ds is DATA16.
     305        mov     sAX, [TMPL_DATA16_WRT(g_r64_One)]
     306TNOT64  mov     edx, [4 + TMPL_DATA16_WRT(g_r64_One)]
     307
     308        ; Load the register pointer.
     309        mov     xBX, [xBP + xCB + cbCurRetAddr]
     310TONLY16 mov     ds,  [xBP + xCB + cbCurRetAddr + 2]
     311
     312        ; Just write.
     313        mov     [xBX], sAX
     314TNOT64  mov     [xBX + 4], edx
     315        call    .do_it
     316
     317TONLY16 pop     ds
     318        pop     xBX
     319        mov     xSP, xBP
     320        pop     xBP
     321        BS3_CALL_CONV_EPILOG 1
     322        BS3_HYBRID_RET
     323.do_it:
     324        fmul    qword [xBX]
     325        ret
     326BS3_PROC_END_MODE   bs3FpuState1_FMul
     327
     328
    183329%include "bs3kit-template-footer.mac"   ; reset environment
    184330

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-fpustate-1.c

    r61317 r61385  
    4646    {
    4747        /*pszSubTest =*/ "corruption",
    48         /*RM*/        NULL, //bs3FpuState1_Corruption_rm,
     48        /*RM*/        bs3FpuState1_Corruption_rm,
    4949        /*PE16*/      NULL, //bs3FpuState1_Corruption_pe16,
    5050        /*PE16_32*/   NULL, //bs3FpuState1_Corruption_pe16_32,
    5151        /*PE16_V86*/  NULL, //bs3FpuState1_Corruption_pe16_v86,
    52         /*PE32*/      NULL, //bs3FpuState1_Corruption_pe32,
     52        /*PE32*/      bs3FpuState1_Corruption_pe32,
    5353        /*PE32_16*/   NULL, //bs3FpuState1_Corruption_pe32_16,
    5454        /*PEV86*/     NULL, //bs3FpuState1_Corruption_pev86,
    … …  
    8181
    8282    Bs3TestTerm();
    83 for (;;) { ASMHalt(); }
    8483}
    8584
    8685
     86

  • trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-rm-InitMemory.c

    r60686 r61385  
    3232#include "bs3-cmn-memory.h"
    3333#include <iprt/asm.h>
     34#include <VBox/VMMDevTesting.h>
    3435
    3536
    … …  
    248249BS3_DECL(void) BS3_FAR_CODE Bs3InitMemory_rm_far(void)
    249250{
    250     uint16_t        i;
    251     uint16_t        cPages;
    252     uint32_t        u32;
    253     INT15E820ENTRY  Entry;
     251    uint16_t            i;
     252    uint16_t            cPages;
     253    uint32_t            u32;
     254    INT15E820ENTRY      Entry;
     255    uint32_t BS3_FAR   *pu32Mmio;
    254256
    255257    /*
    … …  
    332334
    333335    /*
     336     * Check if we've got the VMMDev MMIO testing memory mapped above 1MB.
     337     */
     338    pu32Mmio = (uint32_t BS3_FAR *)BS3_FP_MAKE(VMMDEV_TESTING_MMIO_RM_SEL,
     339                                               VMMDEV_TESTING_MMIO_RM_OFF2(VMMDEV_TESTING_MMIO_OFF_NOP));
     340    if (*pu32Mmio == VMMDEV_TESTING_NOP_RET)
     341    {
     342        Bs3Printf("Memory: Found VMMDev MMIO testing region\n");
     343        if (!ASMBitTestAndSet(g_Bs3Mem4KUpperTiled.Core.bmAllocated, 1))
     344            g_Bs3Mem4KUpperTiled.Core.cFreeChunks--;
     345
     346    }
     347
     348    /*
    334349     * Initialize the slab lists.
    335350     */

  • trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3kit.h

    r60777 r61385  
    31643164 * Basic CPU detection.
    31653165 *
    3166  * This sets the #g_bBs3CpuDetected global variable to the return value.
     3166 * This sets the #g_uBs3CpuDetected global variable to the return value.
    31673167 *
    31683168 * @returns BS3CPU_XXX value with the BS3CPU_F_CPUID flag set depending on
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