VirtualBox

Changeset 61794 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Jun 21, 2016 2:11:06 PM (8 years ago)
Author:
vboxsync
Message:

VMM/APIC: Cleanup.

Location:
trunk/src/VBox/VMM
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/APICAll.cpp

    r61776 r61794  
    529529            {
    530530                Log2(("APIC%u: apicSignalNextPendingIntr: Signaling pending interrupt. uVector=%#x\n", pVCpu->idCpu, uVector));
    531                 APICSetInterruptFF(pVCpu, PDMAPICIRQ_HARDWARE);
     531                apicSetInterruptFF(pVCpu, PDMAPICIRQ_HARDWARE);
    532532            }
    533533            else
    … …  
    541541    {
    542542        Log2(("APIC%u: apicSignalNextPendingIntr: APIC software-disabled, clearing pending interrupt\n", pVCpu->idCpu));
    543         APICClearInterruptFF(pVCpu, PDMAPICIRQ_HARDWARE);
     543        apicClearInterruptFF(pVCpu, PDMAPICIRQ_HARDWARE);
    544544    }
    545545}
    … …  
    614614                if (   VMCPUSET_IS_PRESENT(pDestCpuSet, idCpu)
    615615                    && apicIsEnabled(&pVM->aCpus[idCpu]))
    616                     APICPostInterrupt(&pVM->aCpus[idCpu], uVector, enmTriggerMode);
     616                    apicPostInterrupt(&pVM->aCpus[idCpu], uVector, enmTriggerMode);
    617617            }
    618618            break;
    … …  
    624624            if (   idCpu < pVM->cCpus
    625625                && apicIsEnabled(&pVM->aCpus[idCpu]))
    626                 APICPostInterrupt(&pVM->aCpus[idCpu], uVector, enmTriggerMode);
     626                apicPostInterrupt(&pVM->aCpus[idCpu], uVector, enmTriggerMode);
    627627            else
    628628                Log2(("APIC: apicSendIntr: No CPU found for lowest-priority delivery mode!\n"));
    … …  
    637637                {
    638638                    Log2(("APIC: apicSendIntr: Raising SMI on VCPU%u\n", idCpu));
    639                     APICSetInterruptFF(&pVM->aCpus[idCpu], PDMAPICIRQ_SMI);
     639                    apicSetInterruptFF(&pVM->aCpus[idCpu], PDMAPICIRQ_SMI);
    640640                }
    641641            }
    … …  
    651651                {
    652652                    Log2(("APIC: apicSendIntr: Raising NMI on VCPU%u\n", idCpu));
    653                     APICSetInterruptFF(&pVM->aCpus[idCpu], PDMAPICIRQ_NMI);
     653                    apicSetInterruptFF(&pVM->aCpus[idCpu], PDMAPICIRQ_NMI);
    654654                }
    655655            }
    … …  
    696696                {
    697697                    Log2(("APIC: apicSendIntr: Raising EXTINT on VCPU%u\n", idCpu));
    698                     APICSetInterruptFF(&pVM->aCpus[idCpu], PDMAPICIRQ_EXTINT);
     698                    apicSetInterruptFF(&pVM->aCpus[idCpu], PDMAPICIRQ_EXTINT);
    699699                }
    700700            break;
    … …  
    14191419        pXApicPage->timer_ccr.u32CurrentCount = uInitialCount;
    14201420        if (uInitialCount)
    1421             APICStartTimer(pVCpu, uInitialCount);
     1421            apicStartTimer(pVCpu, uInitialCount);
    14221422        else
    1423             APICStopTimer(pVCpu);
     1423            apicStopTimer(pVCpu);
    14241424        TMTimerUnlock(pTimer);
    14251425    }
    … …  
    17931793 * @interface_method_impl{PDMAPICREG,pfnReadMsrR3}
    17941794 */
    1795 VMMDECL(VBOXSTRICTRC) APICReadMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Value)
     1795VMM_INT_DECL(VBOXSTRICTRC) apicReadMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Value)
    17961796{
    17971797    /*
    … …  
    19001900 * @interface_method_impl{PDMAPICREG,pfnWriteMsrR3}
    19011901 */
    1902 VMMDECL(VBOXSTRICTRC) APICWriteMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Value)
     1902VMM_INT_DECL(VBOXSTRICTRC) apicWriteMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Value)
    19031903{
    19041904    /*
    … …  
    19901990            {
    19911991                uint8_t const uVector = XAPIC_SELF_IPI_GET_VECTOR(u32Value);
    1992                 APICPostInterrupt(pVCpu, uVector, XAPICTRIGGERMODE_EDGE);
     1992                apicPostInterrupt(pVCpu, uVector, XAPICTRIGGERMODE_EDGE);
    19931993                rcStrict = VINF_SUCCESS;
    19941994                break;
    … …  
    20372037 * @interface_method_impl{PDMAPICREG,pfnSetBaseMsrR3}
    20382038 */
    2039 VMMDECL(VBOXSTRICTRC) APICSetBaseMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t u64BaseMsr)
     2039VMMDECL(VBOXSTRICTRC) apicSetBaseMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t u64BaseMsr)
    20402040{
    20412041    Assert(pVCpu);
    … …  
    20942094                 * need to update the CPUID leaf ourselves.
    20952095                 */
    2096                 APICR3Reset(pVCpu, false /* fResetApicBaseMsr */);
     2096                apicR3ResetEx(pVCpu, false /* fResetApicBaseMsr */);
    20972097                uBaseMsr &= ~(MSR_IA32_APICBASE_EN | MSR_IA32_APICBASE_EXTD);
    20982098                CPUMSetGuestCpuIdPerCpuApicFeature(pVCpu, false /*fVisible*/);
    … …  
    21742174 * @interface_method_impl{PDMAPICREG,pfnGetBaseMsrR3}
    21752175 */
    2176 VMMDECL(uint64_t) APICGetBaseMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu)
     2176VMM_INT_DECL(uint64_t) apicGetBaseMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu)
    21772177{
    21782178    VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
    … …  
    21862186 * @interface_method_impl{PDMAPICREG,pfnSetTprR3}
    21872187 */
    2188 VMMDECL(void) APICSetTpr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr)
     2188VMM_INT_DECL(void) apicSetTpr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr)
    21892189{
    21902190    apicSetTpr(pVCpu, u8Tpr);
    … …  
    22182218 * @interface_method_impl{PDMAPICREG,pfnGetTprR3}
    22192219 */
    2220 VMMDECL(uint8_t) APICGetTpr(PPDMDEVINS pDevIns, PVMCPU pVCpu, bool *pfPending, uint8_t *pu8PendingIntr)
     2220VMMDECL(uint8_t) apicGetTpr(PPDMDEVINS pDevIns, PVMCPU pVCpu, bool *pfPending, uint8_t *pu8PendingIntr)
    22212221{
    22222222    VMCPU_ASSERT_EMT(pVCpu);
    … …  
    22392239 * @interface_method_impl{PDMAPICREG,pfnGetTimerFreqR3}
    22402240 */
    2241 VMMDECL(uint64_t) APICGetTimerFreq(PPDMDEVINS pDevIns)
     2241VMM_INT_DECL(uint64_t) apicGetTimerFreq(PPDMDEVINS pDevIns)
    22422242{
    22432243    PVM      pVM      = PDMDevHlpGetVM(pDevIns);
    … …  
    22532253 * @remarks This is a private interface between the IOAPIC and the APIC.
    22542254 */
    2255 VMMDECL(int) APICBusDeliver(PPDMDEVINS pDevIns, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
     2255VMM_INT_DECL(int) apicBusDeliver(PPDMDEVINS pDevIns, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
    22562256                            uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc)
    22572257{
    … …  
    22872287 * @remarks This is a private interface between the PIC and the APIC.
    22882288 */
    2289 VMMDECL(VBOXSTRICTRC) APICLocalInterrupt(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level, int rcRZ)
     2289VMM_INT_DECL(VBOXSTRICTRC) apicLocalInterrupt(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level, int rcRZ)
    22902290{
    22912291    NOREF(pDevIns);
    … …  
    24012401                          u8Level ? "Raising" : "Lowering", u8Pin));
    24022402                    if (u8Level)
    2403                         APICSetInterruptFF(pVCpu, PDMAPICIRQ_EXTINT);
     2403                        apicSetInterruptFF(pVCpu, PDMAPICIRQ_EXTINT);
    24042404                    else
    2405                         APICClearInterruptFF(pVCpu, PDMAPICIRQ_EXTINT);
     2405                        apicClearInterruptFF(pVCpu, PDMAPICIRQ_EXTINT);
    24062406                    break;
    24072407                }
    … …  
    24292429                  u8Level ? "raising" : "lowering"));
    24302430            if (u8Level)
    2431                 APICSetInterruptFF(pVCpu, PDMAPICIRQ_EXTINT);
     2431                apicSetInterruptFF(pVCpu, PDMAPICIRQ_EXTINT);
    24322432            else
    2433                 APICClearInterruptFF(pVCpu, PDMAPICIRQ_EXTINT);
     2433                apicClearInterruptFF(pVCpu, PDMAPICIRQ_EXTINT);
    24342434        }
    24352435        else
    … …  
    24372437            /* LINT1 behaves as NMI. */
    24382438            Log2(("APIC%u: APICLocalInterrupt: APIC hardware-disabled, raising NMI\n", pVCpu->idCpu));
    2439             APICSetInterruptFF(pVCpu, PDMAPICIRQ_NMI);
     2439            apicSetInterruptFF(pVCpu, PDMAPICIRQ_NMI);
    24402440        }
    24412441    }
    … …  
    24482448 * @interface_method_impl{PDMAPICREG,pfnGetInterruptR3}
    24492449 */
    2450 VMMDECL(int) APICGetInterrupt(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc)
     2450VMM_INT_DECL(int) apicGetInterrupt(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc)
    24512451{
    24522452    VMCPU_ASSERT_EMT(pVCpu);
    … …  
    25202520 * @callback_method_impl{FNIOMMMIOREAD}
    25212521 */
    2522 VMMDECL(int) APICReadMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
     2522VMM_INT_DECL(int) apicReadMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
    25232523{
    25242524    NOREF(pvUser);
    … …  
    25442544 * @callback_method_impl{FNIOMMMIOWRITE}
    25452545 */
    2546 VMMDECL(int) APICWriteMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
     2546VMM_INT_DECL(int) apicWriteMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
    25472547{
    25482548    NOREF(pvUser);
    … …  
    25572557    STAM_COUNTER_INC(&pVCpu->apic.s.CTX_SUFF(StatMmioWrite));
    25582558
    2559     Log2(("APIC%u: APICWriteMmio: offReg=%#RX16 uValue=%#RX32\n", pVCpu->idCpu, offReg, uValue));
     2559    Log2(("APIC%u: apicWriteMmio: offReg=%#RX16 uValue=%#RX32\n", pVCpu->idCpu, offReg, uValue));
    25602560
    25612561    int rc = VBOXSTRICTRC_VAL(apicWriteRegister(pApicDev, pVCpu, offReg, uValue));
    … …  
    25702570 * @param   enmType         The IRQ type.
    25712571 */
    2572 VMMDECL(void) APICSetInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType)
     2572VMM_INT_DECL(void) apicSetInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType)
    25732573{
    25742574    PVM      pVM      = pVCpu->CTX_SUFF(pVM);
    … …  
    25842584 * @param   enmType         The IRQ type.
    25852585 */
    2586 VMMDECL(void) APICClearInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType)
     2586VMM_INT_DECL(void) apicClearInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType)
    25872587{
    25882588    PVM      pVM      = pVCpu->CTX_SUFF(pVM);
    … …  
    26062606 * @thread  Any.
    26072607 */
    2608 VMM_INT_DECL(void) APICPostInterrupt(PVMCPU pVCpu, uint8_t uVector, XAPICTRIGGERMODE enmTriggerMode)
     2608VMM_INT_DECL(void) apicPostInterrupt(PVMCPU pVCpu, uint8_t uVector, XAPICTRIGGERMODE enmTriggerMode)
    26092609{
    26102610    Assert(pVCpu);
    … …  
    26422642                    {
    26432643                        Log2(("APIC: APICPostInterrupt: Setting UPDATE_APIC FF for edge-triggered intr. uVector=%#x\n", uVector));
    2644                         APICSetInterruptFF(pVCpu, PDMAPICIRQ_UPDATE_PENDING);
     2644                        apicSetInterruptFF(pVCpu, PDMAPICIRQ_UPDATE_PENDING);
    26452645                    }
    26462646                }
    … …  
    26572657                {
    26582658                    Log2(("APIC: APICPostInterrupt: Setting UPDATE_APIC FF for level-triggered intr. uVector=%#x\n", uVector));
    2659                     APICSetInterruptFF(pVCpu, PDMAPICIRQ_UPDATE_PENDING);
     2659                    apicSetInterruptFF(pVCpu, PDMAPICIRQ_UPDATE_PENDING);
    26602660                }
    26612661            }
    … …  
    26832683 * @thread  Any.
    26842684 */
    2685 VMM_INT_DECL(void) APICStartTimer(PVMCPU pVCpu, uint32_t uInitialCount)
     2685VMM_INT_DECL(void) apicStartTimer(PVMCPU pVCpu, uint32_t uInitialCount)
    26862686{
    26872687    Assert(pVCpu);
    … …  
    27152715 * @thread  Any.
    27162716 */
    2717 VMM_INT_DECL(void) APICStopTimer(PVMCPU pVCpu)
     2717VMM_INT_DECL(void) apicStopTimer(PVMCPU pVCpu)
    27182718{
    27192719    Assert(pVCpu);

  • trunk/src/VBox/VMM/VMMR3/APIC.cpp

    r61777 r61794  
    292292 * @param   fResetApicBaseMsr   Whether to reset the APIC base MSR.
    293293 */
    294 VMMR3_INT_DECL(void) APICR3Reset(PVMCPU pVCpu, bool fResetApicBaseMsr)
     294VMMR3_INT_DECL(void) apicR3ResetEx(PVMCPU pVCpu, bool fResetApicBaseMsr)
    295295{
    296296    VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
    … …  
    12461246        uint8_t uVector = XAPIC_LVT_GET_VECTOR(uLvtTimer);
    12471247        Log2(("APIC%u: apicR3TimerCallback: Raising timer interrupt. uVector=%#x\n", pVCpu->idCpu, uVector));
    1248         APICPostInterrupt(pVCpu, uVector, XAPICTRIGGERMODE_EDGE);
     1248        apicPostInterrupt(pVCpu, uVector, XAPICTRIGGERMODE_EDGE);
    12491249    }
    12501250
    … …  
    12601260            {
    12611261                Log2(("APIC%u: apicR3TimerCallback: Re-arming timer. uInitialCount=%#RX32\n", pVCpu->idCpu, uInitialCount));
    1262                 APICStartTimer(pVCpu, uInitialCount);
     1262                apicStartTimer(pVCpu, uInitialCount);
    12631263            }
    12641264            break;
    … …  
    13011301            TMTimerStop(pApicCpu->pTimerR3);
    13021302
    1303         APICR3Reset(pVCpuDest, true /* fResetApicBaseMsr */);
     1303        apicR3ResetEx(pVCpuDest, true /* fResetApicBaseMsr */);
    13041304
    13051305        /* Clear the interrupt pending force flag. */
    1306         APICClearInterruptFF(pVCpuDest, PDMAPICIRQ_HARDWARE);
     1306        apicClearInterruptFF(pVCpuDest, PDMAPICIRQ_HARDWARE);
    13071307    }
    13081308}
    … …  
    15051505                /* Initialize the virtual-APIC state. */
    15061506                RT_BZERO(pApicCpu->pvApicPageR3, pApicCpu->cbApicPage);
    1507                 APICR3Reset(pVCpu, true /* fResetApicBaseMsr */);
     1507                apicR3ResetEx(pVCpu, true /* fResetApicBaseMsr */);
    15081508
    15091509#ifdef DEBUG_ramshankar
    … …  
    16551655    RT_ZERO(ApicReg);
    16561656    ApicReg.u32Version              = PDM_APICREG_VERSION;
    1657     ApicReg.pfnGetInterruptR3       = APICGetInterrupt;
    1658     ApicReg.pfnSetBaseMsrR3         = APICSetBaseMsr;
    1659     ApicReg.pfnGetBaseMsrR3         = APICGetBaseMsr;
    1660     ApicReg.pfnSetTprR3             = APICSetTpr;
    1661     ApicReg.pfnGetTprR3             = APICGetTpr;
    1662     ApicReg.pfnWriteMsrR3           = APICWriteMsr;
    1663     ApicReg.pfnReadMsrR3            = APICReadMsr;
    1664     ApicReg.pfnBusDeliverR3         = APICBusDeliver;
    1665     ApicReg.pfnLocalInterruptR3     = APICLocalInterrupt;
    1666     ApicReg.pfnGetTimerFreqR3       = APICGetTimerFreq;
     1657    ApicReg.pfnGetInterruptR3       = apicGetInterrupt;
     1658    ApicReg.pfnSetBaseMsrR3         = apicSetBaseMsr;
     1659    ApicReg.pfnGetBaseMsrR3         = apicGetBaseMsr;
     1660    ApicReg.pfnSetTprR3             = apicSetTpr;
     1661    ApicReg.pfnGetTprR3             = apicGetTpr;
     1662    ApicReg.pfnWriteMsrR3           = apicWriteMsr;
     1663    ApicReg.pfnReadMsrR3            = apicReadMsr;
     1664    ApicReg.pfnBusDeliverR3         = apicBusDeliver;
     1665    ApicReg.pfnLocalInterruptR3     = apicLocalInterrupt;
     1666    ApicReg.pfnGetTimerFreqR3       = apicGetTimerFreq;
    16671667
    16681668    /*
    … …  
    16721672     */
    16731673    {
    1674         ApicReg.pszGetInterruptRC   = "APICGetInterrupt";
    1675         ApicReg.pszSetBaseMsrRC     = "APICSetBaseMsr";
    1676         ApicReg.pszGetBaseMsrRC     = "APICGetBaseMsr";
    1677         ApicReg.pszSetTprRC         = "APICSetTpr";
    1678         ApicReg.pszGetTprRC         = "APICGetTpr";
    1679         ApicReg.pszWriteMsrRC       = "APICWriteMsr";
    1680         ApicReg.pszReadMsrRC        = "APICReadMsr";
    1681         ApicReg.pszBusDeliverRC     = "APICBusDeliver";
    1682         ApicReg.pszLocalInterruptRC = "APICLocalInterrupt";
    1683         ApicReg.pszGetTimerFreqRC   = "APICGetTimerFreq";
    1684 
    1685         ApicReg.pszGetInterruptR0   = "APICGetInterrupt";
    1686         ApicReg.pszSetBaseMsrR0     = "APICSetBaseMsr";
    1687         ApicReg.pszGetBaseMsrR0     = "APICGetBaseMsr";
    1688         ApicReg.pszSetTprR0         = "APICSetTpr";
    1689         ApicReg.pszGetTprR0         = "APICGetTpr";
    1690         ApicReg.pszWriteMsrR0       = "APICWriteMsr";
    1691         ApicReg.pszReadMsrR0        = "APICReadMsr";
    1692         ApicReg.pszBusDeliverR0     = "APICBusDeliver";
    1693         ApicReg.pszLocalInterruptR0 = "APICLocalInterrupt";
    1694         ApicReg.pszGetTimerFreqR0   = "APICGetTimerFreq";
     1674        ApicReg.pszGetInterruptRC   = "apicGetInterrupt";
     1675        ApicReg.pszSetBaseMsrRC     = "apicSetBaseMsr";
     1676        ApicReg.pszGetBaseMsrRC     = "apicGetBaseMsr";
     1677        ApicReg.pszSetTprRC         = "apicSetTpr";
     1678        ApicReg.pszGetTprRC         = "apicGetTpr";
     1679        ApicReg.pszWriteMsrRC       = "apicWriteMsr";
     1680        ApicReg.pszReadMsrRC        = "apicReadMsr";
     1681        ApicReg.pszBusDeliverRC     = "apicBusDeliver";
     1682        ApicReg.pszLocalInterruptRC = "apicLocalInterrupt";
     1683        ApicReg.pszGetTimerFreqRC   = "apicGetTimerFreq";
     1684
     1685        ApicReg.pszGetInterruptR0   = "apicGetInterrupt";
     1686        ApicReg.pszSetBaseMsrR0     = "apicSetBaseMsr";
     1687        ApicReg.pszGetBaseMsrR0     = "apicGetBaseMsr";
     1688        ApicReg.pszSetTprR0         = "apicSetTpr";
     1689        ApicReg.pszGetTprR0         = "apicGetTpr";
     1690        ApicReg.pszWriteMsrR0       = "apicWriteMsr";
     1691        ApicReg.pszReadMsrR0        = "apicReadMsr";
     1692        ApicReg.pszBusDeliverR0     = "apicBusDeliver";
     1693        ApicReg.pszLocalInterruptR0 = "apicLocalInterrupt";
     1694        ApicReg.pszGetTimerFreqR0   = "apicGetTimerFreq";
    16951695    }
    16961696
    … …  
    17241724    rc = PDMDevHlpMMIORegister(pDevIns, GCPhysApicBase, sizeof(XAPICPAGE), NULL /* pvUser */,
    17251725                               IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_DWORD_ZEROED,
    1726                                APICWriteMmio, APICReadMmio, "APIC");
     1726                               apicWriteMmio, apicReadMmio, "APIC");
    17271727    if (RT_FAILURE(rc))
    17281728        return rc;
    … …  
    17331733        pApicDev->pCritSectRC = pApicDev->pApicHlpR3->pfnGetRCCritSect(pDevIns);
    17341734        rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysApicBase, sizeof(XAPICPAGE), NIL_RTRCPTR /*pvUser*/,
    1735                                      "APICWriteMmio", "APICReadMmio");
     1735                                     "apicWriteMmio", "apicReadMmio");
    17361736        if (RT_FAILURE(rc))
    17371737            return rc;
    … …  
    17401740        pApicDev->pCritSectR0 = pApicDev->pApicHlpR3->pfnGetR0CritSect(pDevIns);
    17411741        rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysApicBase, sizeof(XAPICPAGE), NIL_RTR0PTR /*pvUser*/,
    1742                                      "APICWriteMmio", "APICReadMmio");
     1742                                     "apicWriteMmio", "apicReadMmio");
    17431743        if (RT_FAILURE(rc))
    17441744            return rc;

  • trunk/src/VBox/VMM/include/APICInternal.h

    r61776 r61794  
    14081408RT_C_DECLS_BEGIN
    14091409
    1410 const char             *apicGetModeName(APICMODE enmMode);
    1411 const char             *apicGetDestFormatName(XAPICDESTFORMAT enmDestFormat);
    1412 const char             *apicGetDeliveryModeName(XAPICDELIVERYMODE enmDeliveryMode);
    1413 const char             *apicGetDestModeName(XAPICDESTMODE enmDestMode);
    1414 const char             *apicGetTriggerModeName(XAPICTRIGGERMODE enmTriggerMode);
    1415 const char             *apicGetDestShorthandName(XAPICDESTSHORTHAND enmDestShorthand);
    1416 const char             *apicGetTimerModeName(XAPICTIMERMODE enmTimerMode);
    1417 void                    apicHintTimerFreq(PAPICCPU pApicCpu, uint32_t uInitialCount, uint8_t uTimerShift);
    1418 APICMODE                apicGetMode(uint64_t uApicBaseMsr);
    1419 
    1420 VMMDECL(uint64_t)       APICGetBaseMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu);
    1421 VMMDECL(VBOXSTRICTRC)   APICSetBaseMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t uBase);
    1422 VMMDECL(uint8_t)        APICGetTpr(PPDMDEVINS pDevIns, PVMCPU pVCpu, bool *pfPending, uint8_t *pu8PendingIntr);
    1423 VMMDECL(void)           APICSetTpr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr);
    1424 VMMDECL(uint64_t)       APICGetTimerFreq(PPDMDEVINS pDevIns);
    1425 VMMDECL(int)            APICReadMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);
    1426 VMMDECL(int)            APICWriteMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb);
    1427 VMMDECL(VBOXSTRICTRC)   APICReadMsr(PPDMDEVINS pDevIns,  PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Val);
    1428 VMMDECL(VBOXSTRICTRC)   APICWriteMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Val);
    1429 VMMDECL(int)            APICGetInterrupt(PPDMDEVINS pDevIns,  PVMCPU pVCpu, uint8_t *puVector, uint32_t *puTagSrc);
    1430 VMMDECL(void)           APICSetInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType);
    1431 VMMDECL(void)           APICClearInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType);
    1432 VMMDECL(VBOXSTRICTRC)   APICLocalInterrupt(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level, int rcRZ);
    1433 VMMDECL(int)            APICBusDeliver(PPDMDEVINS pDevIns, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode,
    1434                                        uint8_t uVector, uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc);
    1435 
    1436 VMM_INT_DECL(void)      APICPostInterrupt(PVMCPU pVCpu, uint8_t uVector, XAPICTRIGGERMODE enmTriggerMode);
    1437 VMM_INT_DECL(void)      APICStartTimer(PVMCPU pVCpu, uint32_t uInitialCount);
    1438 VMM_INT_DECL(void)      APICStopTimer(PVMCPU pVCpu);
     1410const char                 *apicGetModeName(APICMODE enmMode);
     1411const char                 *apicGetDestFormatName(XAPICDESTFORMAT enmDestFormat);
     1412const char                 *apicGetDeliveryModeName(XAPICDELIVERYMODE enmDeliveryMode);
     1413const char                 *apicGetDestModeName(XAPICDESTMODE enmDestMode);
     1414const char                 *apicGetTriggerModeName(XAPICTRIGGERMODE enmTriggerMode);
     1415const char                 *apicGetDestShorthandName(XAPICDESTSHORTHAND enmDestShorthand);
     1416const char                 *apicGetTimerModeName(XAPICTIMERMODE enmTimerMode);
     1417void                        apicHintTimerFreq(PAPICCPU pApicCpu, uint32_t uInitialCount, uint8_t uTimerShift);
     1418APICMODE                    apicGetMode(uint64_t uApicBaseMsr);
     1419
     1420DECLCALLBACK(uint64_t)      apicGetBaseMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu);
     1421DECLCALLBACK(VBOXSTRICTRC)  apicSetBaseMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t uBase);
     1422DECLCALLBACK(uint8_t)       apicGetTpr(PPDMDEVINS pDevIns, PVMCPU pVCpu, bool *pfPending, uint8_t *pu8PendingIntr);
     1423DECLCALLBACK(void)          apicSetTpr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr);
     1424DECLCALLBACK(uint64_t)      apicGetTimerFreq(PPDMDEVINS pDevIns);
     1425DECLCALLBACK(int)           apicReadMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);
     1426DECLCALLBACK(int)           apicWriteMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb);
     1427DECLCALLBACK(VBOXSTRICTRC)  apicReadMsr(PPDMDEVINS pDevIns,  PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Val);
     1428DECLCALLBACK(VBOXSTRICTRC)  apicWriteMsr(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Val);
     1429DECLCALLBACK(int)           apicGetInterrupt(PPDMDEVINS pDevIns,  PVMCPU pVCpu, uint8_t *puVector, uint32_t *puTagSrc);
     1430DECLCALLBACK(VBOXSTRICTRC)  apicLocalInterrupt(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level, int rcRZ);
     1431DECLCALLBACK(int)           apicBusDeliver(PPDMDEVINS pDevIns, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode,
     1432                                           uint8_t uVector, uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc);
     1433
     1434VMM_INT_DECL(void)          apicPostInterrupt(PVMCPU pVCpu, uint8_t uVector, XAPICTRIGGERMODE enmTriggerMode);
     1435VMM_INT_DECL(void)          apicStartTimer(PVMCPU pVCpu, uint32_t uInitialCount);
     1436VMM_INT_DECL(void)          apicStopTimer(PVMCPU pVCpu);
     1437VMM_INT_DECL(void)          apicSetInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType);
     1438VMM_INT_DECL(void)          apicClearInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType);
     1439
     1440#ifdef IN_RING3
     1441VMMR3_INT_DECL(void)        apicR3ResetEx(PVMCPU pVCpu, bool fResetApicBaseMsr);
     1442#endif
    14391443
    14401444RT_C_DECLS_END
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