Changeset 61994 in vbox for trunk

Timestamp:

Jul 4, 2016 1:35:42 AM (8 years ago)

Author:

vboxsync

Message:

IEM: Uh, right.

File:

• trunk/src/VBox/VMM/include/IEMInternal.h (modified) (4 diffs)

trunk/src/VBox/VMM/include/IEMInternal.h

@@ -292 +292 @@
      * - Bit  3 - pgm phys/virt - not directly writable.
      * - Bit  4 - pgm phys page - not directly readable.
-     * - Bit  5 - tlb entry     - HCPhys member not valid.
+     * - Bit  5 - currently unused.
      * - Bit  6 - page tables   - not dirty (complemented X86_PTE_D).
      * - Bit  7 - tlb entry     - pMappingR3 member not valid.
@@ -306 +306 @@
      */
     uint64_t                fFlagsAndPhysRev;
-    /** The host physical page address (for raw-mode and maybe ring-0). */
-    RTHCPHYS                HCPhys;
-    /** Pointer to the ring-3 mapping. */
+    /** The guest physical page address. */
+    uint64_t                GCPhys;
+    /** Pointer to the ring-3 mapping (possibly also valid in ring-0). */
+#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
     R3PTRTYPE(uint8_t *)    pMappingR3;
+#else
+    R3R0PTRTYPE(uint8_t *)  pMappingR3;
+#endif
 #if HC_ARCH_BITS == 32
     uint32_t                u32Padding1;
@@ -337 +341 @@
     uint64_t            uTlbRevision;
     /** The TLB physical address revision - shadow of PGM variable.
+     *
      * This is actually only 56 bits wide (see IEMTLBENTRY::fFlagsAndPhysRev) and is
      * incremented by adding RT_BIT_64(8).  When it wraps around and becomes zero,
-     * a rendezvous is called and each CPU wipe the IEMTLBENTRY::pMappingR3,
-     * IEMTLBENTRY::HCPhys and bits 3, 4 and 8-63 in IEMTLBENTRY::fFlagsAndPhysRev.
+     * a rendezvous is called and each CPU wipe the IEMTLBENTRY::pMappingR3 as well
+     * as IEMTLBENTRY::fFlagsAndPhysRev bits 63 thru 8, 4, and 3.
      *
      * The initial value is choosen to cause an early wraparound. */
@@ -361 +366 @@
     /** TLB misses because of write access handlers. */
     uint32_t            cTlbMissesWriteHandler;
+    /** TLB misses because no r3(/r0) mapping. */
+    uint32_t            cTlbMissesMapping;
     /** Alignment padding. */
-    uint32_t            au32Padding[4];
+    uint32_t            au32Padding[3];
 } IEMTLB;
 AssertCompileSizeAlignment(IEMTLB, 64);