Changeset 62018 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Jul 5, 2016 8:05:30 AM (9 years ago)
- svn:sync-xref-src-repo-rev:
- 108479
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/APICAll.cpp
r61876 r62018 972 972 /* 973 973 * INIT Level De-assert is not support on Pentium 4 and Xeon processors. 974 * Apparently, this also applies to NMI, SMI, lowest-priority and fixed delivery modes, 975 * see @bugref{8245#c116}. 976 * 974 977 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)" for a table of valid ICR combinations. 975 978 */ 976 if (RT_UNLIKELY( enmDeliveryMode == XAPICDELIVERYMODE_INIT_LEVEL_DEASSERT 977 && enmInitLevel == XAPICINITLEVEL_DEASSERT 978 && enmTriggerMode == XAPICTRIGGERMODE_LEVEL)) 979 { 980 Log2(("APIC%u: INIT level de-assert unsupported, ignoring!\n", pVCpu->idCpu)); 979 if ( enmTriggerMode == XAPICTRIGGERMODE_LEVEL 980 && enmInitLevel == XAPICINITLEVEL_DEASSERT 981 && ( enmDeliveryMode == XAPICDELIVERYMODE_FIXED 982 || enmDeliveryMode == XAPICDELIVERYMODE_LOWEST_PRIO 983 || enmDeliveryMode == XAPICDELIVERYMODE_SMI 984 || enmDeliveryMode == XAPICDELIVERYMODE_NMI 985 || enmDeliveryMode == XAPICDELIVERYMODE_INIT)) 986 { 987 Log2(("APIC%u: %s level de-assert unsupported, ignoring!\n", apicGetDeliveryModeName(enmDeliveryMode), pVCpu->idCpu)); 981 988 return VINF_SUCCESS; 982 989 }
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