Changeset 62076 in vbox for trunk

Timestamp:

Jul 6, 2016 4:37:04 PM (9 years ago)

Author:

vboxsync

Message:

IEM: Make use of the direct CPUMCTX access (VMCPU_INCL_CPUM_GST_CTX).

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAll.cpp (modified) (125 diffs)
• VMMAll/IEMAllCImpl.cpp.h (modified) (83 diffs)
• VMMAll/IEMAllCImplStrInstr.cpp.h (modified) (11 diffs)
• VMMAll/IEMAllInstructions.cpp.h (modified) (2 diffs)
• include/IEMInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -83 +83 @@
 #define IEM_IMPLEMENTS_TASKSWITCH
 
+
 /*********************************************************************************************************************************
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
 #define LOG_GROUP   LOG_GROUP_IEM
+#define VMCPU_INCL_CPUM_GST_CTX
 #include <VBox/vmm/iem.h>
 #include <VBox/vmm/cpum.h>
@@ -292 +294 @@
  * @param   a_pVCpu         The IEM state of the current CPU.
  */
-#define IEM_IS_REAL_OR_V86_MODE(a_pVCpu)    (CPUMIsGuestInRealOrV86ModeEx((a_pVCpu)->iem.s.CTX_SUFF(pCtx)))
+#define IEM_IS_REAL_OR_V86_MODE(a_pVCpu)    (CPUMIsGuestInRealOrV86ModeEx(IEM_GET_CTX(a_pVCpu)))
 
 /**
@@ -298 +300 @@
  *
  * @returns @c true if it is, @c false if not.
- * @param   a_pVCpu         The IEM state of the current CPU.
- */
-#define IEM_IS_V86_MODE(a_pVCpu)            (CPUMIsGuestInV86ModeEx((a_pVCpu)->iem.s.CTX_SUFF(pCtx)))
+ * @param   a_pVCpu         The cross context virtual CPU structure of the calling thread.
+ */
+#define IEM_IS_V86_MODE(a_pVCpu)            (CPUMIsGuestInV86ModeEx(IEM_GET_CTX(a_pVCpu)))
 
 /**
@@ -306 +308 @@
  *
  * @returns @c true if it is, @c false if not.
- * @param   a_pVCpu         The IEM state of the current CPU.
- */
-#define IEM_IS_LONG_MODE(a_pVCpu)           (CPUMIsGuestInLongModeEx((a_pVCpu)->iem.s.CTX_SUFF(pCtx)))
+ * @param   a_pVCpu         The cross context virtual CPU structure of the calling thread.
+ */
+#define IEM_IS_LONG_MODE(a_pVCpu)           (CPUMIsGuestInLongModeEx(IEM_GET_CTX(a_pVCpu)))
 
 /**
@@ -314 +316 @@
  *
  * @returns @c true if it is, @c false if not.
- * @param   a_pVCpu         The IEM state of the current CPU.
- */
-#define IEM_IS_REAL_MODE(a_pVCpu)           (CPUMIsGuestInRealModeEx((a_pVCpu)->iem.s.CTX_SUFF(pCtx)))
+ * @param   a_pVCpu         The cross context virtual CPU structure of the calling thread.
+ */
+#define IEM_IS_REAL_MODE(a_pVCpu)           (CPUMIsGuestInRealModeEx(IEM_GET_CTX(a_pVCpu)))
 
 /**
  * Returns a (const) pointer to the CPUMFEATURES for the guest CPU.
  * @returns PCCPUMFEATURES
- * @param   a_pVCpu         The IEM state of the current CPU.
+ * @param   a_pVCpu         The cross context virtual CPU structure of the calling thread.
  */
 #define IEM_GET_GUEST_CPU_FEATURES(a_pVCpu) (&((a_pVCpu)->CTX_SUFF(pVM)->cpum.ro.GuestFeatures))
@@ -328 +330 @@
  * Returns a (const) pointer to the CPUMFEATURES for the host CPU.
  * @returns PCCPUMFEATURES
- * @param   a_pVCpu         The IEM state of the current CPU.
+ * @param   a_pVCpu         The cross context virtual CPU structure of the calling thread.
  */
 #define IEM_GET_HOST_CPU_FEATURES(a_pVCpu)  (&((a_pVCpu)->CTX_SUFF(pVM)->cpum.ro.HostFeatures))
@@ -821 +823 @@
 DECLINLINE(void) iemInitExec(PVMCPU pVCpu, bool fBypassHandlers)
 {
-    PCPUMCTX pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX const pCtx = IEM_GET_CTX(pVCpu);
 
     Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_IEM));
@@ -906 +908 @@
 DECLINLINE(void) iemInitDecoder(PVMCPU pVCpu, bool fBypassHandlers)
 {
-    PCPUMCTX pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX const pCtx = IEM_GET_CTX(pVCpu);
 
     Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_IEM));
@@ -989 +991 @@
 DECLINLINE(void) iemReInitDecoder(PVMCPU pVCpu)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX const pCtx = IEM_GET_CTX(pVCpu);
 
     Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_IEM));
@@ -1092 +1094 @@
      * First translate CS:rIP to a physical address.
      */
-    PCPUMCTX    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx = IEM_GET_CTX(pVCpu);
     uint32_t    cbToTryRead;
     RTGCPTR     GCPtrPC;
@@ -1252 +1254 @@
      * First translate CS:rIP to a physical address.
      */
-    PCPUMCTX    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx = IEM_GET_CTX(pVCpu);
     uint8_t     cbLeft = pVCpu->iem.s.cbOpcode - pVCpu->iem.s.offOpcode; Assert(cbLeft < cbMin);
     uint32_t    cbToTryRead;
@@ -4357 +4359 @@
                   uint64_t    uCr2)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 #ifdef IN_RING0
     int rc = HMR0EnsureCompleteBasicContext(pVCpu, pCtx);
@@ -4517 +4519 @@
 {
     /** @todo set/clear RF. */
-    pVCpu->iem.s.CTX_SUFF(pCtx)->dr[7] &= ~X86_DR7_GD;
+    IEM_GET_CTX(pVCpu)->dr[7] &= ~X86_DR7_GD;
     return iemRaiseXcptOrInt(pVCpu, 0, X86_XCPT_DB, IEM_XCPT_FLAGS_T_CPU_XCPT, 0, 0);
 }
@@ -4547 +4549 @@
 {
     return iemRaiseXcptOrInt(pVCpu, 0, X86_XCPT_TS, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR,
-                             pVCpu->iem.s.CTX_SUFF(pCtx)->tr.Sel, 0);
+                             IEM_GET_CTX(pVCpu)->tr.Sel, 0);
 }
 
@@ -4721 +4723 @@
 
     if (   (fAccess & IEM_ACCESS_WHAT_MASK) == IEM_ACCESS_WHAT_CODE
-        && (   (pVCpu->iem.s.CTX_SUFF(pCtx)->cr4 & X86_CR4_PAE)
-            && (pVCpu->iem.s.CTX_SUFF(pCtx)->msrEFER & MSR_K6_EFER_NXE) ) )
+        && (   (IEM_GET_CTX(pVCpu)->cr4 & X86_CR4_PAE)
+            && (IEM_GET_CTX(pVCpu)->msrEFER & MSR_K6_EFER_NXE) ) )
         uErr |= X86_TRAP_PF_ID;
 
@@ -4922 +4924 @@
     RTAssertMsg2Weak("%s%s\n", szRegs, szInstr);
 #else
-    RTAssertMsg2Weak("cs:rip=%04x:%RX64\n", pVCpu->iem.s.CTX_SUFF(pCtx)->cs, pVCpu->iem.s.CTX_SUFF(pCtx)->rip);
+    RTAssertMsg2Weak("cs:rip=%04x:%RX64\n", IEM_GET_CTX(pVCpu)->cs, IEM_GET_CTX(pVCpu)->rip);
 #endif
 }
@@ -4996 +4998 @@
 IEM_STATIC PCPUMSELREG iemSRegGetHid(PVMCPU pVCpu, uint8_t iSegReg)
 {
-    PCPUMCTX    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
-
     Assert(iSegReg < X86_SREG_COUNT);
-    AssertCompileAdjacentMembers(CPUMCTX, es, cs);
-    AssertCompileAdjacentMembers(CPUMCTX, cs, ss);
-    AssertCompileAdjacentMembers(CPUMCTX, ss, ds);
-    AssertCompileAdjacentMembers(CPUMCTX, ds, fs);
-    AssertCompileAdjacentMembers(CPUMCTX, fs, gs);
-    PCPUMSELREG pSReg = &pCtx->es + iSegReg;
+    PCPUMCTX    pCtx = IEM_GET_CTX(pVCpu);
+    PCPUMSELREG pSReg = &pCtx->aSRegs[iSegReg];
 
 #ifdef VBOX_WITH_RAW_MODE_NOT_R0
@@ -5048 +5044 @@
 IEM_STATIC uint16_t *iemSRegRef(PVMCPU pVCpu, uint8_t iSegReg)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
+#if 0
+    Assert(iSegReg < X86_SREG_COUNT);
+    return &pCtx->aSRegs[iSegReg].Sel;
+#else
     switch (iSegReg)
     {
@@ -5059 +5059 @@
     }
     AssertFailedReturn(NULL);
+#endif
 }
 
@@ -5071 +5072 @@
 IEM_STATIC uint16_t iemSRegFetchU16(PVMCPU pVCpu, uint8_t iSegReg)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
+#if 0
+    Assert(iSegReg < X86_SREG_COUNT);
+    return pCtx->aSRegs[iSegReg].Sel;
+#else
     switch (iSegReg)
     {
@@ -5082 +5087 @@
     }
     AssertFailedReturn(0xffff);
+#endif
 }
 
@@ -5094 +5100 @@
 IEM_STATIC void *iemGRegRef(PVMCPU pVCpu, uint8_t iReg)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
+#if 0
+    Assert(iReg < 16);
+    return &pCtx->aGRegs[iReg];
+#else
     switch (iReg)
     {
@@ -5115 +5125 @@
     }
     AssertFailedReturn(NULL);
+#endif
 }
 
@@ -5203 +5214 @@
 IEM_STATIC VBOXSTRICTRC iemRegRipRelativeJumpS8(PVMCPU pVCpu, int8_t offNextInstr)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     switch (pVCpu->iem.s.enmEffOpSize)
     {
@@ -5263 +5274 @@
 IEM_STATIC VBOXSTRICTRC iemRegRipRelativeJumpS16(PVMCPU pVCpu, int16_t offNextInstr)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     Assert(pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT);
 
@@ -5293 +5304 @@
 IEM_STATIC VBOXSTRICTRC iemRegRipRelativeJumpS32(PVMCPU pVCpu, int32_t offNextInstr)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     Assert(pVCpu->iem.s.enmEffOpSize != IEMMODE_16BIT);
 
@@ -5334 +5345 @@
 IEM_STATIC VBOXSTRICTRC iemRegRipJump(PVMCPU pVCpu, uint64_t uNewRip)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     switch (pVCpu->iem.s.enmEffOpSize)
     {
@@ -5409 +5420 @@
 IEM_STATIC void iemRegAddToRipKeepRF(PVMCPU pVCpu, uint8_t cbInstr)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     switch (pVCpu->iem.s.enmCpuMode)
     {
@@ -5453 +5464 @@
 IEM_STATIC void iemRegAddToRipAndClearRF(PVMCPU pVCpu, uint8_t cbInstr)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     pCtx->eflags.Bits.u1RF = 0;
@@ -6025 +6036 @@
 IEM_STATIC void iemFpuPushResult(PVMCPU pVCpu, PIEMFPURESULT pResult)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6043 +6054 @@
 IEM_STATIC void iemFpuPushResultWithMemOp(PVMCPU pVCpu, PIEMFPURESULT pResult, uint8_t iEffSeg, RTGCPTR GCPtrEff)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateDP(pVCpu, pCtx, pFpuCtx, iEffSeg, GCPtrEff);
@@ -6060 +6071 @@
 IEM_STATIC void iemFpuPushResultTwo(PVMCPU pVCpu, PIEMFPURESULTTWO pResult)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6115 +6126 @@
 IEM_STATIC void iemFpuStoreResult(PVMCPU pVCpu, PIEMFPURESULT pResult, uint8_t iStReg)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6132 +6143 @@
 IEM_STATIC void iemFpuStoreResultThenPop(PVMCPU pVCpu, PIEMFPURESULT pResult, uint8_t iStReg)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6153 +6164 @@
                                            uint8_t iEffSeg, RTGCPTR GCPtrEff)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateDP(pVCpu, pCtx, pFpuCtx, iEffSeg, GCPtrEff);
@@ -6174 +6185 @@
                                                   uint8_t iStReg, uint8_t iEffSeg, RTGCPTR GCPtrEff)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateDP(pVCpu, pCtx, pFpuCtx, iEffSeg, GCPtrEff);
@@ -6190 +6201 @@
 IEM_STATIC void iemFpuUpdateOpcodeAndIp(PVMCPU pVCpu)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6205 +6216 @@
 {
     Assert(iStReg < 8);
-    PX86FXSTATE pFpuCtx = &pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87;
+    PX86FXSTATE pFpuCtx = &IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87;
     uint8_t     iReg    = (X86_FSW_TOP_GET(pFpuCtx->FSW) + iStReg) & X86_FSW_TOP_SMASK;
     pFpuCtx->FTW &= ~RT_BIT(iReg);
@@ -6218 +6229 @@
 IEM_STATIC void iemFpuStackIncTop(PVMCPU pVCpu)
 {
-    PX86FXSTATE pFpuCtx = &pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87;
+    PX86FXSTATE pFpuCtx = &IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87;
     uint16_t    uFsw    = pFpuCtx->FSW;
     uint16_t    uTop    = uFsw & X86_FSW_TOP_MASK;
@@ -6235 +6246 @@
 IEM_STATIC void iemFpuStackDecTop(PVMCPU pVCpu)
 {
-    PX86FXSTATE pFpuCtx = &pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87;
+    PX86FXSTATE pFpuCtx = &IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87;
     uint16_t    uFsw    = pFpuCtx->FSW;
     uint16_t    uTop    = uFsw & X86_FSW_TOP_MASK;
@@ -6253 +6264 @@
 IEM_STATIC void iemFpuUpdateFSW(PVMCPU pVCpu, uint16_t u16FSW)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6268 +6279 @@
 IEM_STATIC void iemFpuUpdateFSWThenPop(PVMCPU pVCpu, uint16_t u16FSW)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6286 +6297 @@
 IEM_STATIC void iemFpuUpdateFSWWithMemOp(PVMCPU pVCpu, uint16_t u16FSW, uint8_t iEffSeg, RTGCPTR GCPtrEff)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateDP(pVCpu, pCtx, pFpuCtx, iEffSeg, GCPtrEff);
@@ -6302 +6313 @@
 IEM_STATIC void iemFpuUpdateFSWThenPopPop(PVMCPU pVCpu, uint16_t u16FSW)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6321 +6332 @@
 IEM_STATIC void iemFpuUpdateFSWWithMemOpThenPop(PVMCPU pVCpu, uint16_t u16FSW, uint8_t iEffSeg, RTGCPTR GCPtrEff)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateDP(pVCpu, pCtx, pFpuCtx, iEffSeg, GCPtrEff);
@@ -6370 +6381 @@
 DECL_NO_INLINE(IEM_STATIC, void) iemFpuStackUnderflow(PVMCPU pVCpu, uint8_t iStReg)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6380 +6391 @@
 iemFpuStackUnderflowWithMemOp(PVMCPU pVCpu, uint8_t iStReg, uint8_t iEffSeg, RTGCPTR GCPtrEff)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateDP(pVCpu, pCtx, pFpuCtx, iEffSeg, GCPtrEff);
@@ -6390 +6401 @@
 DECL_NO_INLINE(IEM_STATIC, void) iemFpuStackUnderflowThenPop(PVMCPU pVCpu, uint8_t iStReg)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6401 +6412 @@
 iemFpuStackUnderflowWithMemOpThenPop(PVMCPU pVCpu, uint8_t iStReg, uint8_t iEffSeg, RTGCPTR GCPtrEff)
 {
-    PCPUMCTX    pCtx      = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx      = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateDP(pVCpu, pCtx, pFpuCtx, iEffSeg, GCPtrEff);
@@ -6412 +6423 @@
 DECL_NO_INLINE(IEM_STATIC, void) iemFpuStackUnderflowThenPopPop(PVMCPU pVCpu)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6424 +6435 @@
 iemFpuStackPushUnderflow(PVMCPU pVCpu)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6451 +6462 @@
 iemFpuStackPushUnderflowTwo(PVMCPU pVCpu)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6510 +6521 @@
 DECL_NO_INLINE(IEM_STATIC, void) iemFpuStackPushOverflow(PVMCPU pVCpu)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateOpcodeAndIpWorker(pVCpu, pCtx, pFpuCtx);
@@ -6527 +6538 @@
 iemFpuStackPushOverflowWithMemOp(PVMCPU pVCpu, uint8_t iEffSeg, RTGCPTR GCPtrEff)
 {
-    PCPUMCTX    pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx    = IEM_GET_CTX(pVCpu);
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
     iemFpuUpdateDP(pVCpu, pCtx, pFpuCtx, iEffSeg, GCPtrEff);
@@ -6537 +6548 @@
 IEM_STATIC int iemFpuStRegNotEmpty(PVMCPU pVCpu, uint8_t iStReg)
 {
-    PX86FXSTATE pFpuCtx = &pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87;
+    PX86FXSTATE pFpuCtx = &IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87;
     uint16_t    iReg    = (X86_FSW_TOP_GET(pFpuCtx->FSW) + iStReg) & X86_FSW_TOP_SMASK;
     if (pFpuCtx->FTW & RT_BIT(iReg))
@@ -6547 +6558 @@
 IEM_STATIC int iemFpuStRegNotEmptyRef(PVMCPU pVCpu, uint8_t iStReg, PCRTFLOAT80U *ppRef)
 {
-    PX86FXSTATE pFpuCtx = &pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87;
+    PX86FXSTATE pFpuCtx = &IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87;
     uint16_t    iReg    = (X86_FSW_TOP_GET(pFpuCtx->FSW) + iStReg) & X86_FSW_TOP_SMASK;
     if (pFpuCtx->FTW & RT_BIT(iReg))
@@ -6561 +6572 @@
                                         uint8_t iStReg1, PCRTFLOAT80U *ppRef1)
 {
-    PX86FXSTATE pFpuCtx = &pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87;
+    PX86FXSTATE pFpuCtx = &IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87;
     uint16_t    iTop    = X86_FSW_TOP_GET(pFpuCtx->FSW);
     uint16_t    iReg0   = (iTop + iStReg0) & X86_FSW_TOP_SMASK;
@@ -6577 +6588 @@
 IEM_STATIC int iemFpu2StRegsNotEmptyRefFirst(PVMCPU pVCpu, uint8_t iStReg0, PCRTFLOAT80U *ppRef0, uint8_t iStReg1)
 {
-    PX86FXSTATE pFpuCtx = &pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87;
+    PX86FXSTATE pFpuCtx = &IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87;
     uint16_t    iTop    = X86_FSW_TOP_GET(pFpuCtx->FSW);
     uint16_t    iReg0   = (iTop + iStReg0) & X86_FSW_TOP_SMASK;
@@ -6902 +6913 @@
             && !(fFlags & X86_PTE_RW)
             && (   pVCpu->iem.s.uCpl != 0
-                || (pVCpu->iem.s.CTX_SUFF(pCtx)->cr0 & X86_CR0_WP)))
+                || (IEM_GET_CTX(pVCpu)->cr0 & X86_CR0_WP)))
         {
             Log(("iemMemPageTranslateAndCheckAccess: GCPtrMem=%RGv - read-only page -> #PF\n", GCPtrMem));
@@ -6922 +6933 @@
         if (   (fAccess & IEM_ACCESS_TYPE_EXEC)
             && (fFlags & X86_PTE_PAE_NX)
-            && (pVCpu->iem.s.CTX_SUFF(pCtx)->msrEFER & MSR_K6_EFER_NXE) )
+            && (IEM_GET_CTX(pVCpu)->msrEFER & MSR_K6_EFER_NXE) )
         {
             Log(("iemMemPageTranslateAndCheckAccess: GCPtrMem=%RGv - NX -> #PF\n", GCPtrMem));
@@ -8377 +8388 @@
     /** @todo testcase: Ordering of \#SS(0) vs \#GP() vs \#PF on SSE stuff. */
     if (   (GCPtrMem & 15)
-        && !(pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.MXCSR & X86_MXSCR_MM)) /** @todo should probably check this *after* applying seg.u64Base... Check real HW. */
+        && !(IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.MXCSR & X86_MXSCR_MM)) /** @todo should probably check this *after* applying seg.u64Base... Check real HW. */
         return iemRaiseGeneralProtectionFault0(pVCpu);
 
@@ -8409 +8420 @@
     /** @todo testcase: Ordering of \#SS(0) vs \#GP() vs \#PF on SSE stuff. */
     if (   (GCPtrMem & 15) == 0
-        || (pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.MXCSR & X86_MXSCR_MM)) /** @todo should probably check this *after* applying seg.u64Base... Check real HW. */
+        || (IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.MXCSR & X86_MXSCR_MM)) /** @todo should probably check this *after* applying seg.u64Base... Check real HW. */
     {
         uint128_t const *pu128Src = (uint128_t const *)iemMemMapJmp(pVCpu, sizeof(*pu128Src), iSegReg, GCPtrMem,
@@ -8732 +8743 @@
     /* The lazy approach for now... */
     if (   (GCPtrMem & 15)
-        && !(pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.MXCSR & X86_MXSCR_MM)) /** @todo should probably check this *after* applying seg.u64Base... Check real HW. */
+        && !(IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.MXCSR & X86_MXSCR_MM)) /** @todo should probably check this *after* applying seg.u64Base... Check real HW. */
         return iemRaiseGeneralProtectionFault0(pVCpu);
 
@@ -8762 +8773 @@
     /* The lazy approach for now... */
     if (   (GCPtrMem & 15) == 0
-        || (pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.MXCSR & X86_MXSCR_MM)) /** @todo should probably check this *after* applying seg.u64Base... Check real HW. */
+        || (IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.MXCSR & X86_MXSCR_MM)) /** @todo should probably check this *after* applying seg.u64Base... Check real HW. */
     {
         uint128_t *pu128Dst = (uint128_t *)iemMemMapJmp(pVCpu, sizeof(*pu128Dst), iSegReg, GCPtrMem, IEM_ACCESS_DATA_W);
@@ -8821 +8832 @@
     /* Increment the stack pointer. */
     uint64_t    uNewRsp;
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTGCPTR     GCPtrTop = iemRegGetRspForPush(pVCpu, pCtx, 2, &uNewRsp);
 
@@ -8852 +8863 @@
     /* Increment the stack pointer. */
     uint64_t    uNewRsp;
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTGCPTR     GCPtrTop = iemRegGetRspForPush(pVCpu, pCtx, 4, &uNewRsp);
 
@@ -8883 +8894 @@
     /* Increment the stack pointer. */
     uint64_t    uNewRsp;
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTGCPTR     GCPtrTop = iemRegGetRspForPush(pVCpu, pCtx, 4, &uNewRsp);
 
@@ -8938 +8949 @@
     /* Increment the stack pointer. */
     uint64_t    uNewRsp;
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTGCPTR     GCPtrTop = iemRegGetRspForPush(pVCpu, pCtx, 8, &uNewRsp);
 
@@ -8969 +8980 @@
     /* Increment the stack pointer. */
     uint64_t    uNewRsp;
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTGCPTR     GCPtrTop = iemRegGetRspForPop(pVCpu, pCtx, 2, &uNewRsp);
 
@@ -9000 +9011 @@
     /* Increment the stack pointer. */
     uint64_t    uNewRsp;
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTGCPTR     GCPtrTop = iemRegGetRspForPop(pVCpu, pCtx, 4, &uNewRsp);
 
@@ -9031 +9042 @@
     /* Increment the stack pointer. */
     uint64_t    uNewRsp;
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTGCPTR     GCPtrTop = iemRegGetRspForPop(pVCpu, pCtx, 8, &uNewRsp);
 
@@ -9062 +9073 @@
 {
     /* Increment the stack pointer. */
-    PCPUMCTX    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx = IEM_GET_CTX(pVCpu);
     RTUINT64U   NewRsp = *pTmpRsp;
     RTGCPTR     GCPtrTop = iemRegGetRspForPushEx(pVCpu, pCtx, &NewRsp, 2);
@@ -9094 +9105 @@
 {
     /* Increment the stack pointer. */
-    PCPUMCTX    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx = IEM_GET_CTX(pVCpu);
     RTUINT64U   NewRsp = *pTmpRsp;
     RTGCPTR     GCPtrTop = iemRegGetRspForPushEx(pVCpu, pCtx, &NewRsp, 4);
@@ -9126 +9137 @@
 {
     /* Increment the stack pointer. */
-    PCPUMCTX    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx = IEM_GET_CTX(pVCpu);
     RTUINT64U   NewRsp = *pTmpRsp;
     RTGCPTR     GCPtrTop = iemRegGetRspForPushEx(pVCpu, pCtx, &NewRsp, 8);
@@ -9158 +9169 @@
 {
     /* Increment the stack pointer. */
-    PCPUMCTX    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx = IEM_GET_CTX(pVCpu);
     RTUINT64U   NewRsp = *pTmpRsp;
     RTGCPTR     GCPtrTop = iemRegGetRspForPopEx(pVCpu, pCtx, &NewRsp, 2);
@@ -9190 +9201 @@
 {
     /* Increment the stack pointer. */
-    PCPUMCTX    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx = IEM_GET_CTX(pVCpu);
     RTUINT64U   NewRsp = *pTmpRsp;
     RTGCPTR     GCPtrTop = iemRegGetRspForPopEx(pVCpu, pCtx, &NewRsp, 4);
@@ -9222 +9233 @@
 {
     /* Increment the stack pointer. */
-    PCPUMCTX    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx = IEM_GET_CTX(pVCpu);
     RTUINT64U   NewRsp = *pTmpRsp;
     RTGCPTR     GCPtrTop = iemRegGetRspForPopEx(pVCpu, pCtx, &NewRsp, 8);
@@ -9263 +9274 @@
 {
     Assert(cbMem < UINT8_MAX);
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTGCPTR     GCPtrTop = iemRegGetRspForPush(pVCpu, pCtx, (uint8_t)cbMem, puNewRsp);
     return iemMemMap(pVCpu, ppvMem, cbMem, X86_SREG_SS, GCPtrTop, IEM_ACCESS_STACK_W);
@@ -9285 +9296 @@
     VBOXSTRICTRC rcStrict = iemMemCommitAndUnmap(pVCpu, pvMem, IEM_ACCESS_STACK_W);
     if (rcStrict == VINF_SUCCESS)
-        pVCpu->iem.s.CTX_SUFF(pCtx)->rsp = uNewRsp;
+        IEM_GET_CTX(pVCpu)->rsp = uNewRsp;
     return rcStrict;
 }
@@ -9307 +9318 @@
 {
     Assert(cbMem < UINT8_MAX);
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTGCPTR     GCPtrTop = iemRegGetRspForPop(pVCpu, pCtx, (uint8_t)cbMem, puNewRsp);
     return iemMemMap(pVCpu, (void **)ppvMem, cbMem, X86_SREG_SS, GCPtrTop, IEM_ACCESS_STACK_R);
@@ -9330 +9341 @@
 {
     Assert(cbMem < UINT8_MAX);
-    PCPUMCTX    pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx     = IEM_GET_CTX(pVCpu);
     RTUINT64U   NewRsp;
     NewRsp.u = *puNewRsp;
@@ -9355 +9366 @@
     VBOXSTRICTRC rcStrict = iemMemCommitAndUnmap(pVCpu, (void *)pvMem, IEM_ACCESS_STACK_R);
     if (rcStrict == VINF_SUCCESS)
-        pVCpu->iem.s.CTX_SUFF(pCtx)->rsp = uNewRsp;
+        IEM_GET_CTX(pVCpu)->rsp = uNewRsp;
     return rcStrict;
 }
@@ -9488 +9499 @@
 {
     AssertPtr(pDesc);
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /** @todo did the 286 require all 8 bytes to be accessible? */
@@ -9588 +9599 @@
 IEM_STATIC VBOXSTRICTRC iemMemMarkSelDescAccessed(PVMCPU pVCpu, uint16_t uSel)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -9684 +9695 @@
 #define IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT() \
     do { \
-        if (   (pVCpu->iem.s.CTX_SUFF(pCtx)->cr0 & X86_CR0_EM) \
-            || !(pVCpu->iem.s.CTX_SUFF(pCtx)->cr4 & X86_CR4_OSFXSR) \
+        if (   (IEM_GET_CTX(pVCpu)->cr0 & X86_CR0_EM) \
+            || !(IEM_GET_CTX(pVCpu)->cr4 & X86_CR4_OSFXSR) \
             || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2) \
             return iemRaiseUndefinedOpcode(pVCpu); \
-        if (pVCpu->iem.s.CTX_SUFF(pCtx)->cr0 & X86_CR0_TS) \
+        if (IEM_GET_CTX(pVCpu)->cr0 & X86_CR0_TS) \
             return iemRaiseDeviceNotAvailable(pVCpu); \
     } while (0)
 #define IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT() \
     do { \
-        if (   (pVCpu->iem.s.CTX_SUFF(pCtx)->cr0 & X86_CR0_EM) \
-            || !(pVCpu->iem.s.CTX_SUFF(pCtx)->cr4 & X86_CR4_OSFXSR) \
+        if (   (IEM_GET_CTX(pVCpu)->cr0 & X86_CR0_EM) \
+            || !(IEM_GET_CTX(pVCpu)->cr4 & X86_CR4_OSFXSR) \
             || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse) \
             return iemRaiseUndefinedOpcode(pVCpu); \
-        if (pVCpu->iem.s.CTX_SUFF(pCtx)->cr0 & X86_CR0_TS) \
+        if (IEM_GET_CTX(pVCpu)->cr0 & X86_CR0_TS) \
             return iemRaiseDeviceNotAvailable(pVCpu); \
     } while (0)
@@ -9705 +9716 @@
             || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fMmx) \
             return iemRaiseUndefinedOpcode(pVCpu); \
-        if (pVCpu->iem.s.CTX_SUFF(pCtx)->cr0 & X86_CR0_TS) \
+        if (IEM_GET_CTX(pVCpu)->cr0 & X86_CR0_TS) \
             return iemRaiseDeviceNotAvailable(pVCpu); \
     } while (0)
@@ -9714 +9725 @@
                 && !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fAmdMmxExts) ) \
             return iemRaiseUndefinedOpcode(pVCpu); \
-        if (pVCpu->iem.s.CTX_SUFF(pCtx)->cr0 & X86_CR0_TS) \
+        if (IEM_GET_CTX(pVCpu)->cr0 & X86_CR0_TS) \
             return iemRaiseDeviceNotAvailable(pVCpu); \
     } while (0)
@@ -9771 +9782 @@
 #define IEM_MC_FETCH_EFLAGS(a_EFlags)                   (a_EFlags) = (pVCpu)->iem.s.CTX_SUFF(pCtx)->eflags.u
 #define IEM_MC_FETCH_EFLAGS_U8(a_EFlags)                (a_EFlags) = (uint8_t)(pVCpu)->iem.s.CTX_SUFF(pCtx)->eflags.u
-#define IEM_MC_FETCH_FSW(a_u16Fsw)                      (a_u16Fsw) = pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.FSW
-#define IEM_MC_FETCH_FCW(a_u16Fcw)                      (a_u16Fcw) = pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.FCW
+#define IEM_MC_FETCH_FSW(a_u16Fsw)                      (a_u16Fsw) = IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.FSW
+#define IEM_MC_FETCH_FCW(a_u16Fcw)                      (a_u16Fcw) = IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.FCW
 
 #define IEM_MC_STORE_GREG_U8(a_iGReg, a_u8Value)        *iemGRegRefU8(pVCpu, (a_iGReg)) = (a_u8Value)
@@ -9785 +9796 @@
 #define IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(a_pu32Dst)    do { (a_pu32Dst)[1] = 0; } while (0)
 #define IEM_MC_STORE_FPUREG_R80_SRC_REF(a_iSt, a_pr80Src) \
-    do { pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[a_iSt].r80 = *(a_pr80Src); } while (0)
+    do { IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aRegs[a_iSt].r80 = *(a_pr80Src); } while (0)
 
 #define IEM_MC_REF_GREG_U8(a_pu8Dst, a_iGReg)           (a_pu8Dst) = iemGRegRefU8(pVCpu, (a_iGReg))
@@ -9882 +9893 @@
 
 #define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg) \
-    do { (a_u64Value) = pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx; } while (0)
+    do { (a_u64Value) = IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx; } while (0)
 #define IEM_MC_FETCH_MREG_U32(a_u32Value, a_iMReg) \
-    do { (a_u32Value) = pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].au32[0]; } while (0)
+    do { (a_u32Value) = IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].au32[0]; } while (0)
 #define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value) \
-    do { pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx = (a_u64Value); } while (0)
+    do { IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx = (a_u64Value); } while (0)
 #define IEM_MC_STORE_MREG_U32_ZX_U64(a_iMReg, a_u32Value) \
-    do { pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx = (uint32_t)(a_u32Value); } while (0)
+    do { IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx = (uint32_t)(a_u32Value); } while (0)
 #define IEM_MC_REF_MREG_U64(a_pu64Dst, a_iMReg)         \
-        (a_pu64Dst) = (&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx)
+        (a_pu64Dst) = (&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx)
 #define IEM_MC_REF_MREG_U64_CONST(a_pu64Dst, a_iMReg) \
-        (a_pu64Dst) = ((uint64_t const *)&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx)
+        (a_pu64Dst) = ((uint64_t const *)&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx)
 #define IEM_MC_REF_MREG_U32_CONST(a_pu32Dst, a_iMReg) \
-        (a_pu32Dst) = ((uint32_t const *)&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx)
+        (a_pu32Dst) = ((uint32_t const *)&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx)
 
 #define IEM_MC_FETCH_XREG_U128(a_u128Value, a_iXReg) \
-    do { (a_u128Value) = pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].xmm; } while (0)
+    do { (a_u128Value) = IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].xmm; } while (0)
 #define IEM_MC_FETCH_XREG_U64(a_u64Value, a_iXReg) \
-    do { (a_u64Value) = pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0]; } while (0)
+    do { (a_u64Value) = IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0]; } while (0)
 #define IEM_MC_FETCH_XREG_U32(a_u32Value, a_iXReg) \
-    do { (a_u32Value) = pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au32[0]; } while (0)
+    do { (a_u32Value) = IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au32[0]; } while (0)
 #define IEM_MC_STORE_XREG_U128(a_iXReg, a_u128Value) \
-    do { pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].xmm = (a_u128Value); } while (0)
+    do { IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].xmm = (a_u128Value); } while (0)
 #define IEM_MC_STORE_XREG_U64(a_iXReg, a_u64Value) \
-    do { pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0] = (a_u64Value); } while (0)
+    do { IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0] = (a_u64Value); } while (0)
 #define IEM_MC_STORE_XREG_U64_ZX_U128(a_iXReg, a_u64Value) \
-    do { pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0] = (a_u64Value); \
-         pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[1] = 0; \
+    do { IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0] = (a_u64Value); \
+         IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[1] = 0; \
     } while (0)
 #define IEM_MC_STORE_XREG_U32_ZX_U128(a_iXReg, a_u32Value) \
-    do { pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0] = (uint32_t)(a_u32Value); \
-         pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[1] = 0; \
+    do { IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0] = (uint32_t)(a_u32Value); \
+         IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[1] = 0; \
     } while (0)
 #define IEM_MC_REF_XREG_U128(a_pu128Dst, a_iXReg)       \
-    (a_pu128Dst) = (&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].xmm)
+    (a_pu128Dst) = (&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].xmm)
 #define IEM_MC_REF_XREG_U128_CONST(a_pu128Dst, a_iXReg) \
-    (a_pu128Dst) = ((uint128_t const *)&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].xmm)
+    (a_pu128Dst) = ((uint128_t const *)&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].xmm)
 #define IEM_MC_REF_XREG_U64_CONST(a_pu64Dst, a_iXReg) \
-    (a_pu64Dst) = ((uint64_t const *)&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0])
+    (a_pu64Dst) = ((uint64_t const *)&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXReg)].au64[0])
 #define IEM_MC_COPY_XREG_U128(a_iXRegDst, a_iXRegSrc) \
-    do { pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXRegDst)].xmm \
-            = pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aXMM[(a_iXRegSrc)].xmm; } while (0)
+    do { IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXRegDst)].xmm \
+            = IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.aXMM[(a_iXRegSrc)].xmm; } while (0)
 
 #ifndef IEM_WITH_SETJMP
@@ -10245 +10256 @@
         if (   !(a_u16FSW & X86_FSW_ES) \
             || !(  (a_u16FSW & (X86_FSW_UE | X86_FSW_OE | X86_FSW_IE)) \
-                 & ~(pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.FCW & X86_FCW_MASK_ALL) ) ) \
+                 & ~(IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.FCW & X86_FCW_MASK_ALL) ) ) \
             IEM_MC_RETURN_ON_FAILURE(iemMemCommitAndUnmap(pVCpu, (a_pvMem), (a_fAccess))); \
     } while (0)
@@ -10385 +10396 @@
 #define IEM_MC_CALL_FPU_AIMPL_1(a_pfnAImpl, a0) \
     do { \
-        a_pfnAImpl(&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87, (a0)); \
+        a_pfnAImpl(&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87, (a0)); \
     } while (0)
 
@@ -10397 +10408 @@
 #define IEM_MC_CALL_FPU_AIMPL_2(a_pfnAImpl, a0, a1) \
     do { \
-        a_pfnAImpl(&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87, (a0), (a1)); \
+        a_pfnAImpl(&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87, (a0), (a1)); \
     } while (0)
 
@@ -10410 +10421 @@
 #define IEM_MC_CALL_FPU_AIMPL_3(a_pfnAImpl, a0, a1, a2) \
     do { \
-        a_pfnAImpl(&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87, (a0), (a1), (a2)); \
+        a_pfnAImpl(&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87, (a0), (a1), (a2)); \
     } while (0)
 
@@ -10541 +10552 @@
     do { \
         IEM_MC_PREPARE_FPU_USAGE(); \
-        a_pfnAImpl(&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87, (a0), (a1)); \
+        a_pfnAImpl(&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87, (a0), (a1)); \
     } while (0)
 
@@ -10555 +10566 @@
     do { \
         IEM_MC_PREPARE_FPU_USAGE(); \
-        a_pfnAImpl(&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87, (a0), (a1), (a2)); \
+        a_pfnAImpl(&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87, (a0), (a1), (a2)); \
     } while (0)
 
@@ -10569 +10580 @@
     do { \
         IEM_MC_PREPARE_SSE_USAGE(); \
-        a_pfnAImpl(&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87, (a0), (a1)); \
+        a_pfnAImpl(&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87, (a0), (a1)); \
     } while (0)
 
@@ -10583 +10594 @@
     do { \
         IEM_MC_PREPARE_SSE_USAGE(); \
-        a_pfnAImpl(&pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87, (a0), (a1), (a2)); \
+        a_pfnAImpl(&IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87, (a0), (a1), (a2)); \
     } while (0)
 
 /** @note Not for IOPL or IF testing. */
-#define IEM_MC_IF_EFL_BIT_SET(a_fBit)                   if (pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit)) {
+#define IEM_MC_IF_EFL_BIT_SET(a_fBit)                   if (IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit)) {
 /** @note Not for IOPL or IF testing. */
-#define IEM_MC_IF_EFL_BIT_NOT_SET(a_fBit)               if (!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit))) {
+#define IEM_MC_IF_EFL_BIT_NOT_SET(a_fBit)               if (!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit))) {
 /** @note Not for IOPL or IF testing. */
-#define IEM_MC_IF_EFL_ANY_BITS_SET(a_fBits)             if (pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBits)) {
+#define IEM_MC_IF_EFL_ANY_BITS_SET(a_fBits)             if (IEM_GET_CTX(pVCpu)->eflags.u & (a_fBits)) {
 /** @note Not for IOPL or IF testing. */
-#define IEM_MC_IF_EFL_NO_BITS_SET(a_fBits)              if (!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBits))) {
+#define IEM_MC_IF_EFL_NO_BITS_SET(a_fBits)              if (!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBits))) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_EFL_BITS_NE(a_fBit1, a_fBit2)         \
-    if (   !!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit1)) \
-        != !!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit2)) ) {
+    if (   !!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit1)) \
+        != !!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit2)) ) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_EFL_BITS_EQ(a_fBit1, a_fBit2)         \
-    if (   !!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit1)) \
-        == !!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit2)) ) {
+    if (   !!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit1)) \
+        == !!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit2)) ) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(a_fBit, a_fBit1, a_fBit2) \
-    if (   (pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit)) \
-        ||    !!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit1)) \
-           != !!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit2)) ) {
+    if (   (IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit)) \
+        ||    !!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit1)) \
+           != !!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit2)) ) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(a_fBit, a_fBit1, a_fBit2) \
-    if (   !(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit)) \
-        &&    !!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit1)) \
-           == !!(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & (a_fBit2)) ) {
-#define IEM_MC_IF_CX_IS_NZ()                            if (pVCpu->iem.s.CTX_SUFF(pCtx)->cx != 0) {
-#define IEM_MC_IF_ECX_IS_NZ()                           if (pVCpu->iem.s.CTX_SUFF(pCtx)->ecx != 0) {
-#define IEM_MC_IF_RCX_IS_NZ()                           if (pVCpu->iem.s.CTX_SUFF(pCtx)->rcx != 0) {
+    if (   !(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit)) \
+        &&    !!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit1)) \
+           == !!(IEM_GET_CTX(pVCpu)->eflags.u & (a_fBit2)) ) {
+#define IEM_MC_IF_CX_IS_NZ()                            if (IEM_GET_CTX(pVCpu)->cx != 0) {
+#define IEM_MC_IF_ECX_IS_NZ()                           if (IEM_GET_CTX(pVCpu)->ecx != 0) {
+#define IEM_MC_IF_RCX_IS_NZ()                           if (IEM_GET_CTX(pVCpu)->rcx != 0) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_SET(a_fBit) \
-        if (   pVCpu->iem.s.CTX_SUFF(pCtx)->cx != 0 \
-            && (pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & a_fBit)) {
+        if (   IEM_GET_CTX(pVCpu)->cx != 0 \
+            && (IEM_GET_CTX(pVCpu)->eflags.u & a_fBit)) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_SET(a_fBit) \
-        if (   pVCpu->iem.s.CTX_SUFF(pCtx)->ecx != 0 \
-            && (pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & a_fBit)) {
+        if (   IEM_GET_CTX(pVCpu)->ecx != 0 \
+            && (IEM_GET_CTX(pVCpu)->eflags.u & a_fBit)) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_SET(a_fBit) \
-        if (   pVCpu->iem.s.CTX_SUFF(pCtx)->rcx != 0 \
-            && (pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & a_fBit)) {
+        if (   IEM_GET_CTX(pVCpu)->rcx != 0 \
+            && (IEM_GET_CTX(pVCpu)->eflags.u & a_fBit)) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) \
-        if (   pVCpu->iem.s.CTX_SUFF(pCtx)->cx != 0 \
-            && !(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & a_fBit)) {
+        if (   IEM_GET_CTX(pVCpu)->cx != 0 \
+            && !(IEM_GET_CTX(pVCpu)->eflags.u & a_fBit)) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) \
-        if (   pVCpu->iem.s.CTX_SUFF(pCtx)->ecx != 0 \
-            && !(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & a_fBit)) {
+        if (   IEM_GET_CTX(pVCpu)->ecx != 0 \
+            && !(IEM_GET_CTX(pVCpu)->eflags.u & a_fBit)) {
 /** @note Not for IOPL or IF testing. */
 #define IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) \
-        if (   pVCpu->iem.s.CTX_SUFF(pCtx)->rcx != 0 \
-            && !(pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.u & a_fBit)) {
+        if (   IEM_GET_CTX(pVCpu)->rcx != 0 \
+            && !(IEM_GET_CTX(pVCpu)->eflags.u & a_fBit)) {
 #define IEM_MC_IF_LOCAL_IS_Z(a_Local)                   if ((a_Local) == 0) {
 #define IEM_MC_IF_GREG_BIT_SET(a_iGReg, a_iBitNo)       if (*(uint64_t *)iemGRegRef(pVCpu, (a_iGReg)) & RT_BIT_64(a_iBitNo)) {
@@ -10653 +10664 @@
     if (iemFpu2StRegsNotEmptyRefFirst(pVCpu, (a_iSt0), &(a_pr80Dst0), (a_iSt1)) == VINF_SUCCESS) {
 #define IEM_MC_IF_FCW_IM() \
-    if (pVCpu->iem.s.CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.FCW & X86_FCW_IM) {
+    if (IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState)->x87.FCW & X86_FCW_IM) {
 
 #define IEM_MC_ELSE()                                   } else {
@@ -10666 +10677 @@
 #ifdef DEBUG
 # define IEMOP_MNEMONIC(a_szMnemonic) \
-    Log4(("decode - %04x:%RGv %s%s [#%u]\n", pVCpu->iem.s.CTX_SUFF(pCtx)->cs.Sel, pVCpu->iem.s.CTX_SUFF(pCtx)->rip, \
+    Log4(("decode - %04x:%RGv %s%s [#%u]\n", IEM_GET_CTX(pVCpu)->cs.Sel, IEM_GET_CTX(pVCpu)->rip, \
           pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK ? "lock " : "", a_szMnemonic, pVCpu->iem.s.cInstructions))
 # define IEMOP_MNEMONIC2(a_szMnemonic, a_szOps) \
-    Log4(("decode - %04x:%RGv %s%s %s [#%u]\n", pVCpu->iem.s.CTX_SUFF(pCtx)->cs.Sel, pVCpu->iem.s.CTX_SUFF(pCtx)->rip, \
+    Log4(("decode - %04x:%RGv %s%s %s [#%u]\n", IEM_GET_CTX(pVCpu)->cs.Sel, IEM_GET_CTX(pVCpu)->rip, \
           pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK ? "lock " : "", a_szMnemonic, a_szOps, pVCpu->iem.s.cInstructions))
 #else
@@ -10811 +10822 @@
         { \
             Log5((a_szPrf ": Overriding REX prefix at %RX16! fPrefixes=%#x\n", \
-                  pVCpu->iem.s.CTX_SUFF(pCtx)->rip, pVCpu->iem.s.fPrefixes)); \
+                  IEM_GET_CTX(pVCpu)->rip, pVCpu->iem.s.fPrefixes)); \
             pVCpu->iem.s.fPrefixes &= ~IEM_OP_PRF_REX_MASK; \
             pVCpu->iem.s.uRexB     = 0; \
@@ -10892 +10903 @@
 {
     Log5(("iemOpHlpCalcRmEffAddr: bRm=%#x\n", bRm));
-    PCCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 # define SET_SS_DEF() \
     do \
@@ -11195 +11206 @@
 {
     Log5(("iemOpHlpCalcRmEffAddrJmp: bRm=%#x\n", bRm));
-    PCCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 # define SET_SS_DEF() \
     do \
@@ -11497 +11508 @@
 {
     PVMCPU   pVCpu   = pVCpu;
-    PCPUMCTX pOrgCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pOrgCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -11610 +11621 @@
 
         s_DebugCtx = *pOrgCtx;
-        pVCpu->iem.s.CTX_SUFF(pCtx) = &s_DebugCtx;
+        IEM_GET_CTX(pVCpu) = &s_DebugCtx;
     }
 
@@ -11866 +11877 @@
 IEM_STATIC void iemVerifyAssertMsg2(PVMCPU pVCpu)
 {
-    PCPUMCTX pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx  = IEM_GET_CTX(pVCpu);
     PVM      pVM   = pVCpu->CTX_SUFF(pVM);
     PVMCPU   pVCpu = pVCpu;
@@ -12057 +12068 @@
      */
     PCPUMCTX    pOrgCtx   = CPUMQueryGuestCtxPtr(pVCpu);
-    PCPUMCTX    pDebugCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pDebugCtx = IEM_GET_CTX(pVCpu);
     Assert(pOrgCtx != pDebugCtx);
-    pVCpu->iem.s.CTX_SUFF(pCtx) = pOrgCtx;
+    IEM_GET_CTX(pVCpu) = pOrgCtx;
 
     /*
@@ -12112 +12123 @@
     if (rcStrictIem == VERR_IEM_INSTR_NOT_IMPLEMENTED)
     {
-        pVCpu->iem.s.CTX_SUFF(pCtx) = pOrgCtx;
+        IEM_GET_CTX(pVCpu) = pOrgCtx;
         if (rc == VINF_EM_DBG_STEPPED)
             return VINF_SUCCESS;
@@ -12443 +12454 @@
             iemVerifyAssertRecord(pVCpu, pOtherRec, "Extra Other record!");
     }
-    pVCpu->iem.s.CTX_SUFF(pCtx) = pOrgCtx;
+    IEM_GET_CTX(pVCpu) = pOrgCtx;
 
     return rcStrictIem;
@@ -12653 +12664 @@
         && rcStrict == VINF_SUCCESS
         && VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
-        && EMGetInhibitInterruptsPC(pVCpu) == pVCpu->iem.s.CTX_SUFF(pCtx)->rip )
+        && EMGetInhibitInterruptsPC(pVCpu) == IEM_GET_CTX(pVCpu)->rip )
     {
         rcStrict = iemInitDecoderAndPrefetchOpcodes(pVCpu, pVCpu->iem.s.fBypassHandlers);
@@ -12659 +12670 @@
         {
 #ifdef LOG_ENABLED
-            iemLogCurInstr(pVCpu, pVCpu->iem.s.CTX_SUFF(pCtx), false);
+            iemLogCurInstr(pVCpu, IEM_GET_CTX(pVCpu), false);
 #endif
 #ifdef IEM_WITH_SETJMP
@@ -12691 +12702 @@
     rcStrict = iemExecStatusCodeFiddling(pVCpu, rcStrict);
 
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->cs));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->ss));
+    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->cs));
+    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->ss));
 #if defined(IEM_VERIFICATION_MODE_FULL)
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->es));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->ds));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->fs));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->gs));
+    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->es));
+    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->ds));
+    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->fs));
+    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->gs));
 #endif
     return rcStrict;
@@ -12745 +12756 @@
 #endif
 #ifdef LOG_ENABLED
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     iemLogCurInstr(pVCpu, pCtx, true);
 #endif
@@ -12765 +12776 @@
 #endif
 #ifdef IN_RC
-    rcStrict = iemRCRawMaybeReenter(pVCpu, pVCpu->iem.s.CTX_SUFF(pCtx), rcStrict);
+    rcStrict = iemRCRawMaybeReenter(pVCpu, IEM_GET_CTX(pVCpu), rcStrict);
 #endif
     if (rcStrict != VINF_SUCCESS)
@@ -12776 +12787 @@
 VMMDECL(VBOXSTRICTRC)       IEMExecOneEx(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, uint32_t *pcbWritten)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     AssertReturn(CPUMCTX2CORE(pCtx) == pCtxCore, VERR_IEM_IPE_3);
 
@@ -12798 +12809 @@
                                                          const void *pvOpcodeBytes, size_t cbOpcodeBytes)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     AssertReturn(CPUMCTX2CORE(pCtx) == pCtxCore, VERR_IEM_IPE_3);
 
@@ -12826 +12837 @@
 VMMDECL(VBOXSTRICTRC)       IEMExecOneBypassEx(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, uint32_t *pcbWritten)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     AssertReturn(CPUMCTX2CORE(pCtx) == pCtxCore, VERR_IEM_IPE_3);
 
@@ -12848 +12859 @@
                                                                const void *pvOpcodeBytes, size_t cbOpcodeBytes)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     AssertReturn(CPUMCTX2CORE(pCtx) == pCtxCore, VERR_IEM_IPE_3);
 
@@ -12889 +12900 @@
                                                                       uint32_t *pcbWritten)
 {
-    PCPUMCTX pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx    = IEM_GET_CTX(pVCpu);
     AssertReturn(CPUMCTX2CORE(pCtx) == pCtxCore, VERR_IEM_IPE_3);
 
@@ -12926 +12937 @@
      * See if there is an interrupt pending in TRPM, inject it if we can.
      */
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 # ifdef IEM_VERIFICATION_MODE_FULL
     pVCpu->iem.s.uInjectCpl = UINT8_MAX;
@@ -12978 +12989 @@
      * See if there is an interrupt pending in TRPM, inject it if we can.
      */
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 # ifdef IEM_VERIFICATION_MODE_FULL
     pVCpu->iem.s.uInjectCpl = UINT8_MAX;
@@ -13062 +13073 @@
          * Assert hidden register sanity (also done in iemInitDecoder and iemReInitDecoder).
          */
-        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->cs));
-        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->ss));
+        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->cs));
+        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->ss));
 # if defined(IEM_VERIFICATION_MODE_FULL)
-        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->es));
-        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->ds));
-        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->fs));
-        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->iem.s.CTX_SUFF(pCtx)->gs));
+        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->es));
+        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->ds));
+        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->fs));
+        Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &IEM_GET_CTX(pVCpu)->gs));
 # endif
     }
@@ -13076 +13087 @@
      */
 # ifdef IN_RC
-    rcStrict = iemRCRawMaybeReenter(pVCpu, pVCpu->iem.s.CTX_SUFF(pCtx), rcStrict);
+    rcStrict = iemRCRawMaybeReenter(pVCpu, IEM_GET_CTX(pVCpu), rcStrict);
 # endif
     if (rcStrict != VINF_SUCCESS)
@@ -13215 +13226 @@
 VMM_INT_DECL(int) IEMExecInstr_iret(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     iemCtxCoreToCtx(pCtx, pCtxCore);
@@ -13256 +13267 @@
     iemUninitExec(pVCpu);
 #ifdef IN_RC
-    return iemRCRawMaybeReenter(pVCpu, pVCpu->iem.s.CTX_SUFF(pCtx),
+    return iemRCRawMaybeReenter(pVCpu, IEM_GET_CTX(pVCpu),
                                 iemExecStatusCodeFiddling(pVCpu, rcStrict));
 #else

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

@@ -176 +176 @@
 static void iemHlpUpdateArithEFlagsU8(PVMCPU pVCpu, uint8_t u8Result, uint32_t fToUpdate, uint32_t fUndefined)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     uint32_t fEFlags = pCtx->eflags.u;
@@ -232 +232 @@
 IEM_CIMPL_DEF_0(iemCImpl_popa_16)
 {
-    PCPUMCTX        pCtx        = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx        = IEM_GET_CTX(pVCpu);
     RTGCPTR         GCPtrStart  = iemRegGetEffRsp(pVCpu, pCtx);
     RTGCPTR         GCPtrLast   = GCPtrStart + 15;
@@ -304 +304 @@
 IEM_CIMPL_DEF_0(iemCImpl_popa_32)
 {
-    PCPUMCTX        pCtx        = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx        = IEM_GET_CTX(pVCpu);
     RTGCPTR         GCPtrStart  = iemRegGetEffRsp(pVCpu, pCtx);
     RTGCPTR         GCPtrLast   = GCPtrStart + 31;
@@ -385 +385 @@
 IEM_CIMPL_DEF_0(iemCImpl_pusha_16)
 {
-    PCPUMCTX        pCtx        = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx        = IEM_GET_CTX(pVCpu);
     RTGCPTR         GCPtrTop    = iemRegGetEffRsp(pVCpu, pCtx);
     RTGCPTR         GCPtrBottom = GCPtrTop - 15;
@@ -457 +457 @@
 IEM_CIMPL_DEF_0(iemCImpl_pusha_32)
 {
-    PCPUMCTX        pCtx        = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx        = IEM_GET_CTX(pVCpu);
     RTGCPTR         GCPtrTop    = iemRegGetEffRsp(pVCpu, pCtx);
     RTGCPTR         GCPtrBottom = GCPtrTop - 31;
@@ -532 +532 @@
 IEM_CIMPL_DEF_1(iemCImpl_pushf, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -588 +588 @@
 IEM_CIMPL_DEF_1(iemCImpl_popf, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX        pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx    = IEM_GET_CTX(pVCpu);
     uint32_t const  fEflOld = IEMMISC_GET_EFL(pVCpu, pCtx);
     VBOXSTRICTRC    rcStrict;
@@ -748 +748 @@
 IEM_CIMPL_DEF_1(iemCImpl_call_16, uint16_t, uNewPC)
 {
-    PCPUMCTX pCtx   = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx   = IEM_GET_CTX(pVCpu);
     uint16_t uOldPC = pCtx->ip + cbInstr;
     if (uNewPC > pCtx->cs.u32Limit)
@@ -773 +773 @@
 IEM_CIMPL_DEF_1(iemCImpl_call_rel_16, int16_t, offDisp)
 {
-    PCPUMCTX pCtx   = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx   = IEM_GET_CTX(pVCpu);
     uint16_t uOldPC = pCtx->ip + cbInstr;
     uint16_t uNewPC = uOldPC + offDisp;
@@ -801 +801 @@
 IEM_CIMPL_DEF_1(iemCImpl_call_32, uint32_t, uNewPC)
 {
-    PCPUMCTX pCtx   = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx   = IEM_GET_CTX(pVCpu);
     uint32_t uOldPC = pCtx->eip + cbInstr;
     if (uNewPC > pCtx->cs.u32Limit)
@@ -843 +843 @@
 IEM_CIMPL_DEF_1(iemCImpl_call_rel_32, int32_t, offDisp)
 {
-    PCPUMCTX pCtx   = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx   = IEM_GET_CTX(pVCpu);
     uint32_t uOldPC = pCtx->eip + cbInstr;
     uint32_t uNewPC = uOldPC + offDisp;
@@ -871 +871 @@
 IEM_CIMPL_DEF_1(iemCImpl_call_64, uint64_t, uNewPC)
 {
-    PCPUMCTX pCtx   = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx   = IEM_GET_CTX(pVCpu);
     uint64_t uOldPC = pCtx->rip + cbInstr;
     if (!IEM_IS_CANONICAL(uNewPC))
@@ -896 +896 @@
 IEM_CIMPL_DEF_1(iemCImpl_call_rel_64, int64_t, offDisp)
 {
-    PCPUMCTX pCtx   = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx   = IEM_GET_CTX(pVCpu);
     uint64_t uOldPC = pCtx->rip + cbInstr;
     uint64_t uNewPC = uOldPC + offDisp;
@@ -951 +951 @@
     }
 
-    PCPUMCTX pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx     = IEM_GET_CTX(pVCpu);
     uint32_t uNextEip = pCtx->eip + cbInstr;
-    return iemTaskSwitch(pVCpu, pVCpu->iem.s.CTX_SUFF(pCtx), enmBranch == IEMBRANCH_JUMP ? IEMTASKSWITCH_JUMP : IEMTASKSWITCH_CALL,
+    return iemTaskSwitch(pVCpu, pCtx, enmBranch == IEMBRANCH_JUMP ? IEMTASKSWITCH_JUMP : IEMTASKSWITCH_CALL,
                          uNextEip, 0 /* fFlags */, 0 /* uErr */, 0 /* uCr2 */, uSel, pDesc);
 #endif
@@ -1020 +1020 @@
     }
 
-    PCPUMCTX pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx     = IEM_GET_CTX(pVCpu);
     uint32_t uNextEip = pCtx->eip + cbInstr;
-    return iemTaskSwitch(pVCpu, pVCpu->iem.s.CTX_SUFF(pCtx), enmBranch == IEMBRANCH_JUMP ? IEMTASKSWITCH_JUMP : IEMTASKSWITCH_CALL,
+    return iemTaskSwitch(pVCpu, pCtx, enmBranch == IEMBRANCH_JUMP ? IEMTASKSWITCH_JUMP : IEMTASKSWITCH_CALL,
                          uNextEip, 0 /* fFlags */, 0 /* uErr */, 0 /* uCr2 */, uSelTss, &TssDesc);
 #endif
@@ -1061 +1061 @@
     RTSEL           uNewCS;
     IEMSELDESC      DescCS;
-    PCPUMCTX        pCtx;
 
     AssertCompile(X86_SEL_TYPE_SYS_386_CALL_GATE == AMD64_SEL_TYPE_SYS_CALL_GATE);
@@ -1163 +1162 @@
     }
 
-    pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     if (enmBranch == IEMBRANCH_JUMP)
@@ -1723 +1722 @@
 IEM_CIMPL_DEF_3(iemCImpl_FarJmp, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     NOREF(cbInstr);
     Assert(offSeg <= UINT32_MAX);
@@ -1888 +1887 @@
 IEM_CIMPL_DEF_3(iemCImpl_callf, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);
     VBOXSTRICTRC    rcStrict;
     uint64_t        uNewRsp;
@@ -2109 +2108 @@
 IEM_CIMPL_DEF_2(iemCImpl_retf, IEMMODE, enmEffOpSize, uint16_t, cbPop)
 {
-    PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);
     VBOXSTRICTRC    rcStrict;
     RTCPTRUNION     uPtrFrame;
@@ -2515 +2514 @@
 IEM_CIMPL_DEF_2(iemCImpl_retn, IEMMODE, enmEffOpSize, uint16_t, cbPop)
 {
-    PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);
     NOREF(cbInstr);
 
@@ -2587 +2586 @@
 IEM_CIMPL_DEF_3(iemCImpl_enter, IEMMODE, enmEffOpSize, uint16_t, cbFrame, uint8_t, cParameters)
 {
-    PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);
 
     /* Push RBP, saving the old value in TmpRbp. */
@@ -2703 +2702 @@
 IEM_CIMPL_DEF_1(iemCImpl_leave, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);
 
     /* Calculate the intermediate RSP from RBP and the stack attributes. */
@@ -2774 +2773 @@
 IEM_CIMPL_DEF_1(iemCImpl_iret_real_v8086, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX  pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX  pCtx  = IEM_GET_CTX(pVCpu);
     X86EFLAGS Efl;
     Efl.u = IEMMISC_GET_EFL(pVCpu, pCtx);
@@ -2994 +2993 @@
      */
     RTSEL        uSelRet;
-    PCPUMCTX     pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX     pCtx = IEM_GET_CTX(pVCpu);
     VBOXSTRICTRC rcStrict = iemMemFetchSysU16(pVCpu, &uSelRet, UINT8_MAX, pCtx->tr.u64Base);
     if (rcStrict != VINF_SUCCESS)
@@ -3033 +3032 @@
 
     uint32_t uNextEip = pCtx->eip + cbInstr;
-    return iemTaskSwitch(pVCpu, pVCpu->iem.s.CTX_SUFF(pCtx), IEMTASKSWITCH_IRET, uNextEip, 0 /* fFlags */, 0 /* uErr */,
+    return iemTaskSwitch(pVCpu, pCtx, IEMTASKSWITCH_IRET, uNextEip, 0 /* fFlags */, 0 /* uErr */,
                          0 /* uCr2 */, uSelRet, &TssDesc);
 #endif
@@ -3046 +3045 @@
 IEM_CIMPL_DEF_1(iemCImpl_iret_prot, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     NOREF(cbInstr);
     Assert(enmEffOpSize == IEMMODE_32BIT || enmEffOpSize == IEMMODE_16BIT);
@@ -3421 +3420 @@
 IEM_CIMPL_DEF_1(iemCImpl_iret_64bit, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     NOREF(cbInstr);
 
@@ -3744 +3743 @@
 IEM_CIMPL_DEF_0(iemCImpl_syscall)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -3846 +3845 @@
 
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -3952 +3951 @@
 IEM_CIMPL_DEF_2(iemCImpl_LoadSReg, uint8_t, iSegReg, uint16_t, uSel)
 {
-    /*PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);*/
+    /*PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);*/
     uint16_t       *pSel = iemSRegRef(pVCpu, iSegReg);
     PCPUMSELREGHID  pHid = iemSRegGetHid(pVCpu, iSegReg);
@@ -4142 +4141 @@
         if (iSegReg == X86_SREG_SS)
         {
-            PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+            PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
             EMSetInhibitInterruptsPC(pVCpu, pCtx->rip);
         }
@@ -4158 +4157 @@
 IEM_CIMPL_DEF_2(iemCImpl_pop_Sreg, uint8_t, iSegReg, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);
     VBOXSTRICTRC    rcStrict;
 
@@ -4220 +4219 @@
                 IEMMODE,  enmEffOpSize)
 {
-    /*PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);*/
+    /*PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);*/
     VBOXSTRICTRC    rcStrict;
 
@@ -4271 +4270 @@
 
     /* Within the table limits? */
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     RTGCPTR GCPtrBase;
     if (uSel & X86_SEL_LDT)
@@ -4351 +4350 @@
 
     /* commit */
-    pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.Bits.u1ZF = fAccessible;
+    IEM_GET_CTX(pVCpu)->eflags.Bits.u1ZF = fAccessible;
 
     iemRegAddToRipAndClearRF(pVCpu, cbInstr);
@@ -4383 +4382 @@
         if (!Desc.Legacy.Gen.u1DescType)
         {
-            if (CPUMIsGuestInLongModeEx(pVCpu->iem.s.CTX_SUFF(pCtx)))
+            if (CPUMIsGuestInLongModeEx(IEM_GET_CTX(pVCpu)))
             {
                 if (Desc.Long.Gen.u5Zeros)
@@ -4458 +4457 @@
 
     /* commit flags value and advance rip. */
-    pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.Bits.u1ZF = fDescOk;
+    IEM_GET_CTX(pVCpu)->eflags.Bits.u1ZF = fDescOk;
     iemRegAddToRipAndClearRF(pVCpu, cbInstr);
 
@@ -4494 +4493 @@
     if (pVCpu->iem.s.uCpl != 0)
         return iemRaiseGeneralProtectionFault0(pVCpu);
-    Assert(!pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.Bits.u1VM);
+    Assert(!IEM_GET_CTX(pVCpu)->eflags.Bits.u1VM);
 
     /*
@@ -4511 +4510 @@
             else
             {
-                PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+                PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
                 pCtx->gdtr.cbGdt = cbLimit;
                 pCtx->gdtr.pGdt  = GCPtrBase;
@@ -4541 +4540 @@
      *       you really must know.
      */
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     VBOXSTRICTRC rcStrict = iemMemStoreDataXdtr(pVCpu, pCtx->gdtr.cbGdt, pCtx->gdtr.pGdt, iEffSeg, GCPtrEffDst);
     if (rcStrict == VINF_SUCCESS)
@@ -4560 +4559 @@
     if (pVCpu->iem.s.uCpl != 0)
         return iemRaiseGeneralProtectionFault0(pVCpu);
-    Assert(!pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.Bits.u1VM);
+    Assert(!IEM_GET_CTX(pVCpu)->eflags.Bits.u1VM);
 
     /*
@@ -4577 +4576 @@
             else
             {
-                PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+                PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
                 pCtx->idtr.cbIdt = cbLimit;
                 pCtx->idtr.pIdt  = GCPtrBase;
@@ -4606 +4605 @@
      *       you really must know.
      */
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     VBOXSTRICTRC rcStrict = iemMemStoreDataXdtr(pVCpu, pCtx->idtr.cbIdt, pCtx->idtr.pIdt, iEffSeg, GCPtrEffDst);
     if (rcStrict == VINF_SUCCESS)
@@ -4621 +4620 @@
 IEM_CIMPL_DEF_1(iemCImpl_lldt, uint16_t, uNewLdt)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -4747 +4746 @@
 IEM_CIMPL_DEF_1(iemCImpl_ltr, uint16_t, uNewTr)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -4869 +4868 @@
 IEM_CIMPL_DEF_2(iemCImpl_mov_Rd_Cd, uint8_t, iGReg, uint8_t, iCrReg)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     if (pVCpu->iem.s.uCpl != 0)
         return iemRaiseGeneralProtectionFault0(pVCpu);
@@ -4918 +4917 @@
 IEM_CIMPL_DEF_2(iemCImpl_load_CrX, uint8_t, iCrReg, uint64_t, uNewCrX)
 {
-    PCPUMCTX        pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx  = IEM_GET_CTX(pVCpu);
     VBOXSTRICTRC    rcStrict;
     int             rc;
@@ -5233 +5232 @@
     if (pVCpu->iem.s.uCpl != 0)
         return iemRaiseGeneralProtectionFault0(pVCpu);
-    Assert(!pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.Bits.u1VM);
+    Assert(!IEM_GET_CTX(pVCpu)->eflags.Bits.u1VM);
 
     /*
@@ -5254 +5253 @@
 IEM_CIMPL_DEF_1(iemCImpl_lmsw, uint16_t, u16NewMsw)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     if (pVCpu->iem.s.uCpl != 0)
@@ -5277 +5276 @@
         return iemRaiseGeneralProtectionFault0(pVCpu);
 
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     uint64_t uNewCr0 = pCtx->cr0;
     uNewCr0 &= ~X86_CR0_TS;
@@ -5292 +5291 @@
 IEM_CIMPL_DEF_2(iemCImpl_mov_Rd_Dd, uint8_t, iGReg, uint8_t, iDrReg)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -5360 +5359 @@
 IEM_CIMPL_DEF_2(iemCImpl_mov_Dd_Rd, uint8_t, iDrReg, uint8_t, iGReg)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -5459 +5458 @@
     if (pVCpu->iem.s.uCpl != 0)
         return iemRaiseGeneralProtectionFault0(pVCpu);
-    Assert(!pVCpu->iem.s.CTX_SUFF(pCtx)->eflags.Bits.u1VM);
+    Assert(!IEM_GET_CTX(pVCpu)->eflags.Bits.u1VM);
 
     int rc = PGMInvalidatePage(pVCpu, GCPtrPage);
@@ -5480 +5479 @@
 IEM_CIMPL_DEF_0(iemCImpl_rdtsc)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -5515 +5514 @@
 IEM_CIMPL_DEF_0(iemCImpl_rdmsr)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -5564 +5563 @@
 IEM_CIMPL_DEF_0(iemCImpl_wrmsr)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -5630 +5629 @@
 IEM_CIMPL_DEF_2(iemCImpl_in, uint16_t, u16Port, uint8_t, cbReg)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -5688 +5687 @@
 IEM_CIMPL_DEF_1(iemCImpl_in_eAX_DX, uint8_t, cbReg)
 {
-    return IEM_CIMPL_CALL_2(iemCImpl_in, pVCpu->iem.s.CTX_SUFF(pCtx)->dx, cbReg);
+    return IEM_CIMPL_CALL_2(iemCImpl_in, IEM_GET_CTX(pVCpu)->dx, cbReg);
 }
 
@@ -5700 +5699 @@
 IEM_CIMPL_DEF_2(iemCImpl_out, uint16_t, u16Port, uint8_t, cbReg)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -5757 +5756 @@
 IEM_CIMPL_DEF_1(iemCImpl_out_DX_eAX, uint8_t, cbReg)
 {
-    return IEM_CIMPL_CALL_2(iemCImpl_out, pVCpu->iem.s.CTX_SUFF(pCtx)->dx, cbReg);
+    return IEM_CIMPL_CALL_2(iemCImpl_out, IEM_GET_CTX(pVCpu)->dx, cbReg);
 }
 
@@ -5766 +5765 @@
 IEM_CIMPL_DEF_0(iemCImpl_cli)
 {
-    PCPUMCTX        pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx    = IEM_GET_CTX(pVCpu);
     uint32_t        fEfl    = IEMMISC_GET_EFL(pVCpu, pCtx);
     uint32_t const  fEflOld = fEfl;
@@ -5808 +5807 @@
 IEM_CIMPL_DEF_0(iemCImpl_sti)
 {
-    PCPUMCTX        pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx    = IEM_GET_CTX(pVCpu);
     uint32_t        fEfl    = IEMMISC_GET_EFL(pVCpu, pCtx);
     uint32_t const  fEflOld = fEfl;
@@ -5884 +5883 @@
      * Gather the operands and validate them.
      */
-    PCPUMCTX pCtx       = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx       = IEM_GET_CTX(pVCpu);
     RTGCPTR  GCPtrMem   = pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT ? pCtx->rax : pCtx->eax;
     uint32_t uEcx       = pCtx->ecx;
@@ -5940 +5939 @@
      * Gather the operands and validate them.
      */
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     uint32_t uEax = pCtx->eax;
     uint32_t uEcx = pCtx->ecx;
@@ -5991 +5990 @@
      * Do the job.
      */
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     uint64_t uOtherGsBase = pCtx->msrKERNELGSBASE;
     pCtx->msrKERNELGSBASE = pCtx->gs.u64Base;
@@ -6006 +6005 @@
 IEM_CIMPL_DEF_0(iemCImpl_cpuid)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     CPUMGetGuestCpuId(pVCpu, pCtx->eax, pCtx->ecx, &pCtx->eax, &pCtx->ebx, &pCtx->ecx, &pCtx->edx);
@@ -6026 +6025 @@
 IEM_CIMPL_DEF_1(iemCImpl_aad, uint8_t, bImm)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     uint16_t const ax = pCtx->ax;
@@ -6047 +6046 @@
 IEM_CIMPL_DEF_1(iemCImpl_aam, uint8_t, bImm)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     Assert(bImm != 0); /* #DE on 0 is handled in the decoder. */
 
@@ -6068 +6067 @@
 IEM_CIMPL_DEF_0(iemCImpl_daa)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     uint8_t const  al       = pCtx->al;
@@ -6101 +6100 @@
 IEM_CIMPL_DEF_0(iemCImpl_das)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     uint8_t const  uInputAL = pCtx->al;
@@ -6180 +6179 @@
 IEM_CIMPL_DEF_0(iemCImpl_xgetbv)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     if (pCtx->cr4 & X86_CR4_OSXSAVE)
     {
@@ -6211 +6210 @@
 IEM_CIMPL_DEF_0(iemCImpl_xsetbv)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     if (pCtx->cr4 & X86_CR4_OSXSAVE)
     {
@@ -6258 +6257 @@
 IEM_CIMPL_DEF_1(iemCImpl_finit, bool, fCheckXcpts)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     if (pCtx->cr0 & (X86_CR0_EM | X86_CR0_TS))
@@ -6295 +6294 @@
 IEM_CIMPL_DEF_3(iemCImpl_fxsave, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -6399 +6398 @@
 IEM_CIMPL_DEF_3(iemCImpl_fxrstor, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /*
@@ -6647 +6646 @@
 IEM_CIMPL_DEF_3(iemCImpl_fnstenv, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst)
 {
-    PCPUMCTX     pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX     pCtx = IEM_GET_CTX(pVCpu);
     RTPTRUNION   uPtr;
     VBOXSTRICTRC rcStrict = iemMemMap(pVCpu, &uPtr.pv, enmEffOpSize == IEMMODE_16BIT ? 14 : 28,
@@ -6674 +6673 @@
 IEM_CIMPL_DEF_3(iemCImpl_fnsave, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst)
 {
-    PCPUMCTX     pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX     pCtx = IEM_GET_CTX(pVCpu);
     RTPTRUNION   uPtr;
     VBOXSTRICTRC rcStrict = iemMemMap(pVCpu, &uPtr.pv, enmEffOpSize == IEMMODE_16BIT ? 94 : 108,
@@ -6725 +6724 @@
 IEM_CIMPL_DEF_3(iemCImpl_fldenv, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc)
 {
-    PCPUMCTX     pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX     pCtx = IEM_GET_CTX(pVCpu);
     RTCPTRUNION  uPtr;
     VBOXSTRICTRC rcStrict = iemMemMap(pVCpu, (void **)&uPtr.pv, enmEffOpSize == IEMMODE_16BIT ? 14 : 28,
@@ -6752 +6751 @@
 IEM_CIMPL_DEF_3(iemCImpl_frstor, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc)
 {
-    PCPUMCTX     pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX     pCtx = IEM_GET_CTX(pVCpu);
     RTCPTRUNION  uPtr;
     VBOXSTRICTRC rcStrict = iemMemMap(pVCpu, (void **)&uPtr.pv, enmEffOpSize == IEMMODE_16BIT ? 94 : 108,
@@ -6787 +6786 @@
 IEM_CIMPL_DEF_1(iemCImpl_fldcw, uint16_t, u16Fcw)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     /** @todo Testcase: Check what happens when trying to load X86_FCW_PC_RSVD. */
@@ -6813 +6812 @@
 IEM_CIMPL_DEF_1(iemCImpl_fxch_underflow, uint8_t, iStReg)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
 
     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
@@ -6862 +6861 @@
 IEM_CIMPL_DEF_3(iemCImpl_fcomi_fucomi, uint8_t, iStReg, PFNIEMAIMPLFPUR80EFL, pfnAImpl, bool, fPop)
 {
-    PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX pCtx = IEM_GET_CTX(pVCpu);
     Assert(iStReg < 8);
 

trunk/src/VBox/VMM/VMMAll/IEMAllCImplStrInstr.cpp.h

@@ -156 +156 @@
 {
     PVM         pVM   = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX    pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx  = IEM_GET_CTX(pVCpu);
 
     /*
@@ -325 +325 @@
 {
     PVM         pVM   = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX    pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx  = IEM_GET_CTX(pVCpu);
 
     /*
@@ -494 +494 @@
 {
     PVM         pVM   = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX    pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx  = IEM_GET_CTX(pVCpu);
 
     /*
@@ -626 +626 @@
 {
     PVM         pVM   = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX    pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx  = IEM_GET_CTX(pVCpu);
 
     /*
@@ -759 +759 @@
 {
     PVM         pVM   = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX    pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx  = IEM_GET_CTX(pVCpu);
 
     /*
@@ -933 +933 @@
 {
     PVM         pVM   = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX    pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx  = IEM_GET_CTX(pVCpu);
 
     /*
@@ -1066 +1066 @@
 {
     PVM         pVM   = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX    pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx  = IEM_GET_CTX(pVCpu);
 
     /*
@@ -1194 +1194 @@
 {
     PVM             pVM  = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);
     VBOXSTRICTRC    rcStrict;
 
@@ -1257 +1257 @@
 {
     PVM         pVM   = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX    pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx  = IEM_GET_CTX(pVCpu);
 
     /*
@@ -1440 +1440 @@
 {
     PVM             pVM  = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX        pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx = IEM_GET_CTX(pVCpu);
     VBOXSTRICTRC    rcStrict;
 
@@ -1484 +1484 @@
 {
     PVM         pVM   = pVCpu->CTX_SUFF(pVM);
-    PCPUMCTX    pCtx  = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX    pCtx  = IEM_GET_CTX(pVCpu);
 
     /*

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -10780 +10780 @@
     pVCpu->iem.s.offOpcode = offOpcodeSaved;
 
-    PCPUMCTX        pCtx     = pVCpu->iem.s.CTX_SUFF(pCtx);
+    PCPUMCTX        pCtx     = IEM_GET_CTX(pVCpu);
     uint64_t const  RspSaved = pCtx->rsp;
     switch (pVCpu->iem.s.enmEffOpSize)
@@ -17658 +17658 @@
 {
     /* Registers? How?? */
-    if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
+    if (RT_LIKELY((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)))
+    { /* likely */ }
+    else
         return IEMOP_RAISE_INVALID_OPCODE(); /* callf eax is not legal */
 

trunk/src/VBox/VMM/include/IEMInternal.h

@@ -635 +635 @@
 
 
+/** @def IEM_GET_CTX
+ * Gets the guest CPU context for the calling EMT.
+ * @returns PCPUMCTX
+ * @param   a_pVCpu The cross context virtual CPU structure of the calling thread.
+ */
+#if !defined(IEM_VERIFICATION_MODE_FULL) && !defined(IEM_VERIFICATION_MODE) \
+ && !defined(IEM_VERIFICATION_MODE_MINIMAL) && defined(VMCPU_INCL_CPUM_GST_CTX)
+# define IEM_GET_CTX(a_pVCpu) (&(a_pVCpu)->cpum.GstCtx)
+#else
+# define IEM_GET_CTX(a_pVCpu) ((a_pVCpu)->iem.s.CTX_SUFF(pCtx))
+#endif
+
 /** Gets the current IEMTARGETCPU value.
  * @returns IEMTARGETCPU value.
- * @param   a_pVCpu         The IEM per CPU instance data.
+ * @param   a_pVCpu The cross context virtual CPU structure of the calling thread.
  */
 #if IEM_CFG_TARGET_CPU != IEMTARGETCPU_DYNAMIC