Changeset 62091 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Jul 7, 2016 12:25:11 AM (9 years ago)
- svn:sync-xref-src-repo-rev:
- 108564
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r62090 r62091 10769 10769 } while (0) 10770 10770 10771 /** The instruction allows no lock prefixing (in this encoding), throw \#UD if10772 * lock prefixed.10773 * @deprecated IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX */10774 #define IEMOP_HLP_NO_LOCK_PREFIX() \10775 do \10776 { \10777 if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK) \10778 return IEMOP_RAISE_INVALID_LOCK_PREFIX(); \10779 } while (0)10780 10781 10771 /** The instruction is not available in 64-bit mode, throw \#UD if we're in 10782 10772 * 64-bit mode. */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h
r62076 r62091 38 38 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 39 39 { 40 IEMOP_HLP_ NO_LOCK_PREFIX();40 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 41 41 42 42 IEM_MC_BEGIN(3, 0); … … 68 68 69 69 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 70 if (!pImpl->pfnLockedU8) 71 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 70 72 IEM_MC_MEM_MAP(pu8Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 71 73 IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); … … 100 102 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 101 103 { 102 IEMOP_HLP_ NO_LOCK_PREFIX();104 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 103 105 104 106 switch (pVCpu->iem.s.enmEffOpSize) … … 170 172 171 173 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 174 if (!pImpl->pfnLockedU16) 175 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 172 176 IEM_MC_MEM_MAP(pu16Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 173 177 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); … … 192 196 193 197 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 198 if (!pImpl->pfnLockedU32) 199 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 194 200 IEM_MC_MEM_MAP(pu32Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 195 201 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); … … 214 220 215 221 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 222 if (!pImpl->pfnLockedU64) 223 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 216 224 IEM_MC_MEM_MAP(pu64Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 217 225 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); … … 242 250 { 243 251 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 244 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */245 252 246 253 /* … … 249 256 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 250 257 { 258 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 251 259 IEM_MC_BEGIN(3, 0); 252 260 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 274 282 275 283 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 284 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 276 285 IEM_MC_FETCH_MEM_U8(u8Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 277 286 IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); … … 295 304 { 296 305 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 297 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */298 306 299 307 /* … … 302 310 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 303 311 { 312 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 304 313 switch (pVCpu->iem.s.enmEffOpSize) 305 314 { … … 366 375 367 376 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 377 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 368 378 IEM_MC_FETCH_MEM_U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 369 379 IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); … … 383 393 384 394 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 395 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 385 396 IEM_MC_FETCH_MEM_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 386 397 IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); … … 401 412 402 413 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 414 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 403 415 IEM_MC_FETCH_MEM_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 404 416 IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); … … 424 436 { 425 437 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 426 IEMOP_HLP_ NO_LOCK_PREFIX();438 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 427 439 428 440 IEM_MC_BEGIN(3, 0); … … 454 466 { 455 467 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 456 IEMOP_HLP_ NO_LOCK_PREFIX();468 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 457 469 458 470 IEM_MC_BEGIN(3, 0); … … 473 485 { 474 486 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 475 IEMOP_HLP_ NO_LOCK_PREFIX();487 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 476 488 477 489 IEM_MC_BEGIN(3, 0); … … 494 506 { 495 507 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 496 IEMOP_HLP_ NO_LOCK_PREFIX();508 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 497 509 498 510 IEM_MC_BEGIN(3, 0); … … 976 988 IEMOP_MNEMONIC("smsw"); 977 989 IEMOP_HLP_MIN_286(); 978 IEMOP_HLP_NO_LOCK_PREFIX();979 990 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 980 991 { 992 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 981 993 switch (pVCpu->iem.s.enmEffOpSize) 982 994 { … … 1024 1036 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 1025 1037 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 1038 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1026 1039 IEM_MC_FETCH_CR0_U16(u16Tmp); 1027 1040 if (IEM_GET_TARGET_CPU(pVCpu) > IEMTARGETCPU_386) … … 1046 1059 IEMOP_MNEMONIC("lmsw"); 1047 1060 IEMOP_HLP_MIN_286(); 1048 IEMOP_HLP_NO_LOCK_PREFIX();1049 1061 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 1050 1062 { 1063 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1051 1064 IEM_MC_BEGIN(1, 0); 1052 1065 IEM_MC_ARG(uint16_t, u16Tmp, 0); … … 1061 1074 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 1062 1075 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 1076 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1063 1077 IEM_MC_FETCH_MEM_U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 1064 1078 IEM_MC_CALL_CIMPL_1(iemCImpl_lmsw, u16Tmp); … … 1074 1088 IEMOP_MNEMONIC("invlpg"); 1075 1089 IEMOP_HLP_MIN_486(); 1076 IEMOP_HLP_ NO_LOCK_PREFIX();1090 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1077 1091 IEM_MC_BEGIN(1, 1); 1078 1092 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 0); … … 1089 1103 IEMOP_MNEMONIC("swapgs"); 1090 1104 IEMOP_HLP_ONLY_64BIT(); 1091 IEMOP_HLP_ NO_LOCK_PREFIX();1105 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1092 1106 return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_swapgs); 1093 1107 } … … 1304 1318 { 1305 1319 IEMOP_MNEMONIC("syscall"); /** @todo 286 LOADALL */ 1306 IEMOP_HLP_ NO_LOCK_PREFIX();1320 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1307 1321 return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_syscall); 1308 1322 } … … 1313 1327 { 1314 1328 IEMOP_MNEMONIC("clts"); 1315 IEMOP_HLP_ NO_LOCK_PREFIX();1329 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1316 1330 return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_clts); 1317 1331 } … … 1322 1336 { 1323 1337 IEMOP_MNEMONIC("sysret"); /** @todo 386 LOADALL */ 1324 IEMOP_HLP_ NO_LOCK_PREFIX();1338 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1325 1339 return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_sysret); 1326 1340 } … … 1337 1351 IEMOP_MNEMONIC("wbinvd"); 1338 1352 IEMOP_HLP_MIN_486(); 1339 IEMOP_HLP_ NO_LOCK_PREFIX();1353 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1340 1354 IEM_MC_BEGIN(0, 0); 1341 1355 IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO(); … … 1370 1384 } 1371 1385 1372 IEMOP_HLP_NO_LOCK_PREFIX();1373 1386 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) 1374 1387 { … … 1387 1400 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 1388 1401 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1402 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1389 1403 /* Currently a NOP. */ 1390 1404 IEM_MC_ADVANCE_RIP(); … … 1688 1702 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 1689 1703 { 1690 IEMOP_HLP_NO_LOCK_PREFIX();1691 1704 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) 1692 1705 { … … 1705 1718 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 1706 1719 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1720 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1707 1721 /* Currently a NOP. */ 1708 1722 IEM_MC_ADVANCE_RIP(); … … 1718 1732 FNIEMOP_DEF(iemOp_nop_Ev) 1719 1733 { 1720 IEMOP_HLP_NO_LOCK_PREFIX();1721 1734 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1722 1735 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 1723 1736 { 1737 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1724 1738 IEM_MC_BEGIN(0, 0); 1725 1739 IEM_MC_ADVANCE_RIP(); … … 1731 1745 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 1732 1746 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1747 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1733 1748 /* Currently a NOP. */ 1734 1749 IEM_MC_ADVANCE_RIP(); … … 1778 1793 IEMOP_HLP_MIN_386(); 1779 1794 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1780 IEMOP_HLP_ NO_LOCK_PREFIX();1795 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1781 1796 if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REX_R) 1782 1797 return IEMOP_RAISE_INVALID_OPCODE(); … … 3482 3497 { 3483 3498 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3484 IEMOP_HLP_ NO_LOCK_PREFIX();3499 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3485 3500 3486 3501 IEM_MC_BEGIN(0, 0); … … 3495 3510 { 3496 3511 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3497 IEMOP_HLP_ NO_LOCK_PREFIX();3512 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3498 3513 3499 3514 IEM_MC_BEGIN(0, 0); … … 3518 3533 { 3519 3534 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3520 IEMOP_HLP_ NO_LOCK_PREFIX();3535 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3521 3536 3522 3537 IEM_MC_BEGIN(0, 0); … … 3531 3546 { 3532 3547 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3533 IEMOP_HLP_ NO_LOCK_PREFIX();3548 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3534 3549 3535 3550 IEM_MC_BEGIN(0, 0); … … 3554 3569 { 3555 3570 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3556 IEMOP_HLP_ NO_LOCK_PREFIX();3571 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3557 3572 3558 3573 IEM_MC_BEGIN(0, 0); … … 3567 3582 { 3568 3583 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3569 IEMOP_HLP_ NO_LOCK_PREFIX();3584 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3570 3585 3571 3586 IEM_MC_BEGIN(0, 0); … … 3590 3605 { 3591 3606 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3592 IEMOP_HLP_ NO_LOCK_PREFIX();3607 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3593 3608 3594 3609 IEM_MC_BEGIN(0, 0); … … 3603 3618 { 3604 3619 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3605 IEMOP_HLP_ NO_LOCK_PREFIX();3620 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3606 3621 3607 3622 IEM_MC_BEGIN(0, 0); … … 3626 3641 { 3627 3642 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3628 IEMOP_HLP_ NO_LOCK_PREFIX();3643 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3629 3644 3630 3645 IEM_MC_BEGIN(0, 0); … … 3639 3654 { 3640 3655 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3641 IEMOP_HLP_ NO_LOCK_PREFIX();3656 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3642 3657 3643 3658 IEM_MC_BEGIN(0, 0); … … 3662 3677 { 3663 3678 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3664 IEMOP_HLP_ NO_LOCK_PREFIX();3679 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3665 3680 3666 3681 IEM_MC_BEGIN(0, 0); … … 3675 3690 { 3676 3691 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3677 IEMOP_HLP_ NO_LOCK_PREFIX();3692 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3678 3693 3679 3694 IEM_MC_BEGIN(0, 0); … … 3698 3713 { 3699 3714 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3700 IEMOP_HLP_ NO_LOCK_PREFIX();3715 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3701 3716 3702 3717 IEM_MC_BEGIN(0, 0); … … 3711 3726 { 3712 3727 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3713 IEMOP_HLP_ NO_LOCK_PREFIX();3728 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3714 3729 3715 3730 IEM_MC_BEGIN(0, 0); … … 3734 3749 { 3735 3750 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3736 IEMOP_HLP_ NO_LOCK_PREFIX();3751 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3737 3752 3738 3753 IEM_MC_BEGIN(0, 0); … … 3747 3762 { 3748 3763 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3749 IEMOP_HLP_ NO_LOCK_PREFIX();3764 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3750 3765 3751 3766 IEM_MC_BEGIN(0, 0); … … 3770 3785 { 3771 3786 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3772 IEMOP_HLP_ NO_LOCK_PREFIX();3787 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3773 3788 3774 3789 IEM_MC_BEGIN(0, 0); … … 3783 3798 { 3784 3799 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3785 IEMOP_HLP_ NO_LOCK_PREFIX();3800 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3786 3801 3787 3802 IEM_MC_BEGIN(0, 0); … … 3806 3821 { 3807 3822 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3808 IEMOP_HLP_ NO_LOCK_PREFIX();3823 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3809 3824 3810 3825 IEM_MC_BEGIN(0, 0); … … 3819 3834 { 3820 3835 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3821 IEMOP_HLP_ NO_LOCK_PREFIX();3836 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3822 3837 3823 3838 IEM_MC_BEGIN(0, 0); … … 3842 3857 { 3843 3858 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3844 IEMOP_HLP_ NO_LOCK_PREFIX();3859 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3845 3860 3846 3861 IEM_MC_BEGIN(0, 0); … … 3855 3870 { 3856 3871 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3857 IEMOP_HLP_ NO_LOCK_PREFIX();3872 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3858 3873 3859 3874 IEM_MC_BEGIN(0, 0); … … 3878 3893 { 3879 3894 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3880 IEMOP_HLP_ NO_LOCK_PREFIX();3895 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3881 3896 3882 3897 IEM_MC_BEGIN(0, 0); … … 3891 3906 { 3892 3907 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3893 IEMOP_HLP_ NO_LOCK_PREFIX();3908 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3894 3909 3895 3910 IEM_MC_BEGIN(0, 0); … … 3914 3929 { 3915 3930 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3916 IEMOP_HLP_ NO_LOCK_PREFIX();3931 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3917 3932 3918 3933 IEM_MC_BEGIN(0, 0); … … 3927 3942 { 3928 3943 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3929 IEMOP_HLP_ NO_LOCK_PREFIX();3944 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3930 3945 3931 3946 IEM_MC_BEGIN(0, 0); … … 3950 3965 { 3951 3966 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3952 IEMOP_HLP_ NO_LOCK_PREFIX();3967 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3953 3968 3954 3969 IEM_MC_BEGIN(0, 0); … … 3963 3978 { 3964 3979 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 3965 IEMOP_HLP_ NO_LOCK_PREFIX();3980 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3966 3981 3967 3982 IEM_MC_BEGIN(0, 0); … … 3986 4001 { 3987 4002 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 3988 IEMOP_HLP_ NO_LOCK_PREFIX();4003 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3989 4004 3990 4005 IEM_MC_BEGIN(0, 0); … … 3999 4014 { 4000 4015 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 4001 IEMOP_HLP_ NO_LOCK_PREFIX();4016 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4002 4017 4003 4018 IEM_MC_BEGIN(0, 0); … … 4022 4037 { 4023 4038 int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm); 4024 IEMOP_HLP_ NO_LOCK_PREFIX();4039 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4025 4040 4026 4041 IEM_MC_BEGIN(0, 0); … … 4035 4050 { 4036 4051 int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm); 4037 IEMOP_HLP_ NO_LOCK_PREFIX();4052 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4038 4053 4039 4054 IEM_MC_BEGIN(0, 0); … … 4055 4070 IEMOP_HLP_MIN_386(); 4056 4071 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4057 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4058 4072 4059 4073 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4063 4077 { 4064 4078 /* register target */ 4079 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4065 4080 IEM_MC_BEGIN(0, 0); 4066 4081 IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) { … … 4078 4093 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4079 4094 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4095 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4080 4096 IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) { 4081 4097 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); … … 4096 4112 IEMOP_HLP_MIN_386(); 4097 4113 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4098 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4099 4114 4100 4115 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4104 4119 { 4105 4120 /* register target */ 4121 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4106 4122 IEM_MC_BEGIN(0, 0); 4107 4123 IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) { … … 4119 4135 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4120 4136 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4137 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4121 4138 IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) { 4122 4139 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 4137 4154 IEMOP_HLP_MIN_386(); 4138 4155 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4139 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4140 4156 4141 4157 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4145 4161 { 4146 4162 /* register target */ 4163 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4147 4164 IEM_MC_BEGIN(0, 0); 4148 4165 IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) { … … 4160 4177 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4161 4178 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4179 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4162 4180 IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) { 4163 4181 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); … … 4178 4196 IEMOP_HLP_MIN_386(); 4179 4197 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4180 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4181 4198 4182 4199 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4186 4203 { 4187 4204 /* register target */ 4205 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4188 4206 IEM_MC_BEGIN(0, 0); 4189 4207 IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) { … … 4201 4219 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4202 4220 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4221 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4203 4222 IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) { 4204 4223 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 4219 4238 IEMOP_HLP_MIN_386(); 4220 4239 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4221 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4222 4240 4223 4241 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4227 4245 { 4228 4246 /* register target */ 4247 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4229 4248 IEM_MC_BEGIN(0, 0); 4230 4249 IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) { … … 4242 4261 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4243 4262 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4263 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4244 4264 IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) { 4245 4265 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); … … 4260 4280 IEMOP_HLP_MIN_386(); 4261 4281 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4262 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4263 4282 4264 4283 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4268 4287 { 4269 4288 /* register target */ 4289 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4270 4290 IEM_MC_BEGIN(0, 0); 4271 4291 IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) { … … 4283 4303 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4284 4304 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4305 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4285 4306 IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) { 4286 4307 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 4301 4322 IEMOP_HLP_MIN_386(); 4302 4323 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4303 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4304 4324 4305 4325 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4309 4329 { 4310 4330 /* register target */ 4331 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4311 4332 IEM_MC_BEGIN(0, 0); 4312 4333 IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) { … … 4324 4345 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4325 4346 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4347 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4326 4348 IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) { 4327 4349 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); … … 4342 4364 IEMOP_HLP_MIN_386(); 4343 4365 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4344 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4345 4366 4346 4367 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4350 4371 { 4351 4372 /* register target */ 4373 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4352 4374 IEM_MC_BEGIN(0, 0); 4353 4375 IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) { … … 4365 4387 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4366 4388 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4389 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4367 4390 IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) { 4368 4391 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 4383 4406 IEMOP_HLP_MIN_386(); 4384 4407 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4385 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4386 4408 4387 4409 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4391 4413 { 4392 4414 /* register target */ 4415 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4393 4416 IEM_MC_BEGIN(0, 0); 4394 4417 IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) { … … 4406 4429 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4407 4430 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4431 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4408 4432 IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) { 4409 4433 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); … … 4424 4448 IEMOP_HLP_MIN_386(); 4425 4449 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4426 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4427 4450 4428 4451 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4432 4455 { 4433 4456 /* register target */ 4457 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4434 4458 IEM_MC_BEGIN(0, 0); 4435 4459 IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) { … … 4447 4471 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4448 4472 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4473 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4449 4474 IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) { 4450 4475 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 4465 4490 IEMOP_HLP_MIN_386(); 4466 4491 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4467 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4468 4492 4469 4493 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4473 4497 { 4474 4498 /* register target */ 4499 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4475 4500 IEM_MC_BEGIN(0, 0); 4476 4501 IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) { … … 4488 4513 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4489 4514 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4515 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4490 4516 IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) { 4491 4517 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); … … 4506 4532 IEMOP_HLP_MIN_386(); 4507 4533 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4508 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4509 4534 4510 4535 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4514 4539 { 4515 4540 /* register target */ 4541 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4516 4542 IEM_MC_BEGIN(0, 0); 4517 4543 IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) { … … 4529 4555 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4530 4556 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4557 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4531 4558 IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) { 4532 4559 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 4547 4574 IEMOP_HLP_MIN_386(); 4548 4575 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4549 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4550 4576 4551 4577 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4555 4581 { 4556 4582 /* register target */ 4583 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4557 4584 IEM_MC_BEGIN(0, 0); 4558 4585 IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) { … … 4570 4597 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4571 4598 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4599 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4572 4600 IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) { 4573 4601 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); … … 4588 4616 IEMOP_HLP_MIN_386(); 4589 4617 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4590 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4591 4618 4592 4619 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4596 4623 { 4597 4624 /* register target */ 4625 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4598 4626 IEM_MC_BEGIN(0, 0); 4599 4627 IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) { … … 4611 4639 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4612 4640 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4641 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4613 4642 IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) { 4614 4643 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 4629 4658 IEMOP_HLP_MIN_386(); 4630 4659 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4631 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4632 4660 4633 4661 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4637 4665 { 4638 4666 /* register target */ 4667 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4639 4668 IEM_MC_BEGIN(0, 0); 4640 4669 IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) { … … 4652 4681 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4653 4682 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4683 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4654 4684 IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) { 4655 4685 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); … … 4670 4700 IEMOP_HLP_MIN_386(); 4671 4701 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4672 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */4673 4702 4674 4703 /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in … … 4678 4707 { 4679 4708 /* register target */ 4709 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4680 4710 IEM_MC_BEGIN(0, 0); 4681 4711 IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) { … … 4693 4723 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4694 4724 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4725 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4695 4726 IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) { 4696 4727 IEM_MC_STORE_MEM_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 4710 4741 FNIEMOP_DEF_1(iemOpCommonPushSReg, uint8_t, iReg) 4711 4742 { 4712 IEMOP_HLP_ NO_LOCK_PREFIX();4743 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4713 4744 if (iReg < X86_SREG_FS) 4714 4745 IEMOP_HLP_NO_64BIT(); … … 4754 4785 IEMOP_MNEMONIC("push fs"); 4755 4786 IEMOP_HLP_MIN_386(); 4756 IEMOP_HLP_ NO_LOCK_PREFIX();4787 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4757 4788 return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_FS); 4758 4789 } … … 4764 4795 IEMOP_MNEMONIC("pop fs"); 4765 4796 IEMOP_HLP_MIN_386(); 4766 IEMOP_HLP_ NO_LOCK_PREFIX();4797 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4767 4798 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_FS, pVCpu->iem.s.enmEffOpSize); 4768 4799 } … … 4774 4805 IEMOP_MNEMONIC("cpuid"); 4775 4806 IEMOP_HLP_MIN_486(); /* not all 486es. */ 4776 IEMOP_HLP_ NO_LOCK_PREFIX();4807 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4777 4808 return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_cpuid); 4778 4809 } … … 4791 4822 { 4792 4823 /* register destination. */ 4793 IEMOP_HLP_ NO_LOCK_PREFIX();4824 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4794 4825 switch (pVCpu->iem.s.enmEffOpSize) 4795 4826 { … … 4854 4885 fAccess = IEM_ACCESS_DATA_RW; 4855 4886 else /* BT */ 4856 {4857 IEMOP_HLP_NO_LOCK_PREFIX();4858 4887 fAccess = IEM_ACCESS_DATA_R; 4859 }4860 4888 4861 4889 NOREF(fAccess); … … 4873 4901 4874 4902 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4903 if (pImpl->pfnLockedU16) 4904 IEMOP_HLP_DONE_DECODING(); 4905 else 4906 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4875 4907 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 4876 4908 IEM_MC_ASSIGN(i16AddrAdj, u16Src); … … 4902 4934 4903 4935 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4936 if (pImpl->pfnLockedU16) 4937 IEMOP_HLP_DONE_DECODING(); 4938 else 4939 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4904 4940 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 4905 4941 IEM_MC_ASSIGN(i32AddrAdj, u32Src); … … 4931 4967 4932 4968 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4969 if (pImpl->pfnLockedU16) 4970 IEMOP_HLP_DONE_DECODING(); 4971 else 4972 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4933 4973 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 4934 4974 IEM_MC_ASSIGN(i64AddrAdj, u64Src); … … 4972 5012 { 4973 5013 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4974 IEMOP_HLP_NO_LOCK_PREFIX();4975 5014 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF | X86_EFL_OF); 4976 5015 … … 4978 5017 { 4979 5018 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 4980 IEMOP_HLP_ NO_LOCK_PREFIX();5019 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4981 5020 4982 5021 switch (pVCpu->iem.s.enmEffOpSize) … … 5036 5075 else 5037 5076 { 5038 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */5039 5040 5077 switch (pVCpu->iem.s.enmEffOpSize) 5041 5078 { … … 5051 5088 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 5052 5089 IEM_MC_ASSIGN(cShiftArg, cShift); 5090 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5053 5091 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 5054 5092 IEM_MC_FETCH_EFLAGS(EFlags); … … 5073 5111 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 5074 5112 IEM_MC_ASSIGN(cShiftArg, cShift); 5113 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5075 5114 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 5076 5115 IEM_MC_FETCH_EFLAGS(EFlags); … … 5095 5134 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 5096 5135 IEM_MC_ASSIGN(cShiftArg, cShift); 5136 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5097 5137 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 5098 5138 IEM_MC_FETCH_EFLAGS(EFlags); … … 5118 5158 { 5119 5159 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 5120 IEMOP_HLP_NO_LOCK_PREFIX();5121 5160 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF | X86_EFL_OF); 5122 5161 5123 5162 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 5124 5163 { 5125 IEMOP_HLP_ NO_LOCK_PREFIX();5164 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5126 5165 5127 5166 switch (pVCpu->iem.s.enmEffOpSize) … … 5184 5223 else 5185 5224 { 5186 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */5187 5188 5225 switch (pVCpu->iem.s.enmEffOpSize) 5189 5226 { … … 5197 5234 5198 5235 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 5236 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5199 5237 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 5200 5238 IEM_MC_FETCH_GREG_U8(cShiftArg, X86_GREG_xCX); … … 5218 5256 5219 5257 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 5258 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5220 5259 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 5221 5260 IEM_MC_FETCH_GREG_U8(cShiftArg, X86_GREG_xCX); … … 5239 5278 5240 5279 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 5280 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5241 5281 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 5242 5282 IEM_MC_FETCH_GREG_U8(cShiftArg, X86_GREG_xCX); … … 5281 5321 IEMOP_MNEMONIC("push gs"); 5282 5322 IEMOP_HLP_MIN_386(); 5283 IEMOP_HLP_ NO_LOCK_PREFIX();5323 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5284 5324 return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_GS); 5285 5325 } … … 5291 5331 IEMOP_MNEMONIC("pop gs"); 5292 5332 IEMOP_HLP_MIN_386(); 5293 IEMOP_HLP_ NO_LOCK_PREFIX();5333 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5294 5334 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_GS, pVCpu->iem.s.enmEffOpSize); 5295 5335 } … … 5391 5431 { 5392 5432 IEMOP_MNEMONIC("lfence"); 5393 IEMOP_HLP_ NO_LOCK_PREFIX();5433 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5394 5434 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2) 5395 5435 return IEMOP_RAISE_INVALID_OPCODE(); … … 5410 5450 { 5411 5451 IEMOP_MNEMONIC("mfence"); 5412 IEMOP_HLP_ NO_LOCK_PREFIX();5452 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5413 5453 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2) 5414 5454 return IEMOP_RAISE_INVALID_OPCODE(); … … 5429 5469 { 5430 5470 IEMOP_MNEMONIC("sfence"); 5431 IEMOP_HLP_ NO_LOCK_PREFIX();5471 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5432 5472 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2) 5433 5473 return IEMOP_RAISE_INVALID_OPCODE(); … … 5896 5936 5897 5937 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 5898 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */5899 5938 5900 5939 /* … … 5903 5942 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 5904 5943 { 5944 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5905 5945 switch (pVCpu->iem.s.enmEffOpSize) 5906 5946 { … … 5947 5987 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 5948 5988 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 5989 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5949 5990 IEM_MC_FETCH_MEM_U8_ZX_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 5950 5991 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u16Value); … … 5958 5999 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 5959 6000 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6001 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5960 6002 IEM_MC_FETCH_MEM_U8_ZX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 5961 6003 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u32Value); … … 5969 6011 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 5970 6012 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6013 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 5971 6014 IEM_MC_FETCH_MEM_U8_ZX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 5972 6015 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u64Value); … … 5988 6031 5989 6032 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 5990 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */5991 6033 5992 6034 /** @todo Not entirely sure how the operand size prefix is handled here, … … 5998 6040 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 5999 6041 { 6042 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6000 6043 if (pVCpu->iem.s.enmEffOpSize != IEMMODE_64BIT) 6001 6044 { … … 6028 6071 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 6029 6072 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6073 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6030 6074 IEM_MC_FETCH_MEM_U16_ZX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6031 6075 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u32Value); … … 6039 6083 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 6040 6084 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6085 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6041 6086 IEM_MC_FETCH_MEM_U16_ZX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6042 6087 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u64Value); … … 6083 6128 /* register destination. */ 6084 6129 uint8_t u8Bit; IEM_OPCODE_GET_NEXT_U8(&u8Bit); 6085 IEMOP_HLP_ NO_LOCK_PREFIX();6130 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6086 6131 6087 6132 switch (pVCpu->iem.s.enmEffOpSize) … … 6141 6186 fAccess = IEM_ACCESS_DATA_RW; 6142 6187 else /* BT */ 6143 {6144 IEMOP_HLP_NO_LOCK_PREFIX();6145 6188 fAccess = IEM_ACCESS_DATA_R; 6146 }6147 6189 6148 6190 /** @todo test negative bit offsets! */ … … 6159 6201 uint8_t u8Bit; IEM_OPCODE_GET_NEXT_U8(&u8Bit); 6160 6202 IEM_MC_ASSIGN(u16Src, u8Bit & 0x0f); 6203 if (pImpl->pfnLockedU16) 6204 IEMOP_HLP_DONE_DECODING(); 6205 else 6206 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6161 6207 IEM_MC_FETCH_EFLAGS(EFlags); 6162 6208 IEM_MC_MEM_MAP(pu16Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 6182 6228 uint8_t u8Bit; IEM_OPCODE_GET_NEXT_U8(&u8Bit); 6183 6229 IEM_MC_ASSIGN(u32Src, u8Bit & 0x1f); 6230 if (pImpl->pfnLockedU16) 6231 IEMOP_HLP_DONE_DECODING(); 6232 else 6233 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6184 6234 IEM_MC_FETCH_EFLAGS(EFlags); 6185 6235 IEM_MC_MEM_MAP(pu32Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 6205 6255 uint8_t u8Bit; IEM_OPCODE_GET_NEXT_U8(&u8Bit); 6206 6256 IEM_MC_ASSIGN(u64Src, u8Bit & 0x3f); 6257 if (pImpl->pfnLockedU16) 6258 IEMOP_HLP_DONE_DECODING(); 6259 else 6260 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6207 6261 IEM_MC_FETCH_EFLAGS(EFlags); 6208 6262 IEM_MC_MEM_MAP(pu64Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); … … 6261 6315 6262 6316 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 6263 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */6264 6317 6265 6318 /* … … 6268 6321 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 6269 6322 { 6323 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6270 6324 switch (pVCpu->iem.s.enmEffOpSize) 6271 6325 { … … 6312 6366 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 6313 6367 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6368 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6314 6369 IEM_MC_FETCH_MEM_U8_SX_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6315 6370 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u16Value); … … 6323 6378 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 6324 6379 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6380 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6325 6381 IEM_MC_FETCH_MEM_U8_SX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6326 6382 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u32Value); … … 6334 6390 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 6335 6391 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6392 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6336 6393 IEM_MC_FETCH_MEM_U8_SX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6337 6394 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u64Value); … … 6353 6410 6354 6411 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 6355 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */6356 6412 6357 6413 /** @todo Not entirely sure how the operand size prefix is handled here, … … 6363 6419 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 6364 6420 { 6421 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6365 6422 if (pVCpu->iem.s.enmEffOpSize != IEMMODE_64BIT) 6366 6423 { … … 6393 6450 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 6394 6451 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6452 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6395 6453 IEM_MC_FETCH_MEM_U16_SX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6396 6454 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u32Value); … … 6404 6462 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 6405 6463 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6464 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6406 6465 IEM_MC_FETCH_MEM_U16_SX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6407 6466 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u64Value); … … 6426 6485 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 6427 6486 { 6428 IEMOP_HLP_ NO_LOCK_PREFIX();6487 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6429 6488 6430 6489 IEM_MC_BEGIN(3, 0); … … 6486 6545 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 6487 6546 { 6488 IEMOP_HLP_ NO_LOCK_PREFIX();6547 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6489 6548 6490 6549 switch (pVCpu->iem.s.enmEffOpSize) … … 6811 6870 FNIEMOP_DEF_1(iemOpCommonBswapGReg, uint8_t, iReg) 6812 6871 { 6813 IEMOP_HLP_ NO_LOCK_PREFIX();6872 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6814 6873 switch (pVCpu->iem.s.enmEffOpSize) 6815 6874 { … … 7466 7525 IEMOP_MNEMONIC("pop es"); 7467 7526 IEMOP_HLP_NO_64BIT(); 7468 IEMOP_HLP_ NO_LOCK_PREFIX();7527 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 7469 7528 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_ES, pVCpu->iem.s.enmEffOpSize); 7470 7529 } … … 7602 7661 { 7603 7662 IEMOP_MNEMONIC("pop ss"); /** @todo implies instruction fusing? */ 7604 IEMOP_HLP_ NO_LOCK_PREFIX();7663 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 7605 7664 IEMOP_HLP_NO_64BIT(); 7606 7665 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_SS, pVCpu->iem.s.enmEffOpSize); … … 7668 7727 { 7669 7728 IEMOP_MNEMONIC("pop ds"); 7670 IEMOP_HLP_ NO_LOCK_PREFIX();7729 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 7671 7730 IEMOP_HLP_NO_64BIT(); 7672 7731 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_DS, pVCpu->iem.s.enmEffOpSize); … … 7896 7955 { 7897 7956 IEMOP_MNEMONIC("cmp Eb,Gb"); 7898 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */7899 7957 return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_cmp); 7900 7958 } … … 7905 7963 { 7906 7964 IEMOP_MNEMONIC("cmp Ev,Gv"); 7907 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */7908 7965 return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_cmp); 7909 7966 } … … 7962 8019 FNIEMOP_DEF_2(iemOpCommonUnaryGReg, PCIEMOPUNARYSIZES, pImpl, uint8_t, iReg) 7963 8020 { 7964 IEMOP_HLP_ NO_LOCK_PREFIX();8021 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 7965 8022 switch (pVCpu->iem.s.enmEffOpSize) 7966 8023 { … … 8361 8418 FNIEMOP_DEF_1(iemOpCommonPushGReg, uint8_t, iReg) 8362 8419 { 8363 IEMOP_HLP_ NO_LOCK_PREFIX();8420 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8364 8421 if (pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT) 8365 8422 { … … 8482 8539 FNIEMOP_DEF_1(iemOpCommonPopGReg, uint8_t, iReg) 8483 8540 { 8484 IEMOP_HLP_ NO_LOCK_PREFIX();8541 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8485 8542 if (pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT) 8486 8543 { … … 8828 8885 { 8829 8886 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 8830 IEMOP_HLP_ NO_LOCK_PREFIX();8887 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8831 8888 IEM_MC_BEGIN(0,0); 8832 8889 IEM_MC_PUSH_U16(u16Imm); … … 8839 8896 { 8840 8897 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 8841 IEMOP_HLP_ NO_LOCK_PREFIX();8898 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8842 8899 IEM_MC_BEGIN(0,0); 8843 8900 IEM_MC_PUSH_U32(u32Imm); … … 8850 8907 { 8851 8908 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 8852 IEMOP_HLP_ NO_LOCK_PREFIX();8909 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8853 8910 IEM_MC_BEGIN(0,0); 8854 8911 IEM_MC_PUSH_U64(u64Imm); … … 9030 9087 IEMOP_HLP_MIN_186(); 9031 9088 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9032 IEMOP_HLP_ NO_LOCK_PREFIX();9089 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9033 9090 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9034 9091 … … 9211 9268 { 9212 9269 IEMOP_HLP_MIN_186(); 9213 IEMOP_HLP_ NO_LOCK_PREFIX();9270 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9214 9271 if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ)) 9215 9272 { … … 9241 9298 { 9242 9299 IEMOP_HLP_MIN_186(); 9243 IEMOP_HLP_ NO_LOCK_PREFIX();9300 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9244 9301 if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ)) 9245 9302 { … … 9303 9360 { 9304 9361 IEMOP_HLP_MIN_186(); 9305 IEMOP_HLP_ NO_LOCK_PREFIX();9362 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9306 9363 if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ)) 9307 9364 { … … 9333 9390 { 9334 9391 IEMOP_HLP_MIN_186(); 9335 IEMOP_HLP_ NO_LOCK_PREFIX();9392 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9336 9393 if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ)) 9337 9394 { … … 9396 9453 IEMOP_MNEMONIC("jo Jb"); 9397 9454 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9398 IEMOP_HLP_ NO_LOCK_PREFIX();9455 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9399 9456 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9400 9457 … … 9415 9472 IEMOP_MNEMONIC("jno Jb"); 9416 9473 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9417 IEMOP_HLP_ NO_LOCK_PREFIX();9474 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9418 9475 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9419 9476 … … 9433 9490 IEMOP_MNEMONIC("jc/jnae Jb"); 9434 9491 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9435 IEMOP_HLP_ NO_LOCK_PREFIX();9492 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9436 9493 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9437 9494 … … 9452 9509 IEMOP_MNEMONIC("jnc/jnb Jb"); 9453 9510 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9454 IEMOP_HLP_ NO_LOCK_PREFIX();9511 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9455 9512 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9456 9513 … … 9471 9528 IEMOP_MNEMONIC("je/jz Jb"); 9472 9529 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9473 IEMOP_HLP_ NO_LOCK_PREFIX();9530 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9474 9531 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9475 9532 … … 9490 9547 IEMOP_MNEMONIC("jne/jnz Jb"); 9491 9548 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9492 IEMOP_HLP_ NO_LOCK_PREFIX();9549 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9493 9550 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9494 9551 … … 9509 9566 IEMOP_MNEMONIC("jbe/jna Jb"); 9510 9567 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9511 IEMOP_HLP_ NO_LOCK_PREFIX();9568 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9512 9569 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9513 9570 … … 9528 9585 IEMOP_MNEMONIC("jnbe/ja Jb"); 9529 9586 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9530 IEMOP_HLP_ NO_LOCK_PREFIX();9587 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9531 9588 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9532 9589 … … 9547 9604 IEMOP_MNEMONIC("js Jb"); 9548 9605 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9549 IEMOP_HLP_ NO_LOCK_PREFIX();9606 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9550 9607 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9551 9608 … … 9566 9623 IEMOP_MNEMONIC("jns Jb"); 9567 9624 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9568 IEMOP_HLP_ NO_LOCK_PREFIX();9625 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9569 9626 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9570 9627 … … 9585 9642 IEMOP_MNEMONIC("jp Jb"); 9586 9643 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9587 IEMOP_HLP_ NO_LOCK_PREFIX();9644 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9588 9645 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9589 9646 … … 9604 9661 IEMOP_MNEMONIC("jnp Jb"); 9605 9662 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9606 IEMOP_HLP_ NO_LOCK_PREFIX();9663 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9607 9664 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9608 9665 … … 9623 9680 IEMOP_MNEMONIC("jl/jnge Jb"); 9624 9681 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9625 IEMOP_HLP_ NO_LOCK_PREFIX();9682 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9626 9683 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9627 9684 … … 9642 9699 IEMOP_MNEMONIC("jnl/jge Jb"); 9643 9700 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9644 IEMOP_HLP_ NO_LOCK_PREFIX();9701 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9645 9702 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9646 9703 … … 9661 9718 IEMOP_MNEMONIC("jle/jng Jb"); 9662 9719 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9663 IEMOP_HLP_ NO_LOCK_PREFIX();9720 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9664 9721 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9665 9722 … … 9680 9737 IEMOP_MNEMONIC("jnle/jg Jb"); 9681 9738 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 9682 IEMOP_HLP_ NO_LOCK_PREFIX();9739 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9683 9740 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 9684 9741 … … 9705 9762 /* register target */ 9706 9763 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 9707 IEMOP_HLP_ NO_LOCK_PREFIX();9764 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9708 9765 IEM_MC_BEGIN(3, 0); 9709 9766 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 9724 9781 if (pImpl->pfnLockedU8) 9725 9782 fAccess = IEM_ACCESS_DATA_RW; 9726 else 9727 { /* CMP */ 9728 IEMOP_HLP_NO_LOCK_PREFIX(); 9783 else /* CMP */ 9729 9784 fAccess = IEM_ACCESS_DATA_R; 9730 }9731 9785 IEM_MC_BEGIN(3, 2); 9732 9786 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 9737 9791 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 9738 9792 IEM_MC_ARG_CONST(uint8_t, u8Src, /*=*/ u8Imm, 1); 9793 if (pImpl->pfnLockedU8) 9794 IEMOP_HLP_DONE_DECODING(); 9795 else 9796 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9739 9797 9740 9798 IEM_MC_MEM_MAP(pu8Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); … … 9769 9827 /* register target */ 9770 9828 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 9771 IEMOP_HLP_ NO_LOCK_PREFIX();9829 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9772 9830 IEM_MC_BEGIN(3, 0); 9773 9831 IEM_MC_ARG(uint16_t *, pu16Dst, 0); … … 9788 9846 if (pImpl->pfnLockedU16) 9789 9847 fAccess = IEM_ACCESS_DATA_RW; 9790 else 9791 { /* CMP, TEST */ 9792 IEMOP_HLP_NO_LOCK_PREFIX(); 9848 else /* CMP, TEST */ 9793 9849 fAccess = IEM_ACCESS_DATA_R; 9794 }9795 9850 IEM_MC_BEGIN(3, 2); 9796 9851 IEM_MC_ARG(uint16_t *, pu16Dst, 0); … … 9802 9857 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 9803 9858 IEM_MC_ASSIGN(u16Src, u16Imm); 9859 if (pImpl->pfnLockedU16) 9860 IEMOP_HLP_DONE_DECODING(); 9861 else 9862 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9804 9863 IEM_MC_MEM_MAP(pu16Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 9805 9864 IEM_MC_FETCH_EFLAGS(EFlags); … … 9823 9882 /* register target */ 9824 9883 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 9825 IEMOP_HLP_ NO_LOCK_PREFIX();9884 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9826 9885 IEM_MC_BEGIN(3, 0); 9827 9886 IEM_MC_ARG(uint32_t *, pu32Dst, 0); … … 9843 9902 if (pImpl->pfnLockedU32) 9844 9903 fAccess = IEM_ACCESS_DATA_RW; 9845 else 9846 { /* CMP, TEST */ 9847 IEMOP_HLP_NO_LOCK_PREFIX(); 9904 else /* CMP, TEST */ 9848 9905 fAccess = IEM_ACCESS_DATA_R; 9849 }9850 9906 IEM_MC_BEGIN(3, 2); 9851 9907 IEM_MC_ARG(uint32_t *, pu32Dst, 0); … … 9857 9913 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 9858 9914 IEM_MC_ASSIGN(u32Src, u32Imm); 9915 if (pImpl->pfnLockedU32) 9916 IEMOP_HLP_DONE_DECODING(); 9917 else 9918 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9859 9919 IEM_MC_MEM_MAP(pu32Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 9860 9920 IEM_MC_FETCH_EFLAGS(EFlags); … … 9878 9938 /* register target */ 9879 9939 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 9880 IEMOP_HLP_ NO_LOCK_PREFIX();9940 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9881 9941 IEM_MC_BEGIN(3, 0); 9882 9942 IEM_MC_ARG(uint64_t *, pu64Dst, 0); … … 9897 9957 if (pImpl->pfnLockedU64) 9898 9958 fAccess = IEM_ACCESS_DATA_RW; 9899 else 9900 { /* CMP */ 9901 IEMOP_HLP_NO_LOCK_PREFIX(); 9959 else /* CMP */ 9902 9960 fAccess = IEM_ACCESS_DATA_R; 9903 }9904 9961 IEM_MC_BEGIN(3, 2); 9905 9962 IEM_MC_ARG(uint64_t *, pu64Dst, 0); … … 9910 9967 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4); 9911 9968 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 9969 if (pImpl->pfnLockedU64) 9970 IEMOP_HLP_DONE_DECODING(); 9971 else 9972 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9912 9973 IEM_MC_ASSIGN(u64Src, u64Imm); 9913 9974 IEM_MC_MEM_MAP(pu64Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); … … 9953 10014 * Register target 9954 10015 */ 9955 IEMOP_HLP_ NO_LOCK_PREFIX();10016 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9956 10017 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 9957 10018 switch (pVCpu->iem.s.enmEffOpSize) … … 10015 10076 if (pImpl->pfnLockedU16) 10016 10077 fAccess = IEM_ACCESS_DATA_RW; 10017 else 10018 { /* CMP */ 10019 IEMOP_HLP_NO_LOCK_PREFIX(); 10078 else /* CMP */ 10020 10079 fAccess = IEM_ACCESS_DATA_R; 10021 }10022 10080 10023 10081 switch (pVCpu->iem.s.enmEffOpSize) … … 10034 10092 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 10035 10093 IEM_MC_ASSIGN(u16Src, (int8_t)u8Imm); 10094 if (pImpl->pfnLockedU16) 10095 IEMOP_HLP_DONE_DECODING(); 10096 else 10097 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10036 10098 IEM_MC_MEM_MAP(pu16Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 10037 10099 IEM_MC_FETCH_EFLAGS(EFlags); … … 10059 10121 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 10060 10122 IEM_MC_ASSIGN(u32Src, (int8_t)u8Imm); 10123 if (pImpl->pfnLockedU32) 10124 IEMOP_HLP_DONE_DECODING(); 10125 else 10126 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10061 10127 IEM_MC_MEM_MAP(pu32Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 10062 10128 IEM_MC_FETCH_EFLAGS(EFlags); … … 10084 10150 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 10085 10151 IEM_MC_ASSIGN(u64Src, (int8_t)u8Imm); 10152 if (pImpl->pfnLockedU64) 10153 IEMOP_HLP_DONE_DECODING(); 10154 else 10155 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10086 10156 IEM_MC_MEM_MAP(pu64Dst, fAccess, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 10087 10157 IEM_MC_FETCH_EFLAGS(EFlags); … … 10107 10177 { 10108 10178 IEMOP_MNEMONIC("test Eb,Gb"); 10109 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */10110 10179 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF); 10111 10180 return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_test); … … 10117 10186 { 10118 10187 IEMOP_MNEMONIC("test Ev,Gv"); 10119 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */10120 10188 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF); 10121 10189 return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_test); … … 10134 10202 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 10135 10203 { 10136 IEMOP_HLP_ NO_LOCK_PREFIX();10204 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10137 10205 10138 10206 IEM_MC_BEGIN(0, 2); … … 10183 10251 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 10184 10252 { 10185 IEMOP_HLP_ NO_LOCK_PREFIX();10253 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10186 10254 10187 10255 switch (pVCpu->iem.s.enmEffOpSize) … … 10302 10370 uint8_t bRm; 10303 10371 IEM_OPCODE_GET_NEXT_U8(&bRm); 10304 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */10305 10372 10306 10373 /* … … 10309 10376 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 10310 10377 { 10378 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10311 10379 IEM_MC_BEGIN(0, 1); 10312 10380 IEM_MC_LOCAL(uint8_t, u8Value); … … 10325 10393 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10326 10394 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10395 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10327 10396 IEM_MC_FETCH_GREG_U8(u8Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 10328 10397 IEM_MC_STORE_MEM_U8(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u8Value); … … 10341 10410 10342 10411 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 10343 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */10344 10412 10345 10413 /* … … 10348 10416 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 10349 10417 { 10418 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10350 10419 switch (pVCpu->iem.s.enmEffOpSize) 10351 10420 { … … 10390 10459 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10391 10460 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10461 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10392 10462 IEM_MC_FETCH_GREG_U16(u16Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 10393 10463 IEM_MC_STORE_MEM_U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Value); … … 10401 10471 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10402 10472 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10473 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10403 10474 IEM_MC_FETCH_GREG_U32(u32Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 10404 10475 IEM_MC_STORE_MEM_U32(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Value); … … 10412 10483 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10413 10484 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10485 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10414 10486 IEM_MC_FETCH_GREG_U64(u64Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 10415 10487 IEM_MC_STORE_MEM_U64(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Value); … … 10429 10501 10430 10502 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 10431 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */10432 10503 10433 10504 /* … … 10436 10507 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 10437 10508 { 10509 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10438 10510 IEM_MC_BEGIN(0, 1); 10439 10511 IEM_MC_LOCAL(uint8_t, u8Value); … … 10452 10524 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10453 10525 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10526 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10454 10527 IEM_MC_FETCH_MEM_U8(u8Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10455 10528 IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u8Value); … … 10467 10540 10468 10541 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 10469 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */10470 10542 10471 10543 /* … … 10474 10546 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 10475 10547 { 10548 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10476 10549 switch (pVCpu->iem.s.enmEffOpSize) 10477 10550 { … … 10516 10589 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10517 10590 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10591 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10518 10592 IEM_MC_FETCH_MEM_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10519 10593 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u16Value); … … 10527 10601 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10528 10602 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10603 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10529 10604 IEM_MC_FETCH_MEM_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10530 10605 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u32Value); … … 10538 10613 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10539 10614 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10615 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10540 10616 IEM_MC_FETCH_MEM_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10541 10617 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u64Value); … … 10566 10642 10567 10643 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 10568 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */10569 10644 10570 10645 /* … … 10582 10657 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 10583 10658 { 10659 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10584 10660 switch (pVCpu->iem.s.enmEffOpSize) 10585 10661 { … … 10625 10701 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10626 10702 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10703 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10627 10704 IEM_MC_FETCH_SREG_U16(u16Value, iSegReg); 10628 10705 IEM_MC_STORE_MEM_U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Value); … … 10641 10718 IEMOP_MNEMONIC("lea Gv,M"); 10642 10719 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 10643 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */10644 10720 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 10645 10721 return IEMOP_RAISE_INVALID_OPCODE(); /* no register form */ … … 10652 10728 IEM_MC_LOCAL(uint16_t, u16Cast); 10653 10729 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 10730 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10654 10731 IEM_MC_ASSIGN_TO_SMALLER(u16Cast, GCPtrEffSrc); 10655 10732 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u16Cast); … … 10663 10740 IEM_MC_LOCAL(uint32_t, u32Cast); 10664 10741 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 10742 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10665 10743 IEM_MC_ASSIGN_TO_SMALLER(u32Cast, GCPtrEffSrc); 10666 10744 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, u32Cast); … … 10673 10751 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 10674 10752 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 10753 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10675 10754 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, GCPtrEffSrc); 10676 10755 IEM_MC_ADVANCE_RIP(); … … 10688 10767 10689 10768 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 10690 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */10691 10769 10692 10770 /* … … 10711 10789 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 10712 10790 { 10791 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10713 10792 IEM_MC_BEGIN(2, 0); 10714 10793 IEM_MC_ARG_CONST(uint8_t, iSRegArg, iSegReg, 0); … … 10729 10808 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 10730 10809 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10810 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10731 10811 IEM_MC_FETCH_MEM_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10732 10812 IEM_MC_CALL_CIMPL_2(iemCImpl_load_SReg, iSRegArg, u16Value); … … 10751 10831 * now until tests show it's checked.. */ 10752 10832 IEMOP_MNEMONIC("pop Ev"); 10753 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */10754 10833 10755 10834 /* Register access is relatively easy and can share code. */ … … 10791 10870 rcStrict = iemOpHlpCalcRmEffAddr(pVCpu, bRm, 0, &GCPtrEff); 10792 10871 Assert(rcStrict == VINF_SUCCESS); 10872 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10793 10873 pCtx->rsp = RspSaved; 10794 10874 … … 10859 10939 FNIEMOP_DEF_1(iemOpCommonXchgGRegRax, uint8_t, iReg) 10860 10940 { 10861 IEMOP_HLP_ NO_LOCK_PREFIX();10941 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10862 10942 10863 10943 iReg |= pVCpu->iem.s.uRexB; … … 10985 11065 FNIEMOP_DEF(iemOp_cbw) 10986 11066 { 10987 IEMOP_HLP_ NO_LOCK_PREFIX();11067 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10988 11068 switch (pVCpu->iem.s.enmEffOpSize) 10989 11069 { … … 11032 11112 FNIEMOP_DEF(iemOp_cwd) 11033 11113 { 11034 IEMOP_HLP_ NO_LOCK_PREFIX();11114 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11035 11115 switch (pVCpu->iem.s.enmEffOpSize) 11036 11116 { … … 11098 11178 { 11099 11179 IEMOP_MNEMONIC("wait"); 11100 IEMOP_HLP_ NO_LOCK_PREFIX();11180 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11101 11181 11102 11182 IEM_MC_BEGIN(0, 0); … … 11112 11192 FNIEMOP_DEF(iemOp_pushf_Fv) 11113 11193 { 11114 IEMOP_HLP_ NO_LOCK_PREFIX();11194 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11115 11195 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 11116 11196 return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_pushf, pVCpu->iem.s.enmEffOpSize); … … 11121 11201 FNIEMOP_DEF(iemOp_popf_Fv) 11122 11202 { 11123 IEMOP_HLP_ NO_LOCK_PREFIX();11203 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11124 11204 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 11125 11205 return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_popf, pVCpu->iem.s.enmEffOpSize); … … 11131 11211 { 11132 11212 IEMOP_MNEMONIC("sahf"); 11133 IEMOP_HLP_ NO_LOCK_PREFIX();11213 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11134 11214 if ( pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT 11135 11215 && !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fLahfSahf) … … 11155 11235 { 11156 11236 IEMOP_MNEMONIC("lahf"); 11157 IEMOP_HLP_ NO_LOCK_PREFIX();11237 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11158 11238 if ( pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT 11159 11239 && !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fLahfSahf) … … 11191 11271 IEM_NOT_REACHED_DEFAULT_CASE_RET(); \ 11192 11272 } \ 11193 IEMOP_HLP_ NO_LOCK_PREFIX(); \11273 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 11194 11274 } while (0) 11195 11275 … … 11352 11432 FNIEMOP_DEF(iemOp_movsb_Xb_Yb) 11353 11433 { 11354 IEMOP_HLP_ NO_LOCK_PREFIX();11434 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11355 11435 11356 11436 /* … … 11387 11467 FNIEMOP_DEF(iemOp_movswd_Xv_Yv) 11388 11468 { 11389 IEMOP_HLP_ NO_LOCK_PREFIX();11469 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11390 11470 11391 11471 /* … … 11499 11579 FNIEMOP_DEF(iemOp_cmpsb_Xb_Yb) 11500 11580 { 11501 IEMOP_HLP_ NO_LOCK_PREFIX();11581 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11502 11582 11503 11583 /* … … 11546 11626 FNIEMOP_DEF(iemOp_cmpswd_Xv_Yv) 11547 11627 { 11548 IEMOP_HLP_ NO_LOCK_PREFIX();11628 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11549 11629 11550 11630 /* … … 11701 11781 FNIEMOP_DEF(iemOp_stosb_Yb_AL) 11702 11782 { 11703 IEMOP_HLP_ NO_LOCK_PREFIX();11783 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11704 11784 11705 11785 /* … … 11736 11816 FNIEMOP_DEF(iemOp_stoswd_Yv_eAX) 11737 11817 { 11738 IEMOP_HLP_ NO_LOCK_PREFIX();11818 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11739 11819 11740 11820 /* … … 11837 11917 FNIEMOP_DEF(iemOp_lodsb_AL_Xb) 11838 11918 { 11839 IEMOP_HLP_ NO_LOCK_PREFIX();11919 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11840 11920 11841 11921 /* … … 11872 11952 FNIEMOP_DEF(iemOp_lodswd_eAX_Xv) 11873 11953 { 11874 IEMOP_HLP_ NO_LOCK_PREFIX();11954 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11875 11955 11876 11956 /* … … 11979 12059 FNIEMOP_DEF(iemOp_scasb_AL_Xb) 11980 12060 { 11981 IEMOP_HLP_ NO_LOCK_PREFIX();12061 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11982 12062 11983 12063 /* … … 12025 12105 FNIEMOP_DEF(iemOp_scaswd_eAX_Xv) 12026 12106 { 12027 IEMOP_HLP_ NO_LOCK_PREFIX();12107 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12028 12108 12029 12109 /* … … 12146 12226 { 12147 12227 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 12148 IEMOP_HLP_ NO_LOCK_PREFIX();12228 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12149 12229 12150 12230 IEM_MC_BEGIN(0, 1); … … 12232 12312 { 12233 12313 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 12234 IEMOP_HLP_ NO_LOCK_PREFIX();12314 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12235 12315 12236 12316 IEM_MC_BEGIN(0, 1); … … 12245 12325 { 12246 12326 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 12247 IEMOP_HLP_ NO_LOCK_PREFIX();12327 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12248 12328 12249 12329 IEM_MC_BEGIN(0, 1); … … 12257 12337 { 12258 12338 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_U64(&u64Imm); /* 64-bit immediate! */ 12259 IEMOP_HLP_ NO_LOCK_PREFIX();12339 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12260 12340 12261 12341 IEM_MC_BEGIN(0, 1); … … 12360 12440 /* register */ 12361 12441 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 12362 IEMOP_HLP_ NO_LOCK_PREFIX();12442 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12363 12443 IEM_MC_BEGIN(3, 0); 12364 12444 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 12374 12454 { 12375 12455 /* memory */ 12376 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */12377 12456 IEM_MC_BEGIN(3, 2); 12378 12457 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 12384 12463 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 12385 12464 IEM_MC_ASSIGN(cShiftArg, cShift); 12465 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12386 12466 IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 12387 12467 IEM_MC_FETCH_EFLAGS(EFlags); … … 12421 12501 /* register */ 12422 12502 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 12423 IEMOP_HLP_ NO_LOCK_PREFIX();12503 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12424 12504 switch (pVCpu->iem.s.enmEffOpSize) 12425 12505 { … … 12467 12547 { 12468 12548 /* memory */ 12469 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */12470 12549 switch (pVCpu->iem.s.enmEffOpSize) 12471 12550 { … … 12480 12559 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 12481 12560 IEM_MC_ASSIGN(cShiftArg, cShift); 12561 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12482 12562 IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 12483 12563 IEM_MC_FETCH_EFLAGS(EFlags); … … 12500 12580 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 12501 12581 IEM_MC_ASSIGN(cShiftArg, cShift); 12582 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12502 12583 IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 12503 12584 IEM_MC_FETCH_EFLAGS(EFlags); … … 12520 12601 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 12521 12602 IEM_MC_ASSIGN(cShiftArg, cShift); 12603 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12522 12604 IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 12523 12605 IEM_MC_FETCH_EFLAGS(EFlags); … … 12541 12623 IEMOP_MNEMONIC("retn Iw"); 12542 12624 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 12543 IEMOP_HLP_ NO_LOCK_PREFIX();12625 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12544 12626 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 12545 12627 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retn, pVCpu->iem.s.enmEffOpSize, u16Imm); … … 12552 12634 IEMOP_MNEMONIC("retn"); 12553 12635 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 12554 IEMOP_HLP_ NO_LOCK_PREFIX();12636 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12555 12637 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retn, pVCpu->iem.s.enmEffOpSize, 0); 12556 12638 } … … 12622 12704 { 12623 12705 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 12624 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */12625 12706 if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */ 12626 12707 return IEMOP_RAISE_INVALID_OPCODE(); … … 12631 12712 /* register access */ 12632 12713 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 12714 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12633 12715 IEM_MC_BEGIN(0, 0); 12634 12716 IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pVCpu->iem.s.uRexB, u8Imm); … … 12643 12725 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); 12644 12726 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 12727 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12645 12728 IEM_MC_STORE_MEM_U8(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u8Imm); 12646 12729 IEM_MC_ADVANCE_RIP(); … … 12655 12738 { 12656 12739 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 12657 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */12658 12740 if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */ 12659 12741 return IEMOP_RAISE_INVALID_OPCODE(); … … 12668 12750 IEM_MC_BEGIN(0, 0); 12669 12751 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 12752 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12670 12753 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pVCpu->iem.s.uRexB, u16Imm); 12671 12754 IEM_MC_ADVANCE_RIP(); … … 12676 12759 IEM_MC_BEGIN(0, 0); 12677 12760 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 12761 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12678 12762 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pVCpu->iem.s.uRexB, u32Imm); 12679 12763 IEM_MC_ADVANCE_RIP(); … … 12684 12768 IEM_MC_BEGIN(0, 0); 12685 12769 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 12770 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12686 12771 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pVCpu->iem.s.uRexB, u64Imm); 12687 12772 IEM_MC_ADVANCE_RIP(); … … 12702 12787 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2); 12703 12788 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 12789 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12704 12790 IEM_MC_STORE_MEM_U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Imm); 12705 12791 IEM_MC_ADVANCE_RIP(); … … 12712 12798 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4); 12713 12799 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 12800 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12714 12801 IEM_MC_STORE_MEM_U32(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Imm); 12715 12802 IEM_MC_ADVANCE_RIP(); … … 12722 12809 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4); 12723 12810 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 12811 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12724 12812 IEM_MC_STORE_MEM_U64(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Imm); 12725 12813 IEM_MC_ADVANCE_RIP(); … … 12741 12829 IEMOP_HLP_MIN_186(); 12742 12830 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 12743 IEMOP_HLP_NO_LOCK_PREFIX();12744 12831 uint16_t cbFrame; IEM_OPCODE_GET_NEXT_U16(&cbFrame); 12745 12832 uint8_t u8NestingLevel; IEM_OPCODE_GET_NEXT_U8(&u8NestingLevel); 12833 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12746 12834 return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_enter, pVCpu->iem.s.enmEffOpSize, cbFrame, u8NestingLevel); 12747 12835 } … … 12754 12842 IEMOP_HLP_MIN_186(); 12755 12843 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 12756 IEMOP_HLP_ NO_LOCK_PREFIX();12844 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12757 12845 return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_leave, pVCpu->iem.s.enmEffOpSize); 12758 12846 } … … 12764 12852 IEMOP_MNEMONIC("retf Iw"); 12765 12853 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 12766 IEMOP_HLP_ NO_LOCK_PREFIX();12854 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12767 12855 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 12768 12856 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retf, pVCpu->iem.s.enmEffOpSize, u16Imm); … … 12774 12862 { 12775 12863 IEMOP_MNEMONIC("retf"); 12776 IEMOP_HLP_ NO_LOCK_PREFIX();12864 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12777 12865 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 12778 12866 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retf, pVCpu->iem.s.enmEffOpSize, 0); … … 12816 12904 { 12817 12905 IEMOP_MNEMONIC("iret"); 12818 IEMOP_HLP_ NO_LOCK_PREFIX();12906 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12819 12907 return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_iret, pVCpu->iem.s.enmEffOpSize); 12820 12908 } … … 12843 12931 { 12844 12932 /* register */ 12845 IEMOP_HLP_ NO_LOCK_PREFIX();12933 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12846 12934 IEM_MC_BEGIN(3, 0); 12847 12935 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 12857 12945 { 12858 12946 /* memory */ 12859 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */12860 12947 IEM_MC_BEGIN(3, 2); 12861 12948 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 12865 12952 12866 12953 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 12954 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12867 12955 IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 12868 12956 IEM_MC_FETCH_EFLAGS(EFlags); … … 12901 12989 { 12902 12990 /* register */ 12903 IEMOP_HLP_ NO_LOCK_PREFIX();12991 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12904 12992 switch (pVCpu->iem.s.enmEffOpSize) 12905 12993 { … … 12947 13035 { 12948 13036 /* memory */ 12949 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */12950 13037 switch (pVCpu->iem.s.enmEffOpSize) 12951 13038 { … … 12958 13045 12959 13046 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 13047 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12960 13048 IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 12961 13049 IEM_MC_FETCH_EFLAGS(EFlags); … … 12976 13064 12977 13065 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 13066 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12978 13067 IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 12979 13068 IEM_MC_FETCH_EFLAGS(EFlags); … … 12994 13083 12995 13084 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 13085 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12996 13086 IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 12997 13087 IEM_MC_FETCH_EFLAGS(EFlags); … … 13032 13122 { 13033 13123 /* register */ 13034 IEMOP_HLP_ NO_LOCK_PREFIX();13124 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 13035 13125 IEM_MC_BEGIN(3, 0); 13036 13126 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 13047 13137 { 13048 13138 /* memory */ 13049 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */13050 13139 IEM_MC_BEGIN(3, 2); 13051 13140 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 13055 13144 13056 13145 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 13146 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 13057 13147 IEM_MC_FETCH_GREG_U8(cShiftArg, X86_GREG_xCX); 13058 13148 IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); … … 13091 13181 { 13092 13182 /* register */ 13093 IEMOP_HLP_ NO_LOCK_PREFIX();13183 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 13094 13184 switch (pVCpu->iem.s.enmEffOpSize) 13095 13185 { … … 13140 13230 { 13141 13231 /* memory */ 13142 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */13143 13232 switch (pVCpu->iem.s.enmEffOpSize) 13144 13233 { … … 13151 13240 13152 13241 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 13242 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 13153 13243 IEM_MC_FETCH_GREG_U8(cShiftArg, X86_GREG_xCX); 13154 13244 IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); … … 13170 13260 13171 13261 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 13262 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 13172 13263 IEM_MC_FETCH_GREG_U8(cShiftArg, X86_GREG_xCX); 13173 13264 IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); … … 13189 13280 13190 13281 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 13282 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 13191 13283 IEM_MC_FETCH_GREG_U8(cShiftArg, X86_GREG_xCX); 13192 13284 IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); … … 13210 13302 IEMOP_MNEMONIC("aam Ib"); 13211 13303 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 13212 IEMOP_HLP_ NO_LOCK_PREFIX();13304 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 13213 13305 IEMOP_HLP_NO_64BIT(); 13214 13306 if (!bImm) … … 13223 13315 IEMOP_MNEMONIC("aad Ib"); 13224 13316 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 13225 IEMOP_HLP_ NO_LOCK_PREFIX();13317 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 13226 13318 IEMOP_HLP_NO_64BIT(); 13227 13319 return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_aad, bImm); … … 13254 13346 { 13255 13347 IEMOP_MNEMONIC("xlat"); 13256 IEMOP_HLP_ NO_LOCK_PREFIX();13348 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 13257 13349 switch (pVCpu->iem.s.enmEffAddrMode) 13258 13350 { … … 16406 16498 IEMOP_MNEMONIC("loopne Jb"); 16407 16499 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 16408 IEMOP_HLP_ NO_LOCK_PREFIX();16500 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16409 16501 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 16410 16502 … … 16454 16546 IEMOP_MNEMONIC("loope Jb"); 16455 16547 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 16456 IEMOP_HLP_ NO_LOCK_PREFIX();16548 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16457 16549 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 16458 16550 … … 16502 16594 IEMOP_MNEMONIC("loop Jb"); 16503 16595 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 16504 IEMOP_HLP_ NO_LOCK_PREFIX();16596 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16505 16597 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 16506 16598 … … 16577 16669 IEMOP_MNEMONIC("jecxz Jb"); 16578 16670 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 16579 IEMOP_HLP_ NO_LOCK_PREFIX();16671 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16580 16672 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 16581 16673 … … 16622 16714 IEMOP_MNEMONIC("in eAX,Ib"); 16623 16715 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 16624 IEMOP_HLP_ NO_LOCK_PREFIX();16716 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16625 16717 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_in, u8Imm, 1); 16626 16718 } … … 16632 16724 IEMOP_MNEMONIC("in eAX,Ib"); 16633 16725 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 16634 IEMOP_HLP_ NO_LOCK_PREFIX();16726 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16635 16727 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_in, u8Imm, pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT ? 2 : 4); 16636 16728 } … … 16642 16734 IEMOP_MNEMONIC("out Ib,AL"); 16643 16735 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 16644 IEMOP_HLP_ NO_LOCK_PREFIX();16736 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16645 16737 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_out, u8Imm, 1); 16646 16738 } … … 16652 16744 IEMOP_MNEMONIC("out Ib,eAX"); 16653 16745 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 16654 IEMOP_HLP_ NO_LOCK_PREFIX();16746 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16655 16747 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_out, u8Imm, pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT ? 2 : 4); 16656 16748 } … … 16731 16823 IEM_OPCODE_GET_NEXT_U16_ZX_U32(&offSeg); 16732 16824 uint16_t uSel; IEM_OPCODE_GET_NEXT_U16(&uSel); 16733 IEMOP_HLP_ NO_LOCK_PREFIX();16825 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16734 16826 return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_FarJmp, uSel, offSeg, pVCpu->iem.s.enmEffOpSize); 16735 16827 } … … 16741 16833 IEMOP_MNEMONIC("jmp Jb"); 16742 16834 int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm); 16743 IEMOP_HLP_ NO_LOCK_PREFIX();16835 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16744 16836 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 16745 16837 … … 16755 16847 { 16756 16848 IEMOP_MNEMONIC("in AL,DX"); 16757 IEMOP_HLP_ NO_LOCK_PREFIX();16849 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16758 16850 return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_in_eAX_DX, 1); 16759 16851 } … … 16764 16856 { 16765 16857 IEMOP_MNEMONIC("in eAX,DX"); 16766 IEMOP_HLP_ NO_LOCK_PREFIX();16858 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16767 16859 return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_in_eAX_DX, pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT ? 2 : 4); 16768 16860 } … … 16773 16865 { 16774 16866 IEMOP_MNEMONIC("out DX,AL"); 16775 IEMOP_HLP_ NO_LOCK_PREFIX();16867 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16776 16868 return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_out_DX_eAX, 1); 16777 16869 } … … 16782 16874 { 16783 16875 IEMOP_MNEMONIC("out DX,eAX"); 16784 IEMOP_HLP_ NO_LOCK_PREFIX();16876 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16785 16877 return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_out_DX_eAX, pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT ? 2 : 4); 16786 16878 } … … 16837 16929 FNIEMOP_DEF(iemOp_hlt) 16838 16930 { 16839 IEMOP_HLP_ NO_LOCK_PREFIX();16931 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16840 16932 return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_hlt); 16841 16933 } … … 16846 16938 { 16847 16939 IEMOP_MNEMONIC("cmc"); 16848 IEMOP_HLP_ NO_LOCK_PREFIX();16940 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16849 16941 IEM_MC_BEGIN(0, 0); 16850 16942 IEM_MC_FLIP_EFL_BIT(X86_EFL_CF); … … 16990 17082 /* register access */ 16991 17083 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 16992 IEMOP_HLP_ NO_LOCK_PREFIX();17084 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 16993 17085 16994 17086 IEM_MC_BEGIN(3, 0); … … 17005 17097 { 17006 17098 /* memory access. */ 17007 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */17008 17009 17099 IEM_MC_BEGIN(3, 2); 17010 17100 IEM_MC_ARG(uint8_t *, pu8Dst, 0); … … 17016 17106 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 17017 17107 IEM_MC_ASSIGN(u8Src, u8Imm); 17108 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17018 17109 IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_R, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 17019 17110 IEM_MC_FETCH_EFLAGS(EFlags); … … 17033 17124 { 17034 17125 IEMOP_MNEMONIC("test Ev,Iv"); 17035 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */17036 17126 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF); 17037 17127 … … 17039 17129 { 17040 17130 /* register access */ 17131 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17041 17132 switch (pVCpu->iem.s.enmEffOpSize) 17042 17133 { … … 17106 17197 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 17107 17198 IEM_MC_ASSIGN(u16Src, u16Imm); 17199 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17108 17200 IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_R, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 17109 17201 IEM_MC_FETCH_EFLAGS(EFlags); … … 17128 17220 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 17129 17221 IEM_MC_ASSIGN(u32Src, u32Imm); 17222 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17130 17223 IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_R, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 17131 17224 IEM_MC_FETCH_EFLAGS(EFlags); … … 17150 17243 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 17151 17244 IEM_MC_ASSIGN(u64Src, u64Imm); 17245 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17152 17246 IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_R, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); 17153 17247 IEM_MC_FETCH_EFLAGS(EFlags); … … 17170 17264 FNIEMOP_DEF_2(iemOpCommonGrp3MulDivEb, uint8_t, bRm, PFNIEMAIMPLMULDIVU8, pfnU8) 17171 17265 { 17172 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */17173 17174 17266 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 17175 17267 { 17176 17268 /* register access */ 17177 IEMOP_HLP_ NO_LOCK_PREFIX();17269 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17178 17270 IEM_MC_BEGIN(3, 1); 17179 17271 IEM_MC_ARG(uint16_t *, pu16AX, 0); … … 17197 17289 { 17198 17290 /* memory access. */ 17199 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */17200 17201 17291 IEM_MC_BEGIN(3, 2); 17202 17292 IEM_MC_ARG(uint16_t *, pu16AX, 0); … … 17207 17297 17208 17298 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 17299 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17209 17300 IEM_MC_FETCH_MEM_U8(u8Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 17210 17301 IEM_MC_REF_GREG_U16(pu16AX, X86_GREG_xAX); … … 17226 17317 FNIEMOP_DEF_2(iemOpCommonGrp3MulDivEv, uint8_t, bRm, PCIEMOPMULDIVSIZES, pImpl) 17227 17318 { 17228 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */17229 17319 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF); 17230 17320 … … 17232 17322 { 17233 17323 /* register access */ 17324 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17234 17325 switch (pVCpu->iem.s.enmEffOpSize) 17235 17326 { 17236 17327 case IEMMODE_16BIT: 17237 17328 { 17238 IEMOP_HLP_ NO_LOCK_PREFIX();17329 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17239 17330 IEM_MC_BEGIN(4, 1); 17240 17331 IEM_MC_ARG(uint16_t *, pu16AX, 0); … … 17261 17352 case IEMMODE_32BIT: 17262 17353 { 17263 IEMOP_HLP_ NO_LOCK_PREFIX();17354 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17264 17355 IEM_MC_BEGIN(4, 1); 17265 17356 IEM_MC_ARG(uint32_t *, pu32AX, 0); … … 17288 17379 case IEMMODE_64BIT: 17289 17380 { 17290 IEMOP_HLP_ NO_LOCK_PREFIX();17381 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17291 17382 IEM_MC_BEGIN(4, 1); 17292 17383 IEM_MC_ARG(uint64_t *, pu64AX, 0); … … 17321 17412 case IEMMODE_16BIT: 17322 17413 { 17323 IEMOP_HLP_NO_LOCK_PREFIX();17324 17414 IEM_MC_BEGIN(4, 2); 17325 17415 IEM_MC_ARG(uint16_t *, pu16AX, 0); … … 17331 17421 17332 17422 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 17423 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17333 17424 IEM_MC_FETCH_MEM_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 17334 17425 IEM_MC_REF_GREG_U16(pu16AX, X86_GREG_xAX); … … 17348 17439 case IEMMODE_32BIT: 17349 17440 { 17350 IEMOP_HLP_NO_LOCK_PREFIX();17351 17441 IEM_MC_BEGIN(4, 2); 17352 17442 IEM_MC_ARG(uint32_t *, pu32AX, 0); … … 17358 17448 17359 17449 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 17450 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17360 17451 IEM_MC_FETCH_MEM_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 17361 17452 IEM_MC_REF_GREG_U32(pu32AX, X86_GREG_xAX); … … 17377 17468 case IEMMODE_64BIT: 17378 17469 { 17379 IEMOP_HLP_NO_LOCK_PREFIX();17380 17470 IEM_MC_BEGIN(4, 2); 17381 17471 IEM_MC_ARG(uint64_t *, pu64AX, 0); … … 17387 17477 17388 17478 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 17479 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17389 17480 IEM_MC_FETCH_MEM_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 17390 17481 IEM_MC_REF_GREG_U64(pu64AX, X86_GREG_xAX); … … 17487 17578 { 17488 17579 IEMOP_MNEMONIC("clc"); 17489 IEMOP_HLP_ NO_LOCK_PREFIX();17580 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17490 17581 IEM_MC_BEGIN(0, 0); 17491 17582 IEM_MC_CLEAR_EFL_BIT(X86_EFL_CF); … … 17500 17591 { 17501 17592 IEMOP_MNEMONIC("stc"); 17502 IEMOP_HLP_ NO_LOCK_PREFIX();17593 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17503 17594 IEM_MC_BEGIN(0, 0); 17504 17595 IEM_MC_SET_EFL_BIT(X86_EFL_CF); … … 17513 17604 { 17514 17605 IEMOP_MNEMONIC("cli"); 17515 IEMOP_HLP_ NO_LOCK_PREFIX();17606 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17516 17607 return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_cli); 17517 17608 } … … 17521 17612 { 17522 17613 IEMOP_MNEMONIC("sti"); 17523 IEMOP_HLP_ NO_LOCK_PREFIX();17614 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17524 17615 return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_sti); 17525 17616 } … … 17530 17621 { 17531 17622 IEMOP_MNEMONIC("cld"); 17532 IEMOP_HLP_ NO_LOCK_PREFIX();17623 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17533 17624 IEM_MC_BEGIN(0, 0); 17534 17625 IEM_MC_CLEAR_EFL_BIT(X86_EFL_DF); … … 17543 17634 { 17544 17635 IEMOP_MNEMONIC("std"); 17545 IEMOP_HLP_ NO_LOCK_PREFIX();17636 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17546 17637 IEM_MC_BEGIN(0, 0); 17547 17638 IEM_MC_SET_EFL_BIT(X86_EFL_DF); … … 17578 17669 { 17579 17670 IEMOP_MNEMONIC("calln Ev"); 17580 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo Too early? */17581 17671 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 17582 17672 … … 17584 17674 { 17585 17675 /* The new RIP is taken from a register. */ 17676 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17586 17677 switch (pVCpu->iem.s.enmEffOpSize) 17587 17678 { … … 17623 17714 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 17624 17715 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 17716 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17625 17717 IEM_MC_FETCH_MEM_U16(u16Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 17626 17718 IEM_MC_CALL_CIMPL_1(iemCImpl_call_16, u16Target); … … 17633 17725 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 17634 17726 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 17727 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17635 17728 IEM_MC_FETCH_MEM_U32(u32Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 17636 17729 IEM_MC_CALL_CIMPL_1(iemCImpl_call_32, u32Target); … … 17643 17736 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 17644 17737 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 17738 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17645 17739 IEM_MC_FETCH_MEM_U64(u64Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 17646 17740 IEM_MC_CALL_CIMPL_1(iemCImpl_call_64, u64Target); … … 17738 17832 { 17739 17833 IEMOP_MNEMONIC("jmpn Ev"); 17740 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo Too early? */17741 17834 IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); 17742 17835 … … 17744 17837 { 17745 17838 /* The new RIP is taken from a register. */ 17839 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17746 17840 switch (pVCpu->iem.s.enmEffOpSize) 17747 17841 { … … 17783 17877 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 17784 17878 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 17879 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17785 17880 IEM_MC_FETCH_MEM_U16(u16Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 17786 17881 IEM_MC_SET_RIP_U16(u16Target); … … 17793 17888 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 17794 17889 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 17890 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17795 17891 IEM_MC_FETCH_MEM_U32(u32Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 17796 17892 IEM_MC_SET_RIP_U32(u32Target); … … 17803 17899 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 17804 17900 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 17901 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17805 17902 IEM_MC_FETCH_MEM_U64(u64Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 17806 17903 IEM_MC_SET_RIP_U64(u64Target); … … 17832 17929 { 17833 17930 IEMOP_MNEMONIC("push Ev"); 17834 IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo Too early? */17835 17931 17836 17932 /* Registers are handled by a common worker. */ … … 17847 17943 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 17848 17944 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 17945 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17849 17946 IEM_MC_FETCH_MEM_U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 17850 17947 IEM_MC_PUSH_U16(u16Src); … … 17858 17955 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 17859 17956 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 17957 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17860 17958 IEM_MC_FETCH_MEM_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 17861 17959 IEM_MC_PUSH_U32(u32Src); … … 17869 17967 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 17870 17968 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 17969 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 17871 17970 IEM_MC_FETCH_MEM_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 17872 17971 IEM_MC_PUSH_U64(u64Src);
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