Changeset 62162 in vbox for trunk/src/VBox/Devices/PC

Timestamp:

Jul 11, 2016 3:03:44 PM (9 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

108668

Message:

VMM, IOAPIC: Temporarily enable using the PDM lock instead of the dedicated I/O APIC lock.

File:

• trunk/src/VBox/Devices/PC/DevIOAPIC_New.cpp (modified) (16 diffs)

trunk/src/VBox/Devices/PC/DevIOAPIC_New.cpp

@@ -177 +177 @@
 #endif
 
+#define IOAPIC_WITH_PDM_CRITSECT
+#ifdef IOAPIC_WITH_PDM_CRITSECT
+# define IOAPIC_LOCK(pThis, rcBusy)         (pThis)->CTX_SUFF(pIoApicHlp)->pfnLock((pThis)->CTX_SUFF(pDevIns), (rcBusy))
+# define IOAPIC_UNLOCK(pThis)               (pThis)->CTX_SUFF(pIoApicHlp)->pfnUnlock((pThis)->CTX_SUFF(pDevIns))
+#else
+# define IOAPIC_LOCK(pThis, rcBusy)         PDMCritSectEnter(&(pThis)->CritSect, (rcBusy))
+# define IOAPIC_UNLOCK(pThis)               PDMCritSectLeave(&(pThis)->CritSect)
+#endif
+
 
 /*********************************************************************************************************************************
@@ -220 +229 @@
     uint32_t                uIrr;
 
+#ifndef IOAPIC_WITH_PDM_CRITSECT
     /** The critsect for updating to the RTEs. */
     PDMCRITSECT             CritSect;
+#endif
 
 #ifdef VBOX_WITH_STATISTICS
@@ -362 +373 @@
 static void ioapicSignalIntrForRte(PIOAPIC pThis, uint8_t idxRte)
 {
+#ifndef IOAPIC_WITH_PDM_CRITSECT
     Assert(PDMCritSectIsOwner(&pThis->CritSect));
+#endif
 
     /* Ensure the RTE isn't masked. */
@@ -463 +476 @@
                                                             RT_ELEMENTS(pThis->au64RedirTable)));
 
-    int rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_MMIO_WRITE);
+    int rc = IOAPIC_LOCK(pThis, VINF_IOM_R3_MMIO_WRITE);
     if (rc == VINF_SUCCESS)
     {
@@ -496 +509 @@
             ioapicSignalIntrForRte(pThis, idxRte);
 
-        PDMCritSectLeave(&pThis->CritSect);
+        IOAPIC_UNLOCK(pThis);
         LogFlow(("IOAPIC: ioapicSetRedirTableEntry: uIndex=%#RX32 idxRte=%u uValue=%#RX32\n", uIndex, idxRte, uValue));
     }
@@ -579 +592 @@
 
     bool fRemoteIrrCleared = false;
-    int rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_MMIO_WRITE);
+    int rc = IOAPIC_LOCK(pThis, VINF_IOM_R3_MMIO_WRITE);
     if (rc == VINF_SUCCESS)
     {
@@ -605 +618 @@
         }
 
-        PDMCritSectLeave(&pThis->CritSect);
+        IOAPIC_UNLOCK(pThis);
         AssertMsg(fRemoteIrrCleared, ("Failed to clear remote IRR for vector %#x (%u)\n", u8Vector, u8Vector));
     }
@@ -633 +646 @@
     if (RT_LIKELY(iIrq >= 0 && iIrq < (int)RT_ELEMENTS(pThis->au64RedirTable)))
     {
-        int rc = PDMCritSectEnter(&pThis->CritSect, VINF_SUCCESS);
+        int rc = IOAPIC_LOCK(pThis, VINF_SUCCESS);
         AssertRC(rc);
 
@@ -651 +664 @@
         {
             pThis->uIrr &= ~uPinMask;
-            PDMCritSectLeave(&pThis->CritSect);
+            IOAPIC_UNLOCK(pThis);
             return;
         }
@@ -704 +717 @@
         }
 
-        PDMCritSectLeave(&pThis->CritSect);
+        IOAPIC_UNLOCK(pThis);
     }
 #undef IOAPIC_ASSERT_IRQ
@@ -1078 +1091 @@
 
     /* There might be devices threads calling ioapicSetIrq() in parallel, hence the lock. */
-    PDMCritSectEnter(&pThis->CritSect, VERR_IGNORED);
+    IOAPIC_LOCK(pThis, VERR_IGNORED);
 
     pThis->uIrr    = 0;
@@ -1090 +1103 @@
     }
 
-    PDMCritSectLeave(&pThis->CritSect);
+    IOAPIC_UNLOCK(pThis);
 }
 
@@ -1116 +1129 @@
     PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
 
+#ifndef IOAPIC_WITH_PDM_CRITSECT
     /*
      * Destroy the RTE critical section.
@@ -1121 +1135 @@
     if (PDMCritSectIsInitialized(&pThis->CritSect))
         PDMR3CritSectDelete(&pThis->CritSect);
+#endif
 
     return VINF_SUCCESS;
@@ -1169 +1184 @@
     AssertRCReturn(rc, rc);
 
+#ifndef IOAPIC_WITH_PDM_CRITSECT
     /*
      * Setup the critical section to protect concurrent writes to the RTEs.
@@ -1175 +1191 @@
     if (RT_FAILURE(rc))
         return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, N_("IOAPIC: Failed to create critical section. rc=%Rrc"), rc);
+#endif
 
     /*