VirtualBox

Changeset 62290 in vbox for trunk/src/VBox/VMM/VMMAll


Ignore:
Timestamp:
Jul 16, 2016 1:34:27 PM (9 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
108810
Message:

IEM: a few more lines of code tlb code.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

    r62257 r62290  
    735735IEM_STATIC VBOXSTRICTRC     iemRaiseAlignmentCheckException(PVMCPU pVCpu);
    736736#ifdef IEM_WITH_SETJMP
     737DECL_NO_INLINE(IEM_STATIC, DECL_NO_RETURN(void)) iemRaisePageFaultJmp(PVMCPU pVCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc);
    737738DECL_NO_INLINE(IEM_STATIC, DECL_NO_RETURN(void)) iemRaiseGeneralProtectionFault0Jmp(PVMCPU pVCpu);
    738739DECL_NO_INLINE(IEM_STATIC, DECL_NO_RETURN(void)) iemRaiseSelectorBoundsJmp(PVMCPU pVCpu, uint32_t iSegReg, uint32_t fAccess);
     
    13611362    pVCpu->iem.s.DataTlb.uTlbPhysRev = uTlbPhysRev;
    13621363
    1363     if (!fFlushFlush)
     1364    if (!fFullFlush)
    13641365    { /* very likely */ }
    13651366    else
     
    13711372        {
    13721373            pVCpu->iem.s.CodeTlb.aEntries[i].pMappingR3        = NULL;
    1373             pVCpu->iem.s.CodeTlb.aEntries[i].fFlagsAndPhysRev &= ~(IEMTLBE_F_PG_NO_WRITE | IEMTLBE_F_PG_NO_READ | IEMTLBE_F_PHYS_REV)
     1374            pVCpu->iem.s.CodeTlb.aEntries[i].fFlagsAndPhysRev &= ~(IEMTLBE_F_PG_NO_WRITE | IEMTLBE_F_PG_NO_READ | IEMTLBE_F_PHYS_REV);
    13741375        }
    13751376# endif
     
    13791380        {
    13801381            pVCpu->iem.s.DataTlb.aEntries[i].pMappingR3        = NULL;
    1381             pVCpu->iem.s.DataTlb.aEntries[i].fFlagsAndPhysRev &= ~(IEMTLBE_F_PG_NO_WRITE | IEMTLBE_F_PG_NO_READ | IEMTLBE_F_PHYS_REV)
     1382            pVCpu->iem.s.DataTlb.aEntries[i].fFlagsAndPhysRev &= ~(IEMTLBE_F_PG_NO_WRITE | IEMTLBE_F_PG_NO_READ | IEMTLBE_F_PHYS_REV);
    13821383        }
    13831384# endif
     
    15011502            RTGCPHYS    GCPhys;
    15021503            uint64_t    fFlags;
    1503             int rc = PGMGstGetPage(pVCpu, GCPtrNext, &fFlags, &GCPhys);
     1504            int rc = PGMGstGetPage(pVCpu, GCPtrFirst, &fFlags, &GCPhys);
    15041505            if (RT_FAILURE(rc))
    15051506            {
    1506                 Log(("iemOpcodeFetchMoreBytes: %RGv - rc=%Rrc\n", GCPtrNext, rc));
    1507                 return iemRaisePageFault(pVCpu, GCPtrNext, IEM_ACCESS_INSTRUCTION, rc);
     1507                Log(("iemOpcodeFetchMoreBytes: %RGv - rc=%Rrc\n", GCPtrFirst, rc));
     1508                iemRaisePageFaultJmp(pVCpu, GCPtrFirst, IEM_ACCESS_INSTRUCTION, rc);
    15081509            }
    15091510
     
    15171518
    15181519    /*
    1519      * Check TLB access flags.
     1520     * Check TLB page table level access flags.
    15201521     */
    15211522    if (pTlbe->fFlagsAndPhysRev & (IEMTLBE_F_PT_NO_USER | IEMTLBE_F_PT_NO_EXEC))
     
    15421543    else
    15431544    {
    1544 
    1545     }
    1546 
     1545        /** @todo Could be optimized this a little in ring-3 if we liked. */
     1546        size_t cbRead = 0;
     1547        int rc = PATMReadPatchCode(pVCpu->CTX_SUFF(pVM), GCPtrFirst, pvDst, cbDst, &cbRead);
     1548        AssertRCStmt(rc, longjmp(*CTX_SUFF(pVCpu->iem.s.pJmpBuf), rc));
     1549        AssertStmt(cbRead == cbDst, longjmp(*CTX_SUFF(pVCpu->iem.s.pJmpBuf), VERR_IEM_IPE_1));
     1550        return;
     1551    }
    15471552# endif /* VBOX_WITH_RAW_MODE_NOT_R0 */
    15481553
     1554    /*
     1555     * Look up the physical page info if necessary.
     1556     */
     1557    if ((pTlbe->fFlagsAndPhysRev & IEMTLBE_F_PHYS_REV) == pVCpu->iem.s.CodeTlb.uTlbPhysRev)
     1558    { /* not necessary */ }
     1559    else
     1560    {
     1561    }
     1562
     1563
     1564# if defined(IN_RING3) || (defined(IN_RING0) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE))
     1565    /*
     1566     * Try do a direct read using the pMappingR3 pointer.
     1567     */
     1568    if (!(pTlbe->fFlagsAndPhysRev & (IEMTLBE_F_NO_MAPPINGR3 | IEMTLBE_F_PG_NO_READ))
     1569    {
     1570
     1571    }
     1572# endif
     1573
     1574
    15491575# if 0
    1550 
    1551 # ifdef VBOX_WITH_RAW_MODE_NOT_R0
    1552     /* Allow interpretation of patch manager code blocks since they can for
    1553        instance throw #PFs for perfectly good reasons. */
    1554     if (pVCpu->iem.s.fInPatchCode)
    1555     {
    1556         size_t cbRead = 0;
    1557         int rc = PATMReadPatchCode(pVCpu->CTX_SUFF(pVM), GCPtrNext, pVCpu->iem.s.abOpcode, cbToTryRead, &cbRead);
    1558         AssertRCReturn(rc, rc);
    1559         pVCpu->iem.s.cbOpcode = (uint8_t)cbRead; Assert(pVCpu->iem.s.cbOpcode == cbRead); Assert(cbRead > 0);
    1560         return VINF_SUCCESS;
    1561     }
    1562 # endif /* VBOX_WITH_RAW_MODE_NOT_R0 */
    1563 
    1564     RTGCPHYS    GCPhys;
    1565     uint64_t    fFlags;
    1566     int rc = PGMGstGetPage(pVCpu, GCPtrNext, &fFlags, &GCPhys);
    1567     if (RT_FAILURE(rc))
    1568     {
    1569         Log(("iemOpcodeFetchMoreBytes: %RGv - rc=%Rrc\n", GCPtrNext, rc));
    1570         return iemRaisePageFault(pVCpu, GCPtrNext, IEM_ACCESS_INSTRUCTION, rc);
    1571     }
    1572     if (!(fFlags & X86_PTE_US) && pVCpu->iem.s.uCpl == 3)
    1573     {
    1574         Log(("iemOpcodeFetchMoreBytes: %RGv - supervisor page\n", GCPtrNext));
    1575         return iemRaisePageFault(pVCpu, GCPtrNext, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED);
    1576     }
    1577     if ((fFlags & X86_PTE_PAE_NX) && (pCtx->msrEFER & MSR_K6_EFER_NXE))
    1578     {
    1579         Log(("iemOpcodeFetchMoreBytes: %RGv - NX\n", GCPtrNext));
    1580         return iemRaisePageFault(pVCpu, GCPtrNext, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED);
    1581     }
    1582     GCPhys |= GCPtrNext & PAGE_OFFSET_MASK;
    1583     Log5(("GCPtrNext=%RGv GCPhys=%RGp cbOpcodes=%#x\n",  GCPtrNext,  GCPhys,  pVCpu->iem.s.cbOpcode));
    1584     /** @todo Check reserved bits and such stuff. PGM is better at doing
    1585      *        that, so do it when implementing the guest virtual address
    1586      *        TLB... */
    1587 
    15881576    /*
    15891577     * Read the bytes at this address.
     
    52845272                             uErr, GCPtrWhere);
    52855273}
     5274
     5275#ifdef IEM_WITH_SETJMP
     5276/** \#PF(n) - 0e, longjmp.  */
     5277IEM_STATIC DECL_NO_RETURN(void) iemRaisePageFaultJmp(PVMCPU pVCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc)
     5278{
     5279    longjmp(*CTX_SUFF(pVCpu->iem.s.pJmpBuf), VBOXSTRICTRC_VAL(iemRaisePageFault(pVCpu, GCPtrWhere, fAccess, rc)));
     5280}
     5281#endif
    52865282
    52875283
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette