VirtualBox

Changeset 62302 in vbox for trunk/src/VBox/VMM/include


Ignore:
Timestamp:
Jul 18, 2016 1:58:10 PM (9 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
108829
Message:

IEM,PGM: Got code TLB working in ring-3, execution is 3-4 times faster when active (still disabled of course).

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/include/IEMInternal.h

    r62289 r62302  
    6464#endif
    6565
     66
     67//#define IEM_WITH_CODE_TLB// - work in progress
    6668
    6769
     
    310312    /** Pointer to the ring-3 mapping (possibly also valid in ring-0). */
    311313#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
    312     R3PTRTYPE(uint8_t *)    pMappingR3;
     314    R3PTRTYPE(uint8_t *)    pbMappingR3;
    313315#else
    314     R3R0PTRTYPE(uint8_t *)  pMappingR3;
     316    R3R0PTRTYPE(uint8_t *)  pbMappingR3;
    315317#endif
    316318#if HC_ARCH_BITS == 32
     
    371373    /** TLB misses. */
    372374    uint32_t            cTlbMisses;
     375    /** Slow read path.  */
     376    uint32_t            cTlbSlowReadPath;
     377#if 0
    373378    /** TLB misses because of tag mismatch. */
    374379    uint32_t            cTlbMissesTag;
     
    383388    /** TLB misses because no r3(/r0) mapping. */
    384389    uint32_t            cTlbMissesMapping;
     390#endif
    385391    /** Alignment padding. */
    386     uint32_t            au32Padding[3];
     392    uint32_t            au32Padding[3+5];
    387393} IEMTLB;
    388394AssertCompileSizeAlignment(IEMTLB, 64);
     
    448454     * This takes the CS segment limit into account. */
    449455    uint16_t                cbInstrBufTotal;                                                                /* 0x24 */
    450     /** Offset into pbInstrBuf of the first byte of the current instruction. */
    451     uint16_t                offCurInstrStart;                                                               /* 0x26 */
     456    /** Offset into pbInstrBuf of the first byte of the current instruction.
     457     * Can be negative to efficiently handle cross page instructions. */
     458    int16_t                 offCurInstrStart;                                                               /* 0x26 */
    452459
    453460    /** The prefix mask (IEM_OP_PRF_XXX). */
     
    722729/** @def Gets the instruction length. */
    723730#ifdef IEM_WITH_CODE_TLB
    724 # define IEM_GET_INSTR_LEN(a_pVCpu)     ((a_pVCpu)->iem.s.offInstrNextByte - (uint32_t)(a_pVCpu)->iem.s.offCurInstrStart)
     731# define IEM_GET_INSTR_LEN(a_pVCpu)     ((a_pVCpu)->iem.s.offInstrNextByte - (uint32_t)(int32_t)(a_pVCpu)->iem.s.offCurInstrStart)
    725732#else
    726733# define IEM_GET_INSTR_LEN(a_pVCpu)     ((a_pVCpu)->iem.s.offOpcode)
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