Changeset 62606 in vbox for trunk/src/VBox
- Timestamp:
- Jul 27, 2016 4:33:40 PM (8 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 14 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/APICAll.cpp
r62601 r62606 2567 2567 NOREF(pvUser); 2568 2568 Assert(!(GCPhysAddr & 0xf)); 2569 Assert(cb == 4); 2569 Assert(cb == 4); RT_NOREF_PV(cb); 2570 2570 2571 2571 PAPICDEV pApicDev = PDMINS_2_DATA(pDevIns, PAPICDEV); … … 2591 2591 NOREF(pvUser); 2592 2592 Assert(!(GCPhysAddr & 0xf)); 2593 Assert(cb == 4); 2593 Assert(cb == 4); RT_NOREF_PV(cb); 2594 2594 2595 2595 PAPICDEV pApicDev = PDMINS_2_DATA(pDevIns, PAPICDEV); -
trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp
r62601 r62606 411 411 */ 412 412 Assert(pRange->uValue == (idMsr - 0x200) / 2); 413 RT_NOREF_PV(pVCpu); RT_NOREF_PV(idMsr); RT_NOREF_PV(uRawValue); 413 RT_NOREF_PV(pVCpu); RT_NOREF_PV(idMsr); RT_NOREF_PV(uRawValue); RT_NOREF_PV(pRange); 414 414 415 415 if ((uValue & 0xff) >= 7) … … 453 453 */ 454 454 Assert(pRange->uValue == (idMsr - 0x200) / 2); 455 RT_NOREF_PV(pVCpu); RT_NOREF_PV(idMsr); RT_NOREF_PV(uRawValue); 455 RT_NOREF_PV(pVCpu); RT_NOREF_PV(idMsr); RT_NOREF_PV(uRawValue); RT_NOREF_PV(pRange); 456 456 457 457 uint64_t fInvPhysMask = ~(RT_BIT_64(pVCpu->CTX_SUFF(pVM)->cpum.s.GuestFeatures.cMaxPhysAddrWidth) - 1U); -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r62601 r62606 1899 1899 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); NOREF(pPool); 1900 1900 LogFlow(("SyncPage: GCPtrPage=%RGv cPages=%u uErr=%#x\n", GCPtrPage, cPages, uErr)); 1901 RT_NOREF_PV(uErr); RT_NOREF_PV(cPages); RT_NOREF_PV(GCPtrPage); 1901 1902 1902 1903 PGM_LOCK_ASSERT_OWNER(pVM); … … 2388 2389 2389 2390 Log(("CheckPageFault: real page fault (notp) at %RGv (%d)\n", GCPtrPage, uPageFaultLevel)); 2391 RT_NOREF_PV(GCPtrPage); RT_NOREF_PV(uPageFaultLevel); 2390 2392 return VINF_EM_RAW_GUEST_TRAP; 2391 2393 } … … 2410 2412 2411 2413 Log(("CheckPageFault: real page fault (rsvd) at %RGv (%d)\n", GCPtrPage, uPageFaultLevel)); 2414 RT_NOREF_PV(GCPtrPage); RT_NOREF_PV(uPageFaultLevel); 2412 2415 return VINF_EM_RAW_GUEST_TRAP; 2413 2416 } … … 2432 2435 2433 2436 Log(("CheckPageFault: real page fault (prot) at %RGv (%d)\n", GCPtrPage, uPageFaultLevel)); 2437 RT_NOREF_PV(GCPtrPage); RT_NOREF_PV(uPageFaultLevel); 2434 2438 return VINF_EM_RAW_GUEST_TRAP; 2435 2439 } … … 2643 2647 STAM_COUNTER_INC(&pVCpu->pgm.s.StatSyncPtPD[iPDSrc]); 2644 2648 #endif 2645 LogFlow(("SyncPT: GCPtrPage=%RGv\n", GCPtrPage)); 2649 LogFlow(("SyncPT: GCPtrPage=%RGv\n", GCPtrPage)); RT_NOREF_PV(GCPtrPage); 2646 2650 2647 2651 PGM_LOCK_ASSERT_OWNER(pVM); … … 3495 3499 3496 3500 LogFlow(("VerifyAccessSyncPage: GCPtrPage=%RGv fPage=%#x uErr=%#x\n", GCPtrPage, fPage, uErr)); 3501 RT_NOREF_PV(GCPtrPage); RT_NOREF_PV(fPage); RT_NOREF_PV(uErr); 3497 3502 3498 3503 Assert(!pVM->pgm.s.fNestedPaging); -
trunk/src/VBox/VMM/VMMAll/PGMAllGst.h
r62478 r62606 333 333 PGM_GST_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask) 334 334 { 335 Assert((cb & PAGE_OFFSET_MASK) == 0); 335 Assert((cb & PAGE_OFFSET_MASK) == 0); RT_NOREF_PV(cb); 336 336 337 337 #if PGM_GST_TYPE == PGM_TYPE_32BIT \ -
trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp
r62478 r62606 670 670 int pgmMapActivateCR3(PVM pVM, PPGMPOOLPAGE pShwPageCR3) 671 671 { 672 RT_NOREF_PV(pShwPageCR3); 673 672 674 /* 673 675 * Skip this if it doesn't apply. -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r62478 r62606 2024 2024 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) 2025 2025 Assert(pLock->pvPage != NULL); 2026 Assert(pLock->pVCpu == VMMGetCpu(pVM)); 2026 Assert(pLock->pVCpu == VMMGetCpu(pVM)); RT_NOREF_PV(pVM); 2027 2027 PGM_DYNMAP_UNUSED_HINT(pLock->pVCpu, pLock->pvPage); 2028 2028 pLock->pVCpu = NULL; … … 2130 2130 Log(("pgmPhysGCPhys2R3Ptr(,%RGp,): dont use this API!\n", GCPhys)); /** @todo eliminate this API! */ 2131 2131 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) 2132 NOREF(pVM); NOREF(pR3Ptr); 2132 NOREF(pVM); NOREF(pR3Ptr); RT_NOREF_PV(GCPhys); 2133 2133 AssertFailedReturn(VERR_NOT_IMPLEMENTED); 2134 2134 #else -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r62601 r62606 716 716 ) 717 717 { 718 STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,Fork)); 718 STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,Fork)); RT_NOREF_PV(pPool); 719 719 return true; 720 720 } … … 1990 1990 return; 1991 1991 1992 Log(("pgmPoolResetDirtyPage %RGv\n", GCPtrPage)); 1992 Log(("pgmPoolResetDirtyPage %RGv\n", GCPtrPage)); RT_NOREF_PV(GCPtrPage); 1993 1993 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++) 1994 1994 { … … 2914 2914 PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers); 2915 2915 2916 LogFlow(("pgmPoolTrackInsert GCPhys=%RGp iUser=%d iUserTable=%x\n", GCPhys, iUser, iUserTable)); 2916 LogFlow(("pgmPoolTrackInsert GCPhys=%RGp iUser=%d iUserTable=%x\n", GCPhys, iUser, iUserTable)); RT_NOREF_PV(GCPhys); 2917 2917 2918 2918 if (iUser != NIL_PGMPOOL_IDX) … … 3852 3852 3853 3853 /* Safety precaution in case we change the paging for other modes too in the future. */ 3854 Assert(!pgmPoolIsPageLocked(pPage)); 3854 Assert(!pgmPoolIsPageLocked(pPage)); RT_NOREF_PV(pPage); 3855 3855 3856 3856 #ifdef VBOX_STRICT -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r62601 r62606 96 96 Assert(enmAccessType == PGMACCESSTYPE_WRITE); NOREF(enmAccessType); 97 97 Log(("selmGuestLDTWriteHandler: write to %RGv size %d\n", GCPtr, cbBuf)); NOREF(GCPtr); NOREF(cbBuf); 98 NOREF(pvPtr); NOREF(pvBuf); NOREF(enmOrigin); NOREF(pvUser); 98 NOREF(pvPtr); NOREF(pvBuf); NOREF(enmOrigin); NOREF(pvUser); RT_NOREF_PV(pVM); 99 99 100 100 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT); … … 586 586 { 587 587 Assert(!HMIsEnabled(pVCpu->CTX_SUFF(pVM))); 588 RT_NOREF_PV(pCtx); 588 RT_NOREF_PV(pCtx); RT_NOREF_PV(Sel); 589 589 590 590 /* -
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r62478 r62606 56 56 Assert(enmAccessType == PGMACCESSTYPE_WRITE); NOREF(enmAccessType); 57 57 Log(("trpmGuestIDTWriteHandler: write to %RGv size %d\n", GCPtr, cbBuf)); NOREF(GCPtr); NOREF(cbBuf); 58 NOREF(pvPtr); NOREF(pvUser); NOREF(pvBuf); NOREF(enmOrigin); NOREF(pvUser); 58 NOREF(pvPtr); NOREF(pvUser); NOREF(pvBuf); NOREF(enmOrigin); NOREF(pvUser); RT_NOREF_PV(pVM); 59 59 Assert(!HMIsEnabled(pVM)); 60 60 -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r62601 r62606 2186 2186 static DECLCALLBACK(int) hmR0SvmCallRing3Callback(PVMCPU pVCpu, VMMCALLRING3 enmOperation, void *pvUser) 2187 2187 { 2188 RT_NOREF_PV(pvUser); 2189 2188 2190 if (enmOperation == VMMCALLRING3_VM_R0_ASSERTION) 2189 2191 { -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r62601 r62606 3382 3382 { 3383 3383 Assert(!(u32TprThreshold & 0xfffffff0)); /* Bits 31:4 MBZ. */ 3384 Assert(pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TPR_SHADOW); 3384 Assert(pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TPR_SHADOW); RT_NOREF_PV(pVCpu); 3385 3385 return VMXWriteVmcs32(VMX_VMCS32_CTRL_TPR_THRESHOLD, u32TprThreshold); 3386 3386 } -
trunk/src/VBox/VMM/VMMRC/PATMRC.cpp
r62478 r62606 53 53 RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange, void *pvUser) 54 54 { 55 NOREF(pVCpu); NOREF(uErrorCode); NOREF(pCtxCore); NOREF(pvFault); NOREF(pvRange); NOREF(offRange); 55 NOREF(pVCpu); NOREF(uErrorCode); NOREF(pCtxCore); NOREF(pvFault); NOREF(pvRange); NOREF(offRange); RT_NOREF_PV(pvUser); 56 56 57 57 Assert(pvUser); -
trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp
r62603 r62606 459 459 RTLogComPrintf("TRPMGCHyperTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs.Sel, pRegFrame->eip); 460 460 #endif 461 NOREF(pTrpmCpu); 461 NOREF(pTrpmCpu); RT_NOREF_PV(pRegFrame); 462 462 return VERR_TRPM_DONT_PANIC; 463 463 } … … 1426 1426 DECLCALLBACK(int) trpmRCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser) 1427 1427 { 1428 RT_NOREF_PV(pRegFrame); 1428 1429 Log(("********************************************************\n")); 1429 1430 Log(("trpmRCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser)); -
trunk/src/VBox/VMM/VMMRZ/PGMRZDynMap.cpp
r62478 r62606 1351 1351 static uint32_t pgmR0DynMapPageSlow(PPGMRZDYNMAP pThis, RTHCPHYS HCPhys, uint32_t iPage, PVMCPU pVCpu, bool *pfNew) 1352 1352 { 1353 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapPageSlow); 1353 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapPageSlow); RT_NOREF_PV(pVCpu); 1354 1354 1355 1355 /*
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