VirtualBox

Changeset 63648 in vbox for trunk/src/VBox/VMM/VMMR3


Ignore:
Timestamp:
Aug 26, 2016 11:44:40 AM (8 years ago)
Author:
vboxsync
Message:

VMM/GIM/HyperV: Add partial support for synthetic interrupt controller (still disabled, i.e. not exposed to guest).

Location:
trunk/src/VBox/VMM/VMMR3
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR3/GIM.cpp

    r62641 r63648  
    347347    }
    348348    return VINF_SUCCESS;
     349}
     350
     351
     352/**
     353 * Applies relocations to data and code managed by this
     354 * component. This function will be called at init and
     355 * whenever the VMM need to relocate it self inside the GC.
     356 *
     357 * @param   pVM         The cross context VM structure.
     358 * @param   offDelta    Relocation delta relative to old location.
     359 */
     360VMMR3_INT_DECL(void) GIMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
     361{
     362    switch (pVM->gim.s.enmProviderId)
     363    {
     364        case GIMPROVIDERID_HYPERV:
     365            gimR3HvRelocate(pVM, offDelta);
     366            break;
     367
     368        default:
     369            break;
     370    }
    349371}
    350372

  • trunk/src/VBox/VMM/VMMR3/GIMHv.cpp

    r62642 r63648  
    2121*********************************************************************************************************************************/
    2222#define LOG_GROUP LOG_GROUP_GIM
     23#include <VBox/vmm/apic.h>
    2324#include <VBox/vmm/gim.h>
    2425#include <VBox/vmm/cpum.h>
    … …  
    4950 * GIM Hyper-V saved-state version.
    5051 */
    51 #define GIM_HV_SAVED_STATE_VERSION                UINT32_C(2)
     52#define GIM_HV_SAVED_STATE_VERSION                UINT32_C(3)
     53/** Saved states, prior to any synthetic interrupt controller support. */
     54#define GIM_HV_SAVED_STATE_VERSION_PRE_SYNIC      UINT32_C(2)
    5255/** Vanilla saved states, prior to any debug support. */
    5356#define GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG      UINT32_C(1)
    … …  
    180183static void   gimR3HvTermHypercallSupport(PVM pVM);
    181184static int    gimR3HvInitDebugSupport(PVM pVM);
    182 #if 0 /** @todo currently unused, which is probably very wrong */
    183185static void   gimR3HvTermDebugSupport(PVM pVM);
    184 #endif
    185 
     186static DECLCALLBACK(void) gimR3HvTimerCallback(PVM pVM, PTMTIMER pTimer, void *pvUser);
    186187
    187188/**
    … …  
    197198    AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
    198199
    199     int rc;
    200200    PGIMHV pHv = &pVM->gim.s.u.Hv;
    201201
    … …  
    209209         * Validate the Hyper-V settings.
    210210         */
    211         rc = CFGMR3ValidateConfig(pCfgHv, "/HyperV/",
     211        int rc2 = CFGMR3ValidateConfig(pCfgHv, "/HyperV/",
    212212                                  "VendorID"
    213213                                  "|VSInterface"
    214214                                  "|HypercallDebugInterface",
    215215                                  "" /* pszValidNodes */, "GIM/HyperV" /* pszWho */, 0 /* uInstance */);
    216         if (RT_FAILURE(rc))
    217             return rc;
     216        if (RT_FAILURE(rc2))
     217            return rc2;
    218218    }
    219219
    … …  
    221221     * The Hyper-V vendor signature, must be 12 characters. */
    222222    char szVendor[13];
    223     rc = CFGMR3QueryStringDef(pCfgHv, "VendorID", szVendor, sizeof(szVendor), "VBoxVBoxVBox");
     223    int rc = CFGMR3QueryStringDef(pCfgHv, "VendorID", szVendor, sizeof(szVendor), "VBoxVBoxVBox");
    224224    AssertLogRelRCReturn(rc, rc);
    225225    AssertLogRelMsgReturn(strlen(szVendor) == 12,
    … …  
    255255                       //| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
    256256                       | GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
    257                        //| GIM_HV_BASE_FEAT_BASIC_SYNTH_IC
    258                        //| GIM_HV_BASE_FEAT_SYNTH_TIMER_MSRS
     257                       //| GIM_HV_BASE_FEAT_BASIC_SYNIC_MSRS
     258                       //| GIM_HV_BASE_FEAT_STIMER_MSRS
    259259                       | GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
    260260                       | GIM_HV_BASE_FEAT_HYPERCALL_MSRS
    … …  
    279279        /* Hypervisor recommendations to the guest. */
    280280        pHv->uHyperHints = GIM_HV_HINT_MSR_FOR_SYS_RESET
    281                          | GIM_HV_HINT_RELAX_TIME_CHECKS;
     281                         | GIM_HV_HINT_RELAX_TIME_CHECKS
     282                         //| GIM_HV_HINT_X2APIC_MSRS
     283                         ;
    282284
    283285        /* Expose more if we're posing as Microsoft. We can, if needed, force MSR-based Hv
    … …  
    347349    RT_ZERO(HyperLeaf);
    348350    HyperLeaf.uLeaf        = UINT32_C(0x40000000);
    349     HyperLeaf.uEax         = UINT32_C(0x40000006); /* Minimum value for Hyper-V is 0x40000005. */
     351    if (   pHv->fIsVendorMsHv
     352        && pHv->fIsInterfaceVs)
     353        HyperLeaf.uEax     = UINT32_C(0x40000082); /* Since we expose 0x40000082 below for the Hyper-V PV-debugging case. */
     354    else
     355        HyperLeaf.uEax     = UINT32_C(0x40000006); /* Minimum value for Hyper-V default is 0x40000005. */
    350356    /*
    351357     * Don't report vendor as 'Microsoft Hv'[1] by default, see @bugref{7270#c152}.
    … …  
    404410    AssertLogRelRCReturn(rc, rc);
    405411
     412    RT_ZERO(HyperLeaf);
     413    HyperLeaf.uLeaf        = UINT32_C(0x40000005);
     414    rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
     415    AssertLogRelRCReturn(rc, rc);
     416
     417    /* Leaf 0x40000006 is inserted in gimR3HvInitCompleted(). */
     418
    406419    if (   pHv->fIsVendorMsHv
    407420        && pHv->fIsInterfaceVs)
    … …  
    437450    for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
    438451    {
    439         rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
    440         AssertLogRelRCReturn(rc, rc);
     452        int rc2 = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
     453        AssertLogRelRCReturn(rc2, rc2);
    441454    }
    442455
    … …  
    449462    {
    450463        PGIMHVCPU pHvCpu = &pVM->aCpus[i].gim.s.u.HvCpu;
    451         for (size_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintXMsr); idxSintMsr++)
    452             pHvCpu->auSintXMsr[idxSintMsr] = MSR_GIM_HV_SINT_MASKED;
     464        for (uint8_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSintMsr++)
     465            pHvCpu->auSintMsrs[idxSintMsr] = MSR_GIM_HV_SINT_MASKED;
    453466    }
    454467
    … …  
    464477    rc = gimR3HvInitDebugSupport(pVM);
    465478    AssertLogRelRCReturn(rc, rc);
     479
     480    /*
     481     * Setup up the per-VCPU synthetic timers.
     482     */
     483    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     484    {
     485        PVMCPU       pVCpu     = &pVM->aCpus[idCpu];
     486        PGIMHVCPU    pHvCpu    = &pVCpu->gim.s.u.HvCpu;
     487
     488        for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
     489        {
     490            PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
     491
     492            /* Associate the synthetic timer with its corresponding VCPU. */
     493            pHvStimer->idCpu     = pVCpu->idCpu;
     494            pHvStimer->idxStimer = idxStimer;
     495
     496            /* Create the timer and associate the context pointers. */
     497            RTStrPrintf(&pHvStimer->szTimerDesc[0], sizeof(pHvStimer->szTimerDesc), "Hyper-V[%u] Timer%u", pVCpu->idCpu,
     498                        idxStimer);
     499            rc = TMR3TimerCreateInternal(pVM, TMCLOCK_VIRTUAL_SYNC, gimR3HvTimerCallback, pHvStimer /* pvUser */,
     500                                         pHvStimer->szTimerDesc, &pHvStimer->pTimerR3);
     501            AssertLogRelRCReturn(rc, rc);
     502            pHvStimer->pTimerR0 = TMTimerR0Ptr(pHvStimer->pTimerR3);
     503            pHvStimer->pTimerRC = TMTimerRCPtr(pHvStimer->pTimerR3);
     504        }
     505    }
     506
     507    /*
     508     * Inform APIC whether Hyper-V compatibility mode is enabled or not.
     509     */
     510    if (pHv->uHyperHints & GIM_HV_HINT_X2APIC_MSRS)
     511        APICR3HvSetCompatMode(pVM, true);
     512
     513    /*
     514     * Register statistics.
     515     */
     516    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     517    {
     518        PVMCPU    pVCpu  = &pVM->aCpus[idCpu];
     519        PGIMHVCPU pHvCpu = &pVCpu->gim.s.u.HvCpu;
     520
     521        for (size_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStatStimerFired); idxStimer++)
     522        {
     523            int rc2 = STAMR3RegisterF(pVM, &pHvCpu->aStatStimerFired[idxStimer], STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS,
     524                                     STAMUNIT_OCCURENCES, "Number of times the synthetic timer fired.",
     525                                     "/GIM/HyperV/%u/Stimer%u_Fired", idCpu, idxStimer);
     526            AssertLogRelRCReturn(rc2, rc2);
     527        }
     528    }
    466529
    467530    return VINF_SUCCESS;
    … …  
    516579    gimR3HvReset(pVM);
    517580    gimR3HvTermHypercallSupport(pVM);
     581    gimR3HvTermDebugSupport(pVM);
     582
     583    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     584    {
     585        PGIMHVCPU pHvCpu = &pVM->aCpus[idCpu].gim.s.u.HvCpu;
     586        for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
     587        {
     588            PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
     589            TMR3TimerDestroy(pHvStimer->pTimerR3);
     590        }
     591    }
     592
    518593    return VINF_SUCCESS;
     594}
     595
     596
     597/**
     598 * Applies relocations to data and code managed by this
     599 * component. This function will be called at init and
     600 * whenever the VMM need to relocate it self inside the GC.
     601 *
     602 * @param   pVM         The cross context VM structure.
     603 * @param   offDelta    Relocation delta relative to old location.
     604 */
     605VMMR3_INT_DECL(void) gimR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
     606{
     607    RT_NOREF1(offDelta);
     608    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     609    {
     610        PGIMHVCPU pHvCpu = &pVM->aCpus[idCpu].gim.s.u.HvCpu;
     611        for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
     612        {
     613            PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
     614            pHvStimer->pTimerRC = TMTimerRCPtr(pHvStimer->pTimerR3);
     615        }
     616    }
    519617}
    520618
    … …  
    568666    {
    569667        PGIMHVCPU pHvCpu = &pVM->aCpus[i].gim.s.u.HvCpu;
     668        pHvCpu->uSControlMsr = 0;
    570669        pHvCpu->uSimpMsr  = 0;
    571670        pHvCpu->uSiefpMsr = 0;
    572671        pHvCpu->uApicAssistPageMsr = 0;
    573         for (size_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintXMsr); idxSintMsr++)
    574             pHvCpu->auSintXMsr[idxSintMsr] = MSR_GIM_HV_SINT_MASKED;
     672
     673        for (uint8_t idxSint = 0; idxSint < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSint++)
     674            pHvCpu->auSintMsrs[idxSint] = MSR_GIM_HV_SINT_MASKED;
     675
     676        for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
     677        {
     678            PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
     679            pHvStimer->uStimerConfigMsr = 0;
     680            pHvStimer->uStimerCountMsr  = 0;
     681        }
    575682    }
    576683}
    … …  
    741848        PGIMHVCPU pHvCpu = &pVM->aCpus[i].gim.s.u.HvCpu;
    742849        SSMR3PutU64(pSSM, pHvCpu->uSimpMsr);
    743         SSMR3PutU64(pSSM, pHvCpu->auSintXMsr[GIM_HV_VMBUS_MSG_SINT]);
     850        for (size_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSintMsr++)
     851            SSMR3PutU64(pSSM, pHvCpu->auSintMsrs[idxSintMsr]);
    744852    }
    745853
    … …  
    760868     * Load the Hyper-V SSM version first.
    761869     */
    762     uint32_t uHvSavedStatVersion;
    763     int rc = SSMR3GetU32(pSSM, &uHvSavedStatVersion);
     870    uint32_t uHvSavedStateVersion;
     871    int rc = SSMR3GetU32(pSSM, &uHvSavedStateVersion);
    764872    AssertRCReturn(rc, rc);
    765     if (   uHvSavedStatVersion != GIM_HV_SAVED_STATE_VERSION
    766         && uHvSavedStatVersion != GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG)
     873    if (   uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION
     874        && uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION_PRE_SYNIC
     875        && uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG)
    767876        return SSMR3SetLoadError(pSSM, VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION, RT_SRC_POS,
    768877                                 N_("Unsupported Hyper-V saved-state version %u (current %u)!"),
    769                                  uHvSavedStatVersion, GIM_HV_SAVED_STATE_VERSION);
     878                                 uHvSavedStateVersion, GIM_HV_SAVED_STATE_VERSION);
    770879
    771880    /*
    … …  
    855964     * Load the debug support data.
    856965     */
    857     if (uHvSavedStatVersion > GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG)
     966    if (uHvSavedStateVersion > GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG)
    858967    {
    859968        SSMR3GetU64(pSSM, &pHv->uDbgPendingBufferMsr);
    … …  
    870979            PGIMHVCPU pHvCpu = &pVM->aCpus[i].gim.s.u.HvCpu;
    871980            SSMR3GetU64(pSSM, &pHvCpu->uSimpMsr);
    872             SSMR3GetU64(pSSM, &pHvCpu->auSintXMsr[GIM_HV_VMBUS_MSG_SINT]);
     981            if (uHvSavedStateVersion <= GIM_HV_SAVED_STATE_VERSION_PRE_SYNIC)
     982                SSMR3GetU64(pSSM, &pHvCpu->auSintMsrs[GIM_HV_VMBUS_MSG_SINT]);
     983            else
     984            {
     985                for (uint8_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSintMsr++)
     986                    SSMR3GetU64(pSSM, &pHvCpu->auSintMsrs[idxSintMsr]);
     987            }
    873988        }
    874989
    … …  
    9101025        {
    9111026            /** @todo Inform APIC. */
    912             LogRel(("GIM: HyperV%u: Enabled APIC-assist page at %#RGp\n", pVCpu->idCpu, GCPhysApicAssistPage));
     1027            LogRel(("GIM%u: HyperV: Enabled APIC-assist page at %#RGp\n", pVCpu->idCpu, GCPhysApicAssistPage));
    9131028        }
    9141029        else
    9151030        {
    916             LogRelFunc(("GIM: HyperV%u: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
     1031            LogRelFunc(("GIM%u: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
    9171032            rc = VERR_GIM_OPERATION_FAILED;
    9181033        }
    … …  
    9221037    }
    9231038
    924     LogRelFunc(("GIM: HyperV%u: Failed to alloc %u bytes\n", pVCpu->idCpu, cbApicAssistPage));
     1039    LogRelFunc(("GIM%u: HyperV: Failed to alloc %u bytes\n", pVCpu->idCpu, cbApicAssistPage));
    9251040    return VERR_NO_MEMORY;
    9261041}
    … …  
    9351050VMMR3_INT_DECL(int) gimR3HvDisableApicAssistPage(PVMCPU pVCpu)
    9361051{
    937     LogRel(("GIM: HyperV%u: Disabled APIC-assist page\n", pVCpu->idCpu));
     1052    LogRel(("GIM%u: HyperV: Disabled APIC-assist page\n", pVCpu->idCpu));
    9381053    /** @todo inform APIC */
    9391054    return VINF_SUCCESS;
     1055}
     1056
     1057
     1058/**
     1059 * Hyper-V synthetic timer callback.
     1060 *
     1061 * @param   pVM         The cross context VM structure.
     1062 * @param   pTimer      Pointer to timer.
     1063 * @param   pvUser      Pointer to the synthetic timer.
     1064 */
     1065static DECLCALLBACK(void) gimR3HvTimerCallback(PVM pVM, PTMTIMER pTimer, void *pvUser)
     1066{
     1067    PGIMHVSTIMER pHvStimer = (PGIMHVSTIMER)pvUser;
     1068    Assert(pHvStimer);
     1069    Assert(TMTimerIsLockOwner(pTimer));
     1070    Assert(pHvStimer->idCpu < pVM->cCpus);
     1071
     1072    PVMCPU    pVCpu  = &pVM->aCpus[pHvStimer->idCpu];
     1073    PGIMHVCPU pHvCpu = &pVCpu->gim.s.u.HvCpu;
     1074    Assert(pHvStimer->idxStimer < RT_ELEMENTS(pHvCpu->aStatStimerFired));
     1075
     1076    STAM_COUNTER_INC(&pHvCpu->aStatStimerFired[pHvStimer->idxStimer]);
     1077
     1078    uint64_t const uStimerConfig = pHvStimer->uStimerConfigMsr;
     1079    uint16_t const idxSint       = MSR_GIM_HV_STIMER_GET_SINTX(uStimerConfig);
     1080    if (RT_LIKELY(idxSint < RT_ELEMENTS(pHvCpu->auSintMsrs)))
     1081    {
     1082        uint64_t const uSint = pHvCpu->auSintMsrs[idxSint];
     1083        if (!MSR_GIM_HV_SINT_IS_MASKED(uSint))
     1084        {
     1085            uint8_t const uVector  = MSR_GIM_HV_SINT_GET_VECTOR(uSint);
     1086            bool const    fAutoEoi = MSR_GIM_HV_SINT_IS_AUTOEOI(uSint);
     1087            APICHvSendInterrupt(pVCpu, uVector, fAutoEoi, XAPICTRIGGERMODE_EDGE);
     1088        }
     1089    }
     1090
     1091    /* Re-arm the timer if it's periodic. */
     1092    if (MSR_GIM_HV_STIMER_IS_PERIODIC(uStimerConfig))
     1093        gimHvStartStimer(pVCpu, pHvStimer);
    9401094}
    9411095
    … …  
    9681122        {
    9691123            /** @todo SIEF setup. */
    970             LogRel(("GIM: HyperV%u: Enabled SIEF page at %#RGp\n", pVCpu->idCpu, GCPhysSiefPage));
     1124            LogRel(("GIM%u: HyperV: Enabled SIEF page at %#RGp\n", pVCpu->idCpu, GCPhysSiefPage));
    9711125        }
    9721126        else
    9731127        {
    974             LogRelFunc(("GIM: HyperV%u: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
     1128            LogRelFunc(("GIM%u: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
    9751129            rc = VERR_GIM_OPERATION_FAILED;
    9761130        }
    … …  
    9801134    }
    9811135
    982     LogRelFunc(("GIM: HyperV%u: Failed to alloc %u bytes\n", pVCpu->idCpu, cbSiefPage));
     1136    LogRelFunc(("GIM%u: HyperV: Failed to alloc %u bytes\n", pVCpu->idCpu, cbSiefPage));
    9831137    return VERR_NO_MEMORY;
    9841138}
    … …  
    9931147VMMR3_INT_DECL(int) gimR3HvDisableSiefPage(PVMCPU pVCpu)
    9941148{
    995     LogRel(("GIM: HyperV%u: Disabled APIC-assist page\n", pVCpu->idCpu));
     1149    LogRel(("GIM%u: HyperV: Disabled APIC-assist page\n", pVCpu->idCpu));
    9961150    /** @todo SIEF teardown. */
    9971151    return VINF_SUCCESS;
    … …  
    11421296        {
    11431297            /** @todo SIM setup. */
    1144             LogRel(("GIM: HyperV%u: Enabled SIM page at %#RGp\n", pVCpu->idCpu, GCPhysSimPage));
     1298            LogRel(("GIM%u: HyperV: Enabled SIM page at %#RGp\n", pVCpu->idCpu, GCPhysSimPage));
    11451299        }
    11461300        else
    11471301        {
    1148             LogRelFunc(("GIM: HyperV%u: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
     1302            LogRelFunc(("GIM%u: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
    11491303            rc = VERR_GIM_OPERATION_FAILED;
    11501304        }
    … …  
    11541308    }
    11551309
    1156     LogRelFunc(("GIM: HyperV%u: Failed to alloc %u bytes\n", pVCpu->idCpu, cbSimPage));
     1310    LogRelFunc(("GIM%u: HyperV: Failed to alloc %u bytes\n", pVCpu->idCpu, cbSimPage));
    11571311    return VERR_NO_MEMORY;
    11581312}
    … …  
    11671321VMMR3_INT_DECL(int) gimR3HvDisableSimPage(PVMCPU pVCpu)
    11681322{
    1169     LogRel(("GIM: HyperV%u: Disabled SIM page\n", pVCpu->idCpu));
     1323    LogRel(("GIM%u: HyperV: Disabled SIM page\n", pVCpu->idCpu));
    11701324    /** @todo SIM teardown. */
    11711325    return VINF_SUCCESS;
    … …  
    14001554
    14011555
    1402 #if 0 /** @todo currently unused, which is probably very wrong */
    14031556/**
    14041557 * Terminates Hyper-V guest debug support.
    … …  
    14151568    }
    14161569}
    1417 #endif
    14181570
    14191571

  • trunk/src/VBox/VMM/VMMR3/VM.cpp

    r62869 r63648  
    12641264    DBGFR3Relocate(pVM, offDelta);
    12651265    PDMR3Relocate(pVM, offDelta);
     1266    GIMR3Relocate(pVM, offDelta);
    12661267}
    12671268
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