- Timestamp:
- Feb 5, 2007 2:25:02 PM (18 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Runtime/testcase/tstInlineAsm.cpp (modified) (16 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Runtime/testcase/tstInlineAsm.cpp
r1 r639 62 62 63 63 64 #if ndef PIC64 #if !defined(PIC) || !defined(__X86__) 65 65 const char *getCacheAss(unsigned u) 66 66 { … … 113 113 { 114 114 unsigned iBit; 115 uint32_t uEAX, uEBX, uECX, uEDX; 115 struct 116 { 117 uint32_t uEBX, uEAX, uEDX, uECX; 118 } s; 116 119 if (!ASMHasCpuId()) 117 120 { … … 123 126 * Try the 0 function and use that for checking the ASMCpuId_* variants. 124 127 */ 125 ASMCpuId(0, & uEAX, &uEBX, &uECX, &uEDX);128 ASMCpuId(0, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 126 129 127 130 uint32_t u32 = ASMCpuId_ECX(0); 128 CHECKVAL(u32, uECX, "%x");131 CHECKVAL(u32, s.uECX, "%x"); 129 132 130 133 u32 = ASMCpuId_EDX(0); 131 CHECKVAL(u32, uEDX, "%x");132 133 uint32_t uECX2 = uECX - 1;134 uint32_t uEDX2 = uEDX - 1;134 CHECKVAL(u32, s.uEDX, "%x"); 135 136 uint32_t uECX2 = s.uECX - 1; 137 uint32_t uEDX2 = s.uEDX - 1; 135 138 ASMCpuId_ECX_EDX(0, &uECX2, &uEDX2); 136 139 137 CHECKVAL(uECX2, uECX, "%x");138 CHECKVAL(uEDX2, uEDX, "%x");140 CHECKVAL(uECX2, s.uECX, "%x"); 141 CHECKVAL(uEDX2, s.uEDX, "%x"); 139 142 140 143 /* … … 142 145 */ 143 146 RTPrintf("tstInlineAsm: CPUID Dump\n"); 144 ASMCpuId(0, & uEAX, &uEBX, &uECX, &uEDX);145 const uint32_t cFunctions = uEAX;147 ASMCpuId(0, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 148 const uint32_t cFunctions = s.uEAX; 146 149 147 150 /* raw dump */ … … 151 154 for (unsigned iStd = 0; iStd <= cFunctions + 3; iStd++) 152 155 { 153 ASMCpuId(iStd, & uEAX, &uEBX, &uECX, &uEDX);156 ASMCpuId(iStd, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 154 157 RTPrintf("%08x %08x %08x %08x %08x%s\n", 155 iStd, uEAX, uEBX, uECX,uEDX, iStd <= cFunctions ? "" : "*");158 iStd, s.uEAX, s.uEBX, s.uECX, s.uEDX, iStd <= cFunctions ? "" : "*"); 156 159 } 157 160 … … 159 162 * Understandable output 160 163 */ 161 ASMCpuId(0, & uEAX, &uEBX, &uECX, &uEDX);164 ASMCpuId(0, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 162 165 RTPrintf("Name: %.04s%.04s%.04s\n" 163 166 "Support: 0-%u\n", 164 & uEBX, &uEDX, &uECX,uEAX);167 &s.uEBX, &s.uEDX, &s.uECX, s.uEAX); 165 168 166 169 /* … … 169 172 if (cFunctions >= 1) 170 173 { 171 ASMCpuId(1, & uEAX, &uEBX, &uECX, &uEDX);174 ASMCpuId(1, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 172 175 RTPrintf("Family: %d \tExtended: %d \tEffectiv: %d\n" 173 176 "Model: %d \tExtended: %d \tEffectiv: %d\n" … … 177 180 "CLFLUSH Size: %d\n" 178 181 "Brand ID: %#04x\n", 179 ( uEAX >> 8) & 0xf, (uEAX >> 20) & 0x7f, ((uEAX >> 8) & 0xf) + (((uEAX >> 8) & 0xf) == 0xf ? (uEAX >> 20) & 0x7f : 0),180 ( uEAX >> 4) & 0xf, (uEAX >> 16) & 0x0f, ((uEAX >> 4) & 0xf) | (((uEAX >> 4) & 0xf) == 0xf ? (uEAX >> 16) & 0x0f : 0),181 ( uEAX >> 0) & 0xf,182 ( uEBX >> 24) & 0xff,183 ( uEBX >> 16) & 0xff,184 ( uEBX >> 8) & 0xff,185 ( uEBX >> 0) & 0xff);182 (s.uEAX >> 8) & 0xf, (s.uEAX >> 20) & 0x7f, ((s.uEAX >> 8) & 0xf) + (((s.uEAX >> 8) & 0xf) == 0xf ? (s.uEAX >> 20) & 0x7f : 0), 183 (s.uEAX >> 4) & 0xf, (s.uEAX >> 16) & 0x0f, ((s.uEAX >> 4) & 0xf) | (((s.uEAX >> 4) & 0xf) == 0xf ? (s.uEAX >> 16) & 0x0f : 0), 184 (s.uEAX >> 0) & 0xf, 185 (s.uEBX >> 24) & 0xff, 186 (s.uEBX >> 16) & 0xff, 187 (s.uEBX >> 8) & 0xff, 188 (s.uEBX >> 0) & 0xff); 186 189 187 190 RTPrintf("Features EDX: "); 188 if ( uEDX & BIT(0)) RTPrintf(" FPU");189 if ( uEDX & BIT(1)) RTPrintf(" VME");190 if ( uEDX & BIT(2)) RTPrintf(" DE");191 if ( uEDX & BIT(3)) RTPrintf(" PSE");192 if ( uEDX & BIT(4)) RTPrintf(" TSC");193 if ( uEDX & BIT(5)) RTPrintf(" MSR");194 if ( uEDX & BIT(6)) RTPrintf(" PAE");195 if ( uEDX & BIT(7)) RTPrintf(" MCE");196 if ( uEDX & BIT(8)) RTPrintf(" CX8");197 if ( uEDX & BIT(9)) RTPrintf(" APIC");198 if ( uEDX & BIT(10)) RTPrintf(" 10");199 if ( uEDX & BIT(11)) RTPrintf(" SEP");200 if ( uEDX & BIT(12)) RTPrintf(" MTRR");201 if ( uEDX & BIT(13)) RTPrintf(" PGE");202 if ( uEDX & BIT(14)) RTPrintf(" MCA");203 if ( uEDX & BIT(15)) RTPrintf(" CMOV");204 if ( uEDX & BIT(16)) RTPrintf(" PAT");205 if ( uEDX & BIT(17)) RTPrintf(" PSE36");206 if ( uEDX & BIT(18)) RTPrintf(" PSN");207 if ( uEDX & BIT(19)) RTPrintf(" CLFSH");208 if ( uEDX & BIT(20)) RTPrintf(" 20");209 if ( uEDX & BIT(21)) RTPrintf(" DS");210 if ( uEDX & BIT(22)) RTPrintf(" ACPI");211 if ( uEDX & BIT(23)) RTPrintf(" MMX");212 if ( uEDX & BIT(24)) RTPrintf(" FXSR");213 if ( uEDX & BIT(25)) RTPrintf(" SSE");214 if ( uEDX & BIT(26)) RTPrintf(" SSE2");215 if ( uEDX & BIT(27)) RTPrintf(" SS");216 if ( uEDX & BIT(28)) RTPrintf(" HTT");217 if ( uEDX & BIT(29)) RTPrintf(" 29");218 if ( uEDX & BIT(30)) RTPrintf(" 30");219 if ( uEDX & BIT(31)) RTPrintf(" 31");191 if (s.uEDX & BIT(0)) RTPrintf(" FPU"); 192 if (s.uEDX & BIT(1)) RTPrintf(" VME"); 193 if (s.uEDX & BIT(2)) RTPrintf(" DE"); 194 if (s.uEDX & BIT(3)) RTPrintf(" PSE"); 195 if (s.uEDX & BIT(4)) RTPrintf(" TSC"); 196 if (s.uEDX & BIT(5)) RTPrintf(" MSR"); 197 if (s.uEDX & BIT(6)) RTPrintf(" PAE"); 198 if (s.uEDX & BIT(7)) RTPrintf(" MCE"); 199 if (s.uEDX & BIT(8)) RTPrintf(" CX8"); 200 if (s.uEDX & BIT(9)) RTPrintf(" APIC"); 201 if (s.uEDX & BIT(10)) RTPrintf(" 10"); 202 if (s.uEDX & BIT(11)) RTPrintf(" SEP"); 203 if (s.uEDX & BIT(12)) RTPrintf(" MTRR"); 204 if (s.uEDX & BIT(13)) RTPrintf(" PGE"); 205 if (s.uEDX & BIT(14)) RTPrintf(" MCA"); 206 if (s.uEDX & BIT(15)) RTPrintf(" CMOV"); 207 if (s.uEDX & BIT(16)) RTPrintf(" PAT"); 208 if (s.uEDX & BIT(17)) RTPrintf(" PSE36"); 209 if (s.uEDX & BIT(18)) RTPrintf(" PSN"); 210 if (s.uEDX & BIT(19)) RTPrintf(" CLFSH"); 211 if (s.uEDX & BIT(20)) RTPrintf(" 20"); 212 if (s.uEDX & BIT(21)) RTPrintf(" DS"); 213 if (s.uEDX & BIT(22)) RTPrintf(" ACPI"); 214 if (s.uEDX & BIT(23)) RTPrintf(" MMX"); 215 if (s.uEDX & BIT(24)) RTPrintf(" FXSR"); 216 if (s.uEDX & BIT(25)) RTPrintf(" SSE"); 217 if (s.uEDX & BIT(26)) RTPrintf(" SSE2"); 218 if (s.uEDX & BIT(27)) RTPrintf(" SS"); 219 if (s.uEDX & BIT(28)) RTPrintf(" HTT"); 220 if (s.uEDX & BIT(29)) RTPrintf(" 29"); 221 if (s.uEDX & BIT(30)) RTPrintf(" 30"); 222 if (s.uEDX & BIT(31)) RTPrintf(" 31"); 220 223 RTPrintf("\n"); 221 224 222 225 /** @todo check intel docs. */ 223 226 RTPrintf("Features ECX: "); 224 if ( uECX & BIT(0)) RTPrintf(" SSE3");227 if (s.uECX & BIT(0)) RTPrintf(" SSE3"); 225 228 for (iBit = 1; iBit < 13; iBit++) 226 if ( uECX & BIT(iBit))229 if (s.uECX & BIT(iBit)) 227 230 RTPrintf(" %d", iBit); 228 if ( uECX & BIT(13)) RTPrintf(" CX16");231 if (s.uECX & BIT(13)) RTPrintf(" CX16"); 229 232 for (iBit = 14; iBit < 32; iBit++) 230 if ( uECX & BIT(iBit))233 if (s.uECX & BIT(iBit)) 231 234 RTPrintf(" %d", iBit); 232 235 RTPrintf("\n"); … … 238 241 */ 239 242 /** @todo check out the intel specs. */ 240 ASMCpuId(0x80000000, & uEAX, &uEBX, &uECX, &uEDX);241 if (! uEAX && !uEBX && !uECX && !uEDX)243 ASMCpuId(0x80000000, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 244 if (!s.uEAX && !s.uEBX && !s.uECX && !s.uEDX) 242 245 { 243 246 RTPrintf("No extended CPUID info? Check the manual on how to detect this...\n"); 244 247 return; 245 248 } 246 const uint32_t cExtFunctions = uEAX | 0x80000000;249 const uint32_t cExtFunctions = s.uEAX | 0x80000000; 247 250 248 251 /* raw dump */ … … 252 255 for (unsigned iExt = 0x80000000; iExt <= cExtFunctions + 3; iExt++) 253 256 { 254 ASMCpuId(iExt, & uEAX, &uEBX, &uECX, &uEDX);257 ASMCpuId(iExt, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 255 258 RTPrintf("%08x %08x %08x %08x %08x%s\n", 256 iExt, uEAX, uEBX, uECX,uEDX, iExt <= cExtFunctions ? "" : "*");259 iExt, s.uEAX, s.uEBX, s.uECX, s.uEDX, iExt <= cExtFunctions ? "" : "*"); 257 260 } 258 261 … … 260 263 * Understandable output 261 264 */ 262 ASMCpuId(0x80000000, & uEAX, &uEBX, &uECX, &uEDX);265 ASMCpuId(0x80000000, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 263 266 RTPrintf("Ext Name: %.4s%.4s%.4s\n" 264 267 "Ext Supports: 0x80000000-%#010x\n", 265 & uEBX, &uEDX, &uECX,uEAX);268 &s.uEBX, &s.uEDX, &s.uECX, s.uEAX); 266 269 267 270 if (cExtFunctions >= 0x80000001) 268 271 { 269 ASMCpuId(0x80000001, & uEAX, &uEBX, &uECX, &uEDX);272 ASMCpuId(0x80000001, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 270 273 RTPrintf("Family: %d \tExtended: %d \tEffectiv: %d\n" 271 274 "Model: %d \tExtended: %d \tEffectiv: %d\n" 272 275 "Stepping: %d\n" 273 276 "Brand ID: %#05x\n", 274 ( uEAX >> 8) & 0xf, (uEAX >> 20) & 0x7f, ((uEAX >> 8) & 0xf) + (((uEAX >> 8) & 0xf) == 0xf ? (uEAX >> 20) & 0x7f : 0),275 ( uEAX >> 4) & 0xf, (uEAX >> 16) & 0x0f, ((uEAX >> 4) & 0xf) | (((uEAX >> 4) & 0xf) == 0xf ? (uEAX >> 16) & 0x0f : 0),276 ( uEAX >> 0) & 0xf,277 uEBX & 0xfff);277 (s.uEAX >> 8) & 0xf, (s.uEAX >> 20) & 0x7f, ((s.uEAX >> 8) & 0xf) + (((s.uEAX >> 8) & 0xf) == 0xf ? (s.uEAX >> 20) & 0x7f : 0), 278 (s.uEAX >> 4) & 0xf, (s.uEAX >> 16) & 0x0f, ((s.uEAX >> 4) & 0xf) | (((s.uEAX >> 4) & 0xf) == 0xf ? (s.uEAX >> 16) & 0x0f : 0), 279 (s.uEAX >> 0) & 0xf, 280 s.uEBX & 0xfff); 278 281 279 282 RTPrintf("Features EDX: "); 280 if ( uEDX & BIT(0)) RTPrintf(" FPU");281 if ( uEDX & BIT(1)) RTPrintf(" VME");282 if ( uEDX & BIT(2)) RTPrintf(" DE");283 if ( uEDX & BIT(3)) RTPrintf(" PSE");284 if ( uEDX & BIT(4)) RTPrintf(" TSC");285 if ( uEDX & BIT(5)) RTPrintf(" MSR");286 if ( uEDX & BIT(6)) RTPrintf(" PAE");287 if ( uEDX & BIT(7)) RTPrintf(" MCE");288 if ( uEDX & BIT(8)) RTPrintf(" CX8");289 if ( uEDX & BIT(9)) RTPrintf(" APIC");290 if ( uEDX & BIT(10)) RTPrintf(" 10");291 if ( uEDX & BIT(11)) RTPrintf(" SCR");292 if ( uEDX & BIT(12)) RTPrintf(" MTRR");293 if ( uEDX & BIT(13)) RTPrintf(" PGE");294 if ( uEDX & BIT(14)) RTPrintf(" MCA");295 if ( uEDX & BIT(15)) RTPrintf(" CMOV");296 if ( uEDX & BIT(16)) RTPrintf(" PAT");297 if ( uEDX & BIT(17)) RTPrintf(" PSE36");298 if ( uEDX & BIT(18)) RTPrintf(" 18");299 if ( uEDX & BIT(19)) RTPrintf(" 19");300 if ( uEDX & BIT(20)) RTPrintf(" NX");301 if ( uEDX & BIT(21)) RTPrintf(" 21");302 if ( uEDX & BIT(22)) RTPrintf(" ExtMMX");303 if ( uEDX & BIT(23)) RTPrintf(" MMX");304 if ( uEDX & BIT(24)) RTPrintf(" FXSR");305 if ( uEDX & BIT(25)) RTPrintf(" FastFXSR");306 if ( uEDX & BIT(26)) RTPrintf(" 26");307 if ( uEDX & BIT(27)) RTPrintf(" RDTSCP");308 if ( uEDX & BIT(28)) RTPrintf(" 29");309 if ( uEDX & BIT(29)) RTPrintf(" LongMode");310 if ( uEDX & BIT(30)) RTPrintf(" Ext3DNow");311 if ( uEDX & BIT(31)) RTPrintf(" 3DNow");283 if (s.uEDX & BIT(0)) RTPrintf(" FPU"); 284 if (s.uEDX & BIT(1)) RTPrintf(" VME"); 285 if (s.uEDX & BIT(2)) RTPrintf(" DE"); 286 if (s.uEDX & BIT(3)) RTPrintf(" PSE"); 287 if (s.uEDX & BIT(4)) RTPrintf(" TSC"); 288 if (s.uEDX & BIT(5)) RTPrintf(" MSR"); 289 if (s.uEDX & BIT(6)) RTPrintf(" PAE"); 290 if (s.uEDX & BIT(7)) RTPrintf(" MCE"); 291 if (s.uEDX & BIT(8)) RTPrintf(" CX8"); 292 if (s.uEDX & BIT(9)) RTPrintf(" APIC"); 293 if (s.uEDX & BIT(10)) RTPrintf(" 10"); 294 if (s.uEDX & BIT(11)) RTPrintf(" SCR"); 295 if (s.uEDX & BIT(12)) RTPrintf(" MTRR"); 296 if (s.uEDX & BIT(13)) RTPrintf(" PGE"); 297 if (s.uEDX & BIT(14)) RTPrintf(" MCA"); 298 if (s.uEDX & BIT(15)) RTPrintf(" CMOV"); 299 if (s.uEDX & BIT(16)) RTPrintf(" PAT"); 300 if (s.uEDX & BIT(17)) RTPrintf(" PSE36"); 301 if (s.uEDX & BIT(18)) RTPrintf(" 18"); 302 if (s.uEDX & BIT(19)) RTPrintf(" 19"); 303 if (s.uEDX & BIT(20)) RTPrintf(" NX"); 304 if (s.uEDX & BIT(21)) RTPrintf(" 21"); 305 if (s.uEDX & BIT(22)) RTPrintf(" ExtMMX"); 306 if (s.uEDX & BIT(23)) RTPrintf(" MMX"); 307 if (s.uEDX & BIT(24)) RTPrintf(" FXSR"); 308 if (s.uEDX & BIT(25)) RTPrintf(" FastFXSR"); 309 if (s.uEDX & BIT(26)) RTPrintf(" 26"); 310 if (s.uEDX & BIT(27)) RTPrintf(" RDTSCP"); 311 if (s.uEDX & BIT(28)) RTPrintf(" 29"); 312 if (s.uEDX & BIT(29)) RTPrintf(" LongMode"); 313 if (s.uEDX & BIT(30)) RTPrintf(" Ext3DNow"); 314 if (s.uEDX & BIT(31)) RTPrintf(" 3DNow"); 312 315 RTPrintf("\n"); 313 316 314 317 /** @todo Check intel docs. */ 315 318 RTPrintf("Features ECX: "); 316 if ( uECX & BIT(0)) RTPrintf(" LAHF/SAHF");317 if ( uECX & BIT(1)) RTPrintf(" CMPL");318 if ( uECX & BIT(2)) RTPrintf(" 2");319 if ( uECX & BIT(3)) RTPrintf(" 3");320 if ( uECX & BIT(4)) RTPrintf(" CR8L");319 if (s.uECX & BIT(0)) RTPrintf(" LAHF/SAHF"); 320 if (s.uECX & BIT(1)) RTPrintf(" CMPL"); 321 if (s.uECX & BIT(2)) RTPrintf(" 2"); 322 if (s.uECX & BIT(3)) RTPrintf(" 3"); 323 if (s.uECX & BIT(4)) RTPrintf(" CR8L"); 321 324 for (iBit = 5; iBit < 32; iBit++) 322 if ( uECX & BIT(iBit))325 if (s.uECX & BIT(iBit)) 323 326 RTPrintf(" %d", iBit); 324 327 RTPrintf("\n"); … … 337 340 if (cExtFunctions >= 0x80000005) 338 341 { 339 ASMCpuId(0x80000005, & uEAX, &uEBX, &uECX, &uEDX);342 ASMCpuId(0x80000005, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 340 343 RTPrintf("TLB 2/4M Instr/Uni: %s %3d entries\n" 341 344 "TLB 2/4M Data: %s %3d entries\n", 342 getCacheAss(( uEAX >> 8) & 0xff), (uEAX >> 0) & 0xff,343 getCacheAss(( uEAX >> 24) & 0xff), (uEAX >> 16) & 0xff);345 getCacheAss((s.uEAX >> 8) & 0xff), (s.uEAX >> 0) & 0xff, 346 getCacheAss((s.uEAX >> 24) & 0xff), (s.uEAX >> 16) & 0xff); 344 347 RTPrintf("TLB 4K Instr/Uni: %s %3d entries\n" 345 348 "TLB 4K Data: %s %3d entries\n", 346 getCacheAss(( uEBX >> 8) & 0xff), (uEBX >> 0) & 0xff,347 getCacheAss(( uEBX >> 24) & 0xff), (uEBX >> 16) & 0xff);349 getCacheAss((s.uEBX >> 8) & 0xff), (s.uEBX >> 0) & 0xff, 350 getCacheAss((s.uEBX >> 24) & 0xff), (s.uEBX >> 16) & 0xff); 348 351 RTPrintf("L1 Instr Cache Line Size: %d bytes\n" 349 352 "L1 Instr Cache Lines Per Tag: %d\n" 350 353 "L1 Instr Cache Associativity: %s\n" 351 354 "L1 Instr Cache Size: %d KB\n", 352 ( uEDX >> 0) & 0xff,353 ( uEDX >> 8) & 0xff,354 getCacheAss(( uEDX >> 16) & 0xff),355 ( uEDX >> 24) & 0xff);355 (s.uEDX >> 0) & 0xff, 356 (s.uEDX >> 8) & 0xff, 357 getCacheAss((s.uEDX >> 16) & 0xff), 358 (s.uEDX >> 24) & 0xff); 356 359 RTPrintf("L1 Data Cache Line Size: %d bytes\n" 357 360 "L1 Data Cache Lines Per Tag: %d\n" 358 361 "L1 Data Cache Associativity: %s\n" 359 362 "L1 Data Cache Size: %d KB\n", 360 ( uECX >> 0) & 0xff,361 ( uECX >> 8) & 0xff,362 getCacheAss(( uECX >> 16) & 0xff),363 ( uECX >> 24) & 0xff);363 (s.uECX >> 0) & 0xff, 364 (s.uECX >> 8) & 0xff, 365 getCacheAss((s.uECX >> 16) & 0xff), 366 (s.uECX >> 24) & 0xff); 364 367 } 365 368 366 369 if (cExtFunctions >= 0x80000006) 367 370 { 368 ASMCpuId(0x80000006, & uEAX, &uEBX, &uECX, &uEDX);371 ASMCpuId(0x80000006, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 369 372 RTPrintf("L2 TLB 2/4M Instr/Uni: %s %4d entries\n" 370 373 "L2 TLB 2/4M Data: %s %4d entries\n", 371 getL2CacheAss(( uEAX >> 12) & 0xf), (uEAX >> 0) & 0xfff,372 getL2CacheAss(( uEAX >> 28) & 0xf), (uEAX >> 16) & 0xfff);374 getL2CacheAss((s.uEAX >> 12) & 0xf), (s.uEAX >> 0) & 0xfff, 375 getL2CacheAss((s.uEAX >> 28) & 0xf), (s.uEAX >> 16) & 0xfff); 373 376 RTPrintf("L2 TLB 4K Instr/Uni: %s %4d entries\n" 374 377 "L2 TLB 4K Data: %s %4d entries\n", 375 getL2CacheAss(( uEBX >> 12) & 0xf), (uEBX >> 0) & 0xfff,376 getL2CacheAss(( uEBX >> 28) & 0xf), (uEBX >> 16) & 0xfff);378 getL2CacheAss((s.uEBX >> 12) & 0xf), (s.uEBX >> 0) & 0xfff, 379 getL2CacheAss((s.uEBX >> 28) & 0xf), (s.uEBX >> 16) & 0xfff); 377 380 RTPrintf("L2 Cache Line Size: %d bytes\n" 378 381 "L2 Cache Lines Per Tag: %d\n" 379 382 "L2 Cache Associativity: %s\n" 380 383 "L2 Cache Size: %d KB\n", 381 ( uEDX >> 0) & 0xff,382 ( uEDX >> 8) & 0xf,383 getL2CacheAss(( uEDX >> 12) & 0xf),384 ( uEDX >> 16) & 0xffff);384 (s.uEDX >> 0) & 0xff, 385 (s.uEDX >> 8) & 0xf, 386 getL2CacheAss((s.uEDX >> 12) & 0xf), 387 (s.uEDX >> 16) & 0xffff); 385 388 } 386 389 387 390 if (cExtFunctions >= 0x80000007) 388 391 { 389 ASMCpuId(0x80000007, & uEAX, &uEBX, &uECX, &uEDX);392 ASMCpuId(0x80000007, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 390 393 RTPrintf("APM Features: "); 391 if ( uEDX & BIT(0)) RTPrintf(" TS");392 if ( uEDX & BIT(1)) RTPrintf(" FID");393 if ( uEDX & BIT(2)) RTPrintf(" VID");394 if ( uEDX & BIT(3)) RTPrintf(" TTP");395 if ( uEDX & BIT(4)) RTPrintf(" TM");396 if ( uEDX & BIT(5)) RTPrintf(" STC");394 if (s.uEDX & BIT(0)) RTPrintf(" TS"); 395 if (s.uEDX & BIT(1)) RTPrintf(" FID"); 396 if (s.uEDX & BIT(2)) RTPrintf(" VID"); 397 if (s.uEDX & BIT(3)) RTPrintf(" TTP"); 398 if (s.uEDX & BIT(4)) RTPrintf(" TM"); 399 if (s.uEDX & BIT(5)) RTPrintf(" STC"); 397 400 for (iBit = 6; iBit < 32; iBit++) 398 if ( uEDX & BIT(iBit))401 if (s.uEDX & BIT(iBit)) 399 402 RTPrintf(" %d", iBit); 400 403 RTPrintf("\n"); … … 403 406 if (cExtFunctions >= 0x80000008) 404 407 { 405 ASMCpuId(0x80000008, & uEAX, &uEBX, &uECX, &uEDX);408 ASMCpuId(0x80000008, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX); 406 409 RTPrintf("Physical Address Width: %d bits\n" 407 410 "Virtual Address Width: %d bits\n", 408 ( uEAX >> 0) & 0xff,409 ( uEAX >> 8) & 0xff);411 (s.uEAX >> 0) & 0xff, 412 (s.uEAX >> 8) & 0xff); 410 413 RTPrintf("Physical Core Count: %d\n", 411 ( uECX >> 0) & 0xff);414 (s.uECX >> 0) & 0xff); 412 415 } 413 416 } 414 #endif /* !PIC */417 #endif /* !PIC || !X86 */ 415 418 416 419 … … 527 530 528 531 529 #ifdef __ amd64__532 #ifdef __AMD64__ 530 533 static void tstASMAtomicXchgU128(void) 531 534 { … … 804 807 * Execute the tests. 805 808 */ 806 #if ndef PIC809 #if !defined(PIC) || !defined(__X86__) 807 810 tstASMCpuId(); 808 811 #endif … … 811 814 tstASMAtomicXchgU32(); 812 815 tstASMAtomicXchgU64(); 813 #ifdef __ amd64__816 #ifdef __AMD64__ 814 817 tstASMAtomicXchgU128(); 815 818 #endif
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